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1. 发明申请

WO2007115425A1 METHOD AND APPARATUS FOR SUPPORTING HETEROGENEOUS VIRTUALIZATION 审中-公开
标题翻译：支持异构虚拟化的方法和装置
公开(公告)号：WO2007115425A1
公开(公告)日：2007-10-18
申请号：PCT/CN2006/000564
申请日：2006-03-30
申请人： INTEL CORPORATION , WANG, Yun , DONG, Yaozu
发明人： WANG, Yun , DONG, Yaozu
IPC分类号： G06F12/00
CPC分类号： G06F9/45545 , G06F9/45554 , G06F9/45558 , G06F9/5077 , G06F12/0246 , G06F12/1036 , G06F12/109
摘要： Machine-readable media, methods, apparatus and system are described. In some embodiments, a virtual machine monitor of a computer platform may comprise a service virtual machine created by the virtual machine monitor partitioning an underlying hardware machine to support execution of a plurality of overlying guest operating systems, wherein the plurality of guest operating systems comprise a guest operating system complying with a non-native guest system architecture different from a host system architecture with which the hardware machine complies. The service virtual machine may further comprise a translation layer to translate instructions from the guest operating system complying with the non-native guest system architecture into instructions complying with the host system architecture.
摘要翻译：描述了机器可读介质，方法，装置和系统。在一些实施例中，计算机平台的虚拟机监视器可以包括由虚拟机监视器创建的服务虚拟机，该虚拟机监视器划分底层硬件机器以支持多个重叠的客户操作系统的执行，其中多个客户操作系统包括符合非本地客户机系统架构的客户机操作系统与硬件机器符合的主机系统架构不同。服务虚拟机还可以包括翻译层，以将符合非本地客户系统体系结构的来宾操作系统的指令转换为符合主机系统体系结构的指令。

2. 发明申请

WO2020168536A1 DYNAMICAL SWITHCING BETWEEN EPT AND SHADOW PAGE TABLES FOR RUNTIME PROCESSOR VERIFICATION 审中-公开
公开(公告)号：WO2020168536A1
公开(公告)日：2020-08-27
申请号：PCT/CN2019/075811
申请日：2019-02-22
申请人： INTEL CORPORATION , DONG, Chuanxiao , DONG, Yaozu , WANG, Zhi , LV, Zhiyuan
发明人： DONG, Chuanxiao , DONG, Yaozu , WANG, Zhi , LV, Zhiyuan
IPC分类号： G06F9/445
摘要： Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

3. 发明申请

WO2016082073A1 SUPPORT FOR APPLICATION TRANSPARENT, HIGH AVAILABLE GPU COMPUTING WITH VM CHECKPOINTING 审中-公开
标题翻译：支持应用透明，高可用的GPU计算与VM检查
公开(公告)号：WO2016082073A1
公开(公告)日：2016-06-02
申请号：PCT/CN2014/092028
申请日：2014-11-24
申请人： INTEL CORPORATION , DONG, Yaozu , TIAN, Kun
发明人： DONG, Yaozu , TIAN, Kun
IPC分类号： G06F9/445
CPC分类号： G06F9/45558 , G06F2009/45579 , G06F2009/45583 , G06T1/20 , G06T1/60
摘要： Methods, software, and apparatus for application transparent, high available GPU computing with VM checkpointing. The guest access of certain GPU resources, such as MMIO resources, are trapped to keep a copy of guest context per semantics, and/or emulate the guest access of the resources prior to submission to the GPU, while other commands relating to certain graphics memory address regions are trapped before being passed through to the GPU. The trapped commands are scanned before submission to predict: a) potential to-be-dirtied graphics memory pages, and b) the execution time of intercepted commands, so the next checkpointing can be aligned to a predicted execution time. The GPU internal states are drained by flushing internal context/tlb/cache, at the completion of submitted commands, and then a snapshot of the vGPU state is taken, based on tracked GPU state, GPU context (through GPU-specific commands), detected dirty graphics memory pages and predicted to-be dirtied graphics memory pages.
摘要翻译：方法，软件和设备应用透明，高可用性GPU计算与VM检查点。诸如MMIO资源之类的特定GPU资源的访客访问被困于每个语义保留访客上下文的副本，和/或在提交给GPU之前模拟资源的访客访问，而与某些图形存储器相关的其他命令地址区域在被传递到GPU之前被捕获。被捕获的命令在提交之前被扫描以预测：a）潜在的脏污图形存储器页面，以及b）截取的命令的执行时间，因此下一个检查点可以对准预测的执行时间。在完成提交的命令时，通过刷新内部上下文/ tlb /缓存来排除GPU内部状态，然后基于跟踪的GPU状态，GPU上下文（通过GPU特定的命令），检测到vGPU状态的快照脏图形内存页面和预测的脏图形内存页面。

4. 发明申请

WO2013138977A1 TECHNIQUES FOR PACKET MANAGEMENT IN AN INPUT/OUTPUT VIRTUALIZATION SYSTEM 审中-公开
标题翻译：输入/输出虚拟化系统中的分组管理技术
公开(公告)号：WO2013138977A1
公开(公告)日：2013-09-26
申请号：PCT/CN2012/072532
申请日：2012-03-19
申请人： INTEL CORPORATION , DONG, Yaozu
发明人： DONG, Yaozu
IPC分类号： H04L12/56 , G06F13/00
CPC分类号： H04L45/745 , G06F13/00 , G06F13/385 , G06F13/387 , G06F2213/0026 , G06F2213/0058 , H04L45/586 , H04L45/741 , H04L49/70
摘要： Techniques for managing packets in an input/output virtualization (IOV) capable computing environment are described herein. One aspect comprises receiving, at one or more transceivers comprising an input/output capable adapter, a packet addressed to an input/output virtualization capable adapter destination, and forwarding the packet to a virtual router; applying, by a processor circuit coupled to the one or more transceivers, one or more packet management policies to the packet via the virtual router; routing the packet via the virtual router to the input/output virtualization capable adapter destination; and transmitting the packet to the input/output virtualization capable adapter destination via an input/output virtualization capable adapter architecture. Other embodiments are described and claimed.
摘要翻译：本文描述了在具有输入/输出虚拟化（IOV）能力的计算环境中管理分组的技术。一个方面包括在一个或多个包含输入/输出能力的适配器的收发器处接收寻址到输入/输出虚拟化适配器目的地的分组，以及将分组转发到虚拟路由器; 通过耦合到所述一个或多个收发器的处理器电路经由所述虚拟路由器将一个或多个分组管理策略应用于所述分组; 通过虚拟路由器将数据包路由到具有输入/输出虚拟化能力的适配器目的地; 并通过输入/输出虚拟化能力的适配器架构将分组传输到具有输入/输出虚拟化能力的适配器目的地。描述和要求保护其他实施例。

5. 发明申请

WO2007053980A1 METHOD AND APPARATUS TO SUPPORT VIRTUALIZATION WITH CODE PATCHES 审中-公开
标题翻译：支持虚拟代码的方法和设备
公开(公告)号：WO2007053980A1
公开(公告)日：2007-05-18
申请号：PCT/CN2005/001909
申请日：2005-11-12
申请人： INTEL CORPORATION , DONG, Yaozu
发明人： DONG, Yaozu
IPC分类号： G06F9/455
CPC分类号： G06F9/45533
摘要： A processing system executes an emulation patch for a guest virtual machine (VM) of the processing system. In one embodiment, the emulation patch includes data to facilitate identification of a routine to emulate a guest instruction. After executing the emulation patch for the guest VM, the processing system may use the data to find an emulation routine for emulating the guest instruction. The processing system may transfer control from the guest VM to a virtual machine monitor (VMM) in response to execution of the emulation patch, without saving a trap frame. The VMM may then find and execute the emulation routine for the guest instruction without decoding the guest instruction. A break instruction with an immediate value, for example, may be used for the emulation patch. The immediate value maybe used for finding the emulation routine. Other embodiments are described and claimed.
摘要翻译：处理系统为处理系统的来宾虚拟机（VM）执行仿真补丁。在一个实施例中，仿真补丁包括便于识别用于模拟客户指令的例程的数据。在为客户虚拟机执行仿真补丁之后，处理系统可以使用该数据来找到仿真客户指令的仿真程序。响应于仿真补丁的执行，处理系统可以将控制从客户VM传送到虚拟机监视器（VMM），而不保存陷阱帧。然后，VMM可以找到并执行客户指令的仿真例程，而不对客户指令进行解码。例如，具有立即值的中断指令可用于仿真补丁。即时值可能用于查找仿真程序。描述和要求保护其他实施例。

6. 发明申请

WO2022120790A1 METHODS AND APPARATUS TO MITIGATE LOCKS IN REAL-TIME COMPUTING ENVIRONMENTS 审中-公开
公开(公告)号：WO2022120790A1
公开(公告)日：2022-06-16
申请号：PCT/CN2020/135649
申请日：2020-12-11
申请人： INTEL CORPORATION [US]/[US] , DONG, Yaozu [CN]/[CN] (BZ) , OEHRLEIN, Scott [US]/[US] (BZ) , CHEN, Jie [CN]/[CN] (BZ)
发明人： DONG, Yaozu , OEHRLEIN, Scott , CHEN, Jie
IPC分类号： G06F9/455 , G06F13/16
摘要： Methods, apparatus, systems and articles of manufacture to mitigate locks in real-time computing environments are disclosed. An example method includes detecting an indication of an instruction that will trigger a bus lock within a computing system, causing processing to be paused, emulating the instruction without the bus locking, and resuming the processing.

7. 发明申请

WO2016149935A1 COMPUTING METHODS AND APPARATUSES WITH GRAPHICS AND SYSTEM MEMORY CONFLICT CHECK 审中-公开
标题翻译：计算方法和设备与图形和系统内存冲突检查
公开(公告)号：WO2016149935A1
公开(公告)日：2016-09-29
申请号：PCT/CN2015/075116
申请日：2015-03-26
申请人： INTEL CORPORATION , DONG, Yaozu , WANG, Zhi
发明人： DONG, Yaozu , WANG, Zhi
IPC分类号： G06F9/44
CPC分类号： G06T1/20 , G06F8/427 , G06F8/44 , G06F9/45512 , G06F9/45558 , G06F9/4843 , G06F9/4881 , G06F12/1009 , G06F12/1027 , G06F2009/45583 , G06F2212/302 , G06F2212/657 , G06T1/60 , G06T15/005
摘要： An apparatus may include a graphics processing unit (GPU) and a hypervisor. The hypervisor may include a command parser to parse graphics memory addresses associated with a workload of a virtual machine of the apparatus, and generate a first shadow global graphics translation table (SGGTT) for translating the graphics memory addresses. The hypervisor may further include a GPU scheduler to check conflict between the first SGGTT and a second SGGTT containing graphics memory addresses used by working sets being-executed or to-be-executed by the render engines of the GPU, and schedule the workload of the virtual machine to a render engine when there is no conflict between the first SGGTT and the second SGGTT. Other embodiments may be described and/or claimed.
摘要翻译：一种装置可以包括图形处理单元（GPU）和管理程序。管理程序可以包括用于解析与装置的虚拟机的工作负载相关联的图形存储器地址的命令解析器，并且生成用于转换图形存储器地址的第一阴影全局图形转换表（SGGTT）。管理程序还可以包括GPU调度程序，用于检查第一SGGTT与包含图形存储器地址之间的冲突的图形存储器地址，所述图形存储器地址由正在由GPU的呈现引擎执行或由GPU的渲染引擎执行的工作集使用，并且调度当第一个SGGTT和第二个SGGTT之间没有冲突时，虚拟机到一个渲染引擎。可以描述和/或要求保护其他实施例。

8. 发明申请

WO2016037344A1 MEMORY AND RESOURCE MANAGEMENT IN A VIRTUAL COMPUTING ENVIRONMENT 审中-公开
标题翻译：虚拟计算环境中的记忆和资源管理
公开(公告)号：WO2016037344A1
公开(公告)日：2016-03-17
申请号：PCT/CN2014/086360
申请日：2014-09-12
申请人： INTEL CORPORATION , DONG, Yaozu , TIAN, Kun
发明人： DONG, Yaozu , TIAN, Kun
IPC分类号： G06F9/455
CPC分类号： G06F9/45558 , G06F3/0604 , G06F3/0659 , G06F3/0664 , G06F3/0683 , G06F2009/45583
摘要： Systems and techniques for memory and resource management in a virtual computing environment are disclosed herein. For example, in some embodiments, an apparatus for memory management in a virtual computing environment may include: a storage device; memory page comparison logic, coupled to the storage device, to determine that a first memory page of instructions, stored in the storage device, for a guest machine in the virtual computing environment is identical to a second memory page of instructions, stored in the storage device, for a host machine in the virtual computing environment, wherein the guest machine is hosted by the host machine; and merge logic, coupled to the memory page comparison logic, to, in response to a determination that the first memory page is identical to the second memory page, map the first memory page to the second memory page. Other embodiments may be disclosed and/or claimed.
摘要翻译：本文公开了虚拟计算环境中的存储器和资源管理的系统和技术。例如，在一些实施例中，用于虚拟计算环境中的存储器管理的装置可以包括：存储设备; 存储器页比较逻辑，耦合到所述存储设备，以确定存储在所述存储设备中的用于所述虚拟计算环境中的客机的指令的第一存储器页面与存储在所述存储器中的指令的第二存储器页面相同设备，用于虚拟计算环境中的主机，其中所述客机由所述主机托管; 以及耦合到所述存储器页比较逻辑的合并逻辑，以响应于所述第一存储器页与所述第二存储器页相同的确定，将所述第一存储器页映射到所述第二存储器页。可以公开和/或要求保护其他实施例。

9. 发明申请

WO2013097105A1 EFFICIENT DYNAMIC RANDOMIZING ADDRESS REMAPPING FOR PCM CACHING TO IMPROVE ENDURANCE AND ANTI-ATTACK 审中-公开
标题翻译： PCM缓存的高效动态随机存取地址重新提升耐用性和抗攻击性
公开(公告)号：WO2013097105A1
公开(公告)日：2013-07-04
申请号：PCT/CN2011/084798
申请日：2011-12-28
申请人： INTEL CORPORATION , DONG, Yaozu
发明人： DONG, Yaozu
IPC分类号： G06F12/10
CPC分类号： G06F12/0864 , G06F12/10 , G06F12/1408 , G06F2212/2024
摘要： A method, including monitoring, by a remapping manager, a system state of a computing device for the occurrence of a predefined event, detecting, by the remapping manager, the occurrence of the predefined event, and initiating, by the remapping manager upon the detection of the predefined event, a remapping of first encoded addresses stored in tags, the first encoded addresses are associated with locations in main memory that are cached in a memory cache.
摘要翻译：一种方法，包括由重映射管理器监视用于发生预定义事件的计算设备的系统状态，由重映射管理器检测预定义事件的发生，以及在检测时由重映射管理器启动预定义事件中存储的第一编码地址的重新映射，第一编码地址与主存储器中缓存在存储器高速缓存中的位置相关联。

10. 发明申请

WO2017107059A1 METHOD AND APPARATUS FOR BEST EFFORT QUALITY OF SERVICE (QOS) SCHEDULING IN A GRAPHICS PROCESSING ARCHITECTURE 审中-公开
标题翻译：在图形处理体系结构中用于最佳服务质量（QOS）调度的方法和设备
公开(公告)号：WO2017107059A1
公开(公告)日：2017-06-29
申请号：PCT/CN2015/098296
申请日：2015-12-22
申请人： INTEL CORPORATION , DONG, Yaozu , TIAN, Kun , ZHANG, Tian , ZHANG, Yulei
发明人： DONG, Yaozu , TIAN, Kun , ZHANG, Tian , ZHANG, Yulei
IPC分类号： G05B15/00 , G06F9/38
CPC分类号： G06T1/20 , G06F9/46
摘要： An apparatus and method for best effort quality of service scheduling in a graphics processing architecture. For example, one embodiment of an apparatus comprises: a graphics processing unit (GPU) to perform graphics processing operations for a plurality of guests; a plurality of buffers to store one or more graphics commands associated with each guest to be executed by the GPU; and a scheduler to evaluate commands in the buffers of a first guest to estimate a cost of executing the commands, the scheduler to select all or a subset of the buffers of the first guest for execution on the GPU based on a determination that the selected buffers can be executed by the GPU within a remaining time slice allocated to the first guest.
摘要翻译：图形处理体系结构中用于尽力服务质量调度的设备和方法。例如，装置的一个实施例包括：图形处理单元（GPU），用于对多个访客执行图形处理操作; 多个缓冲器，用于存储与要由GPU执行的每个客人关联的一个或多个图形命令; 以及调度器，用于评估第一客户的缓冲器中的命令以估计执行所述命令的成本，所述调度器基于确定所选择的缓冲器来选择所述第一客户的缓冲器的全部或子集以在所述GPU上执行可以在分配给第一个客人的剩余时间片内由GPU执行。

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