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1. 发明申请

WO2017049592A1 METHOD AND APPARATUS TO IMPROVE SHARED MEMORY EFFICIENCY 审中-公开
标题翻译：提高共享记忆效率的方法和装置
公开(公告)号：WO2017049592A1
公开(公告)日：2017-03-30
申请号：PCT/CN2015/090741
申请日：2015-09-25
申请人： INTEL CORPORATION , DU, Jianghong , JIANG, Yong , SHEN, Lei , LI, Yuanyuan , LI, Ruijia , KONG, Lingyi
发明人： DU, Jianghong , JIANG, Yong , SHEN, Lei , LI, Yuanyuan , LI, Ruijia , KONG, Lingyi
IPC分类号： G06F9/50 , G06F12/08
CPC分类号： G06F9/50 , G06F8/4441 , G06F9/544 , G06F12/08
摘要： Methods and apparatus to improve shared memory efficiency are described. In an embodiment, a first version of a code to access one or more registers as shared local memory is compiled. A second version of the same code is also compiled to access a cache as the shared local memory. The first version of the code is executed in response to comparison of a work group size of the code with a threshold value. Other embodiments are also disclosed and claimed.
摘要翻译：描述了提高共享存储器效率的方法和装置。在一个实施例中，编译访问一个或多个寄存器作为共享本地存储器的代码的第一版本。同样的代码的第二个版本也被编译为访问缓存作为共享本地内存。响应于代码的工作组大小与阈值的比较来执行代码的第一版本。还公开并要求保护其他实施例。

2. 发明申请

WO2016090536A1 APPARATUS AND METHOD TO IMPROVE MEMORY ACCESS PERFORMANCE BETWEEN SHARED LOCAL MEMORY AND SYSTEM GLOBAL MEMORY 审中-公开
标题翻译：提高分享的本地记忆和系统全局记忆之间的记忆访问性能的装置和方法
公开(公告)号：WO2016090536A1
公开(公告)日：2016-06-16
申请号：PCT/CN2014/093297
申请日：2014-12-08
申请人： INTEL CORPORATION , DU, Jianghong , JIANG, Yong , SHEN, Lei , LI, Yuanyuan
发明人： DU, Jianghong , JIANG, Yong , SHEN, Lei , LI, Yuanyuan
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F12/0804 , G06F12/023 , G06F12/0284 , G06F2212/1024 , G06F2212/302
摘要： Described is a machine-readable storage medium having instructions stored thereon, that when executed, cause a processor to perform a method which comprises: grouping two or more work groups to form a super-workgroup; and partitioning a portion of a memory space into one or more super-shared local memories (Super-SLMs), wherein the memory space shared within the super-workgroup forms at least one Super-SLM of the one or more Super-SLMs. Described is an apparatus which comprises: a plurality of execution units; a cache memory having a portion characterized as a SLM which is shared with the plurality of execution units at least one of which is to operate on a work group of a sub-slice, wherein the SLM is shared within the work group; and at least one Super-SLM for providing shared memory accessible by different work groups in the sub-slice, wherein the at least one of the execution units is to operate on the different work groups.
摘要翻译：描述了一种具有存储在其上的指令的机器可读存储介质，当被执行时，使得处理器执行一种方法，该方法包括：分组两个或多个工作组以形成超级工作组; 以及将存储器空间的一部分划分成一个或多个超共享本地存储器（Super-SLM），其中所述超级工作组内共享的存储器空间形成所述一个或多个超级SLM的至少一个超级SLM。描述了一种装置，包括：多个执行单元; 高速缓存存储器，其具有表示为SLM的部分，所述部分与所述多个执行单元共享，所述多个执行单元中的至少一个执行单元要对子片段的工作组进行操作，其中所述SLM在所述工作组内共享; 以及至少一个超级SLM，用于提供由子片中的不同工作组可访问的共享存储器，其中所述执行单元中的至少一个要在不同的工作组上操作。

3. 发明申请

WO2017166269A1 SYSTEM AND METHOD TO ACCELERATE REDUCE OPERATIONS IN GRAPHICS PROCESSOR 审中-公开
标题翻译：系统和方法加速减少图形处理器的操作
公开(公告)号：WO2017166269A1
公开(公告)日：2017-10-05
申请号：PCT/CN2016/078265
申请日：2016-04-01
申请人： INTEL CORPORATION , JIANG, Yong , LI, Yuanyuan , DU, Jianghong , CHEN, Kuilin , TETZLAFF, Thomas A.
发明人： JIANG, Yong , LI, Yuanyuan , DU, Jianghong , CHEN, Kuilin , TETZLAFF, Thomas A.
IPC分类号： G06F17/00
CPC分类号： G06F9/4843 , G06F9/3009 , G06F9/522 , G06T1/20
摘要： Embodiments described herein provide a system, method, and apparatus to accelerate reduce operations in a graphics processor. One embodiment provides an apparatus including one or more processors, the one or more processors including a first logic unit to perform a merged write, barrier, and read operation in response to a barrier synchronization request from a set of threads in a work group, synchronize the set of threads, and report a result of an operation specified in association with the barrier synchronization request.
摘要翻译：这里描述的实施例提供了用于加速图形处理器中的减少操作的系统，方法和装置。一个实施例提供了一种包括一个或多个处理器的设备，所述一个或多个处理器包括第一逻辑单元，用于响应于来自工作组中的一组线程的障碍同步请求，执行合并的写入，屏障和读取操作，线程集合，并报告与屏障同步请求关联指定的操作结果。

4. 发明申请

WO2017049583A1 GPU-CPU TWO-PATH MEMORY COPY 审中-公开
标题翻译： GPU-CPU两路存储器复制
公开(公告)号：WO2017049583A1
公开(公告)日：2017-03-30
申请号：PCT/CN2015/090701
申请日：2015-09-25
申请人： INTEL CORPORATION , KONG, Lingyi , SHEN, Lei , LI, Yuanyuan , YANG, Yuting , LUEH, Guei-Yuan
发明人： KONG, Lingyi , SHEN, Lei , LI, Yuanyuan , YANG, Yuting , LUEH, Guei-Yuan
IPC分类号： G06F13/00
CPC分类号： G06F13/16 , G06T1/60
摘要： Methods and apparatus relating to GPU-CPU (Graphics Processing Unit-Central Processing Unit) two-path memory copy are described. In an embodiment, a Graphics Processing Unit (GPU) copies at least a first portion of a data block from a source to a buffer. The GPU also copies a second portion of the data block from the source to a destination. A Central Processing Unit (CPU) copies the first portion of the data block from the first buffer to one or more corresponding locations in the destination. Other embodiments are also disclosed and claimed.
摘要翻译：描述与GPU-CPU（图形处理单元 - 中央处理单元）双路存储器复制有关的方法和装置。在一个实施例中，图形处理单元（GPU）将数据块的至少第一部分从源复制到缓冲器。 GPU还将数据块的第二部分从源复制到目的地。中央处理单元（CPU）将数据块的第一部分从第一缓冲器复制到目的地中的一个或多个对应位置。还公开并要求保护其他实施例。

5. 发明申请

WO2017107168A1 EVENT-DRIVEN FRAMEWORK FOR GPU PROGRAMMING 审中-公开
标题翻译：事件驱动的GPU编程框架
公开(公告)号：WO2017107168A1
公开(公告)日：2017-06-29
申请号：PCT/CN2015/098830
申请日：2015-12-25
申请人： INTEL CORPORATION , LI, Yuanyuan , YANG, Yuting , JIANG, Yong , WANG, Yao
发明人： LI, Yuanyuan , YANG, Yuting , JIANG, Yong , WANG, Yao
IPC分类号： G06F1/00
CPC分类号： G06F9/44 , G06F9/4411 , G06F9/542
摘要： Methods and apparatus relating to event-driven framework for GPU (Graphics Processing Unit) programming are described. Event-driven logic receives a signal that indicates detection of an event by a device. Memory stores information corresponding to a kernel that is to be associated with the event. The event-driven logic causes a Graphics Processing Unit (GPU) to execute the kernel to process one or more operations in response to the event.
摘要翻译：描述了涉及用于GPU（图形处理单元）编程的事件驱动框架的方法和装置。事件驱动逻辑接收指示设备检测到事件的信号。内存存储与要与事件相关联的内核相对应的信息。事件驱动的逻辑使图形处理单元（GPU）执行内核来处理一个或多个操作来响应该事件。

6. 发明申请

WO2017107118A1 FACILITATING EFFICIENT COMMUNICATION AND DATA PROCESSING ACROSS CLUSTERS OF COMPUTING MACHINES IN HETEROGENEOUS COMPUTING ENVIRONMENT 审中-公开
标题翻译：在异构计算环境中促进计算机集群间高效的通信和数据处理
公开(公告)号：WO2017107118A1
公开(公告)日：2017-06-29
申请号：PCT/CN2015/098634
申请日：2015-12-24
申请人： INTEL CORPORATION , LI, Yuanyuan , JIANG, Yong , KONG, Lingyi
发明人： LI, Yuanyuan , JIANG, Yong , KONG, Lingyi
IPC分类号： G06F9/46
CPC分类号： G06F9/5027 , G06F9/38 , G06T1/00
摘要： A mechanism is described for facilitating efficient communication and data processing across clusters of computing machines in a heterogeneous computing environment. A method includes detecting a request for processing of data using a programming framework and a programming model; facilitating interfacing between the programming framework and the programming model, wherein interfacing includes merging the programming model into the programming framework, wherein interfacing further includes integrating the programming framework with a distribution framework hosting the programming model; and calling on the distribution framework to schedule processing of a plurality of jobs based on the request.
摘要翻译：描述了用于在异构计算环境中促进跨计算机器集群的有效通信和数据处理的机制。一种方法包括使用编程框架和编程模型来检测对数据处理的请求; 促进编程框架和编程模型之间的接口，其中接口连接包括将编程模型合并到编程框架中，其中接口进一步包括将编程框架与托管编程模型的分发框架集成; 并根据请求调用分配框架来安排处理多个作业。

7. 发明申请

WO2023044707A1 METHODS AND APPARATUS TO ACCELERATE CONVOLUTION 审中-公开
公开(公告)号：WO2023044707A1
公开(公告)日：2023-03-30
申请号：PCT/CN2021/120142
申请日：2021-09-24
申请人： INTEL CORPORATION , CREWS, Darren , JIANG, Yong , LI, Yuanyuan , QIAN, Xu , JIANG, Peiqing , HONG, Haiyun
发明人： CREWS, Darren , JIANG, Yong , LI, Yuanyuan , QIAN, Xu , JIANG, Peiqing , HONG, Haiyun
IPC分类号： G06F17/15
摘要： Methods, apparatus, systems, and articles of manufacture are disclosed. An example apparatus includes at least one memory, instructions in the apparatus, and processor circuitry to execute the instructions to detect a pattern of an upsampled input submatrix, generate a transformed input submatrix by selecting four elements of the upsampled input submatrix, select a transformed weight submatrix based on the pattern, and convolve the transformed input submatrix and the transformed weight submatrix.

8. 发明申请

WO2018176435A1 EXECUTION UNIT-SHARED HYBRID TECHNIQUE FOR ACCELERATED COMPUTING ON GRAPHICS PROCESSORS 审中-公开
公开(公告)号：WO2018176435A1
公开(公告)日：2018-10-04
申请号：PCT/CN2017/079194
申请日：2017-04-01
申请人： INTEL CORPORATION , LI, Yuanyuan , JIANG, Yong , YANG, Yuting , YAO, Jiajie , LI, Guizi , LIN, Lixiang
发明人： LI, Yuanyuan , JIANG, Yong , YANG, Yuting , YAO, Jiajie , LI, Guizi , LIN, Lixiang
IPC分类号： G06T1/20
摘要： A mechanism is described for facilitating hybrid processing of workloads for graphics processors in computing devices. As described herein, includes detecting workloads for graphics processor, and checking on status of a shared function unit (SFU) associated with the graphics processor to determine distribution of the workloads between the SFU and an execution unit (EU) associated with the graphics processor.

9. 发明申请

WO2023082278A1 APPARATUS AND METHOD FOR REINFORCEMENT LEARNING BASED POST-TRAINING SPARSIFICATION 审中-公开
公开(公告)号：WO2023082278A1
公开(公告)日：2023-05-19
申请号：PCT/CN2021/130746
申请日：2021-11-15
申请人： INTEL CORPORATION , QIAN, Xu , CREWS, Darren , LI, Yuanyuan
发明人： QIAN, Xu , CREWS, Darren , LI, Yuanyuan
IPC分类号： G06N3/00
摘要： Provided herein are apparatus and methods for reinforcement learning based post-training sparsification. An apparatus includes: a memory; and processor circuitry coupled with the memory, wherein the processor circuitry is to: obtain a first correction parameter indicating a mean shift of a set of weights after sparsification of a model with respect to that before the sparsification of the model; obtain a second correction parameter indicating a variance shift of the set of weights after the sparsification of the model with respect to that before the sparsification of the model; and correct the set of weights at least partially based on the first correction parameter and the second correction parameter, and wherein the memory is to store the corrected set of weights. Other embodiments may also be disclosed and claimed.

10. 发明申请

WO2017112403A1 GRAPHICS PROCESSING UNIT OPERATION 审中-公开
标题翻译：图形处理单元操作
公开(公告)号：WO2017112403A1
公开(公告)日：2017-06-29
申请号：PCT/US2016/065129
申请日：2016-12-06
申请人： INTEL CORPORATION
发明人： LI, Yuanyuan , BAI, Hai , LI, Guizi
IPC分类号： G06F9/50 , G06T1/20
CPC分类号： G06F9/50 , G06T1/20
摘要： A system and method for distributed computing including a compute node having a graphics processing unit (GPU) to execute tasks of a distributed computing job. A distributed-computing programming framework executes the tasks on the compute node. A GPU-daemon process shares GPU resources between the tasks executing on the GPU of the compute node.
摘要翻译：一种用于分布式计算的系统和方法，所述系统和方法包括具有图形处理单元（GPU）以执行分布式计算作业的任务的计算节点。分布式计算编程框架在计算节点上执行任务。 GPU守护进程在计算节点的GPU上执行的任务之间共享GPU资源。

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