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1. 发明申请

WO2015013059A1 FEATURE LICENSING IN A SECURE PROCESSING ENVIRONMENT 审中-公开
标题翻译：安全加工环境中的特征许可
公开(公告)号：WO2015013059A1
公开(公告)日：2015-01-29
申请号：PCT/US2014/046610
申请日：2014-07-15
申请人： INTEL CORPORATION , SCARLATA, Vincent R. , ROZAS, Carlos V. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , ANATI, Ittai , MCKEEN, Francis X. , GOLDSMITH, Michael A.
发明人： SCARLATA, Vincent R. , ROZAS, Carlos V. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , ANATI, Ittai , MCKEEN, Francis X. , GOLDSMITH, Michael A.
IPC分类号： G06F21/00 , G06F9/06
CPC分类号： H04L9/3213 , G06F21/12 , G06F21/53 , H04L9/3263
摘要： Embodiments of an invention for feature licensing in a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to initialize a secure enclave. The execution unit is to execute the instruction. Execution of the instruction includes determining whether a requested feature is licensed for use in the secure enclave.
摘要翻译：公开了在安全处理环境中的特征许可的发明的实施例。在一个实施例中，处理器包括指令单元和执行单元。指令单元将接收初始化安全飞地的指令。执行单元执行指令。指令的执行包括确定所请求的特征是否被许可用于安全飞地。

2. 发明申请

WO2015047789A1 SECURE MEMORY REPARTITIONING 审中-公开
标题翻译：安全记忆重写
公开(公告)号：WO2015047789A1
公开(公告)日：2015-04-02
申请号：PCT/US2014/055807
申请日：2014-09-16
申请人： INTEL CORPORATION , CHHABRA, Siddhartha , SAVAGAONKAR, Uday R. , GOLDSMITH, Michael A. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah M. , MCKEEN, Francis X. , NEIGER, Gilbert , MAKARAM, Raghunandan , ROZAS, Carlos V. , SANTONI, Amy L. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya
发明人： CHHABRA, Siddhartha , SAVAGAONKAR, Uday R. , GOLDSMITH, Michael A. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah M. , MCKEEN, Francis X. , NEIGER, Gilbert , MAKARAM, Raghunandan , ROZAS, Carlos V. , SANTONI, Amy L. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya
IPC分类号： G06F21/79 , G06F12/14
CPC分类号： G06F12/1408 , G06F9/45558 , G06F12/0808 , G06F12/0897 , G06F12/1027 , G06F2009/45587 , G06F2212/1032 , G06F2212/1048 , G06F2212/152
摘要： Secure memory repartitioning technologies are described. A processor includes a processor core and a memory controller coupled between the processor core and main memory. The main memory includes a memory range including a section of convertible pages are convertible to secure pages or non-secure pages. The processor core, in response to a page conversion instruction, is to determine from the instruction a convertible page in the memory range to be converted and convert the convertible page to be at least one of a secure page or a non-secure page. The memory range may also include a hardware reserved section are convertible in response to a section conversion instruction.
摘要翻译：描述了安全的内存重新分区技术。处理器包括耦合在处理器核心和主存储器之间的处理器核心和存储器控制器。主存储器包括一个内存范围，包括可转换页面的一部分可转换为安全页面或非安全页面。响应于页面转换指令的处理器核心是从指令中确定要转换的存储器范围内的可转换页面，并将可转换页面转换为安全页面或非安全页面中的至少一个页面。存储器范围还可以包括可响应于段转换指令而转换的硬件保留部分。

3. 发明申请

WO2006028652A2 COORDINATING IDLE STATE TRANSITIONS IN MULTI-CORE PROCESSORS 审中-公开
标题翻译：协调多核处理器中的空闲状态转换
公开(公告)号：WO2006028652A2
公开(公告)日：2006-03-16
申请号：PCT/US2005/028699
申请日：2005-08-12
申请人： INTEL CORPORATION , NAVEH, Alon , MENDELSON, Avi , ANATI, Ittai , WEISSMANN, Eliezer
发明人： NAVEH, Alon , MENDELSON, Avi , ANATI, Ittai , WEISSMANN, Eliezer
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/3203 , Y02D10/171 , Y02D50/20
摘要： Systems and methods of managing processors provide for detecting a command at a core of a processor having a plurality of cores, where the command requests a transition of the core to an idle state. Power consumption of the core is managed based on the command and an idle state status of each of the plurality of cores.
摘要翻译：管理处理器的系统和方法提供用于检测具有多个核的处理器的核心处的命令，其中命令请求核到空闲状态。基于多个核心中的每一个的命令和空闲状态来管理核心的功耗。

4. 发明申请

WO2018125432A1 PROVISIONING KEYS FOR VIRTUAL MACHINE SECURE ENCLAVES 审中-公开
公开(公告)号：WO2018125432A1
公开(公告)日：2018-07-05
申请号：PCT/US2017/062451
申请日：2017-11-20
申请人： INTEL CORPORATION
发明人： SCARLATA, Vincent, R. , ROZAS, Carlos, V. , JOHNSON, Simon, P. , MCKEEN, Francis, X. , VIJ, Mona , CHAKRABARTI, Somnath , BAKER, Brandon , ANATI, Ittai , ALEXANDROVICH, Ilya
IPC分类号： G06F21/53 , G06F21/62
摘要： A secure migration enclave is provided to identify a launch of a particular virtual machine on a host computing system, where the particular virtual machine is launched to include a secure quoting enclave to perform an attestation of one or more aspects of the virtual machine. A root key for the particular virtual machine is generated using the secure migration enclave hosted on the host computing system for use in association with provisioning the secure quoting enclave with an attestation key to be used in the attestation. The migration enclave registers the root key with a virtual machine registration service.

5. 发明申请

WO2018063719A1 SUPPORTING OVERSUBSCRIPTION OF GUEST ENCLAVE MEMORY PAGES 审中-公开
标题翻译：支持访客留言记录页的过度记录
公开(公告)号：WO2018063719A1
公开(公告)日：2018-04-05
申请号：PCT/US2017/049431
申请日：2017-08-30
申请人： INTEL CORPORATION
发明人： LESLIE-HURD, Rebekah M. , MCKEEN, Francis X. , ROZAS, Carlos V. , NEIGER, Gilbert , MALLICK, Asit K. , ANATI, Ittai , ALEXANDROVICH, Ilya , SHANBHOGUE, Vedvyas , CHAKRABARTI, Somnath
IPC分类号： G06F21/53 , G06F9/455
CPC分类号： G06F3/0631 , G06F3/0604 , G06F3/064 , G06F3/0664 , G06F3/0665 , G06F3/0673 , G06F9/45558 , G06F2009/45583
摘要： Implementations of the disclosure provide for supporting oversubscription of guest enclave memory pages. In one implementation, a processing device comprising a memory controller unit to access a secure enclave and a processor core, operatively coupled to the memory controller unit. The processing device is to identify a target memory page in memory. The target memory page is associated with a secure enclave of a virtual machine (VM). A data structure comprising context information corresponding to the target memory page is received. A state of the target memory page is determined based on the received data structure. The state indicating whether the target memory page is associated with at least one of: a child memory page or a parent memory page of the VM. Thereupon, an instruction to evict the target memory page from the secure enclave is generated based on the determined state.
摘要翻译：本公开的实施方式提供支持访客飞地存储器页面的超额预订。在一个实现中，处理设备包括用于访问安全区域的存储器控制器单元和可操作地耦合到存储器控制器单元的处理器核心。处理设备将识别存储器中的目标存储器页面。目标内存页面与虚拟机（VM）的安全区域相关联。接收包括对应于目标存储器页面的上下文信息的数据结构。目标存储器页面的状态基于接收到的数据结构来确定。指示目标存储器页面是否与VM的子存储器页面或父存储器页面中的至少一个相关联的状态。于是，基于确定的状态产生从安全区域驱逐目标存储器页面的指令。

6. 发明申请

WO2016209547A1 PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO SUPPORT LIVE MIGRATION OF PROTECTED CONTAINERS 审中-公开
标题翻译：处理者，方法，系统和支持保护集装箱移动的指示
公开(公告)号：WO2016209547A1
公开(公告)日：2016-12-29
申请号：PCT/US2016/034519
申请日：2016-05-27
申请人： INTEL CORPORATION
发明人： ROZAS, Carlos V. , VIJ, Mona , LESLIE-HURD, Rebekah M. , ZMUDZINSKI, Krystof C. , CHAKRABARTI, Somnath , MCKEEN, Francis X. , SCARLATA, Vincent R. , JOHNSON, Simon P. , ALEXANDROVICH, Ilya , NEIGER, Gilbert , SHANBHOGUE, Vedvyas , ANATI, Ittai
IPC分类号： H04L29/06 , H04L9/08 , H04L29/08
CPC分类号： G06F12/1408 , G06F9/30145 , G06F21/53 , G06F21/602 , G06F2212/1052
摘要： A processor includes a decode unit to decode an instruction that is to indicate a page of a protected container memory, and a storage location outside of the protected container memory. An execution unit, in response to the instruction, is to ensure that there are no writable references to the page of the protected container memory while it has a write protected state. The execution unit is to encrypt a copy of the page of the protected container memory. The execution unit is to store the encrypted copy of the page to the storage location outside of the protected container memory, after it has been ensured that there are no writable references. The execution unit is to leave the page of the protected container memory in the write protected state, which is also valid and readable, after the encrypted copy has been stored to the storage location.
摘要翻译：处理器包括解码单元，用于解码指示受保护的容器存储器的页面的指令以及受保护的容器存储器之外的存储位置。执行单元响应于该指令，是确保在受保护的容器存储器具有写保护状态时不存在对受保护的容器存储器的页的可写引用。执行单元是加密受保护的容器存储器的页面的副本。在确保没有可写入引用之后，执行单元将页面的加密副本存储到受保护的容器存储器外部的存储位置。执行单元将保护的容器存储器的页面保留在写保护状态中，该保护状态在加密的副本已被存储到存储位置之后也是有效和可读的。

7. 发明申请

WO2015013062A1 MEASURING A SECURE ENCLAVE 审中-公开
标题翻译：测量一个安全的包装
公开(公告)号：WO2015013062A1
公开(公告)日：2015-01-29
申请号：PCT/US2014/046667
申请日：2014-07-15
申请人： INTEL CORPORATION , ROZAS, Carlos V. , ANATI, Ittai , GERZON, Gideon , GUERON, Shay , JOHNSON, Simon P. , MCKEEN, Francis X. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R.
发明人： ROZAS, Carlos V. , ANATI, Ittai , GERZON, Gideon , GUERON, Shay , JOHNSON, Simon P. , MCKEEN, Francis X. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R.
IPC分类号： G06F21/00 , G06F9/06
CPC分类号： H04L9/3239 , G06F9/3004 , G06F12/1441 , G06F21/71 , G06F2221/2111
摘要： Embodiments of an invention for measuring a secure enclave are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first, a second, and a third instruction. The execution unit is to execute the first, the second, and the third instruction. Execution of the first instruction includes initializing a measurement field in a control structure of a secure enclave with an initial value. Execution of the second instruction includes adding a region to the secure enclave. Execution of the third instruction includes measuring a subregion of the region.
摘要翻译：公开了用于测量安全飞地的发明的实施例。在一个实施例中，处理器包括指令单元和执行单元。指令单元将接收第一，第二和第三指令。执行单元执行第一，第二和第三指令。执行第一指令包括初始化具有初始值的安全飞地的控制结构中的测量场。执行第二条指令包括将一个区域添加到安全飞地。执行第三条指令包括测量该区域的一个子区域。

8. 发明申请

WO2017112908A1 INSTRUCTIONS AND LOGIC TO SUSPEND/RESUME MIGRATION OF ENCLAVES IN A SECURE ENCLAVE PAGE CACHE 审中-公开
标题翻译：指示和逻辑在挂起页面缓存中暂停/恢复Enclve的迁移
公开(公告)号：WO2017112908A1
公开(公告)日：2017-06-29
申请号：PCT/US2016/068447
申请日：2016-12-22
申请人： INTEL CORPORATION
发明人： ROZAS, Carlos V. , ALEXANDROVICH, Ilya , NEIGER, Gilbert , MCKEEN, Francis X. , ANATI, Ittai , SHANBHOGUE, Vedvyas , VIJ, Mona , LESLIE-HURD, Rebekah M. , ZMUDZINSKI, Krystof C. , CHAKRABARTI, Somnath , SCARLATA, Vincent R. , JOHNSON, Simon P.
IPC分类号： G06F12/14
CPC分类号： G06F12/1408 , G06F12/0802 , G06F12/1466 , G06F2212/1052 , G06F2212/402 , G06F2212/60 , H04L9/0891 , H04L9/0894 , H04L9/14 , H04L9/32 , H04L9/3226
摘要： Instructions and logic support suspending and resuming migration of enclaves in a secure enclave page cache (EPC). An EPC stores a secure domain control structure (SDCS) in storage accessible by an enclave for a management process, and by a domain of enclaves. A second processor checks if a corresponding version array (VA) page is bound to the SDCS, and if so: increments a version counter in the SDCS for the page, performs an authenticated encryption of the page from the EPC using the version counter in the SDCS, and writes the encrypted page to external memory. A second processor checks if a corresponding VA page is bound to a second SDCS of the second processor, and if so: performs an authenticated decryption of the page using a version counter in the second SDCS, and loads the decrypted page to the EPC in the second processor if authentication passes.
摘要翻译：
指令和逻辑支持暂停和恢复安全区域页面缓存（EPC）中的区域迁移。 EPC将安全域控制结构（SDCS）存储在可由管理进程的飞地访问的存储中，并且通过飞地域来存储。第二个处理器检查相应版本阵列（VA）页面是否绑定到SDCS，如果是：在页面的SDCS中递增版本计数器，使用版本计数器在EPC中使用版本计数器对EPC进行认证加密 SDCS，并将加密的页面写入外部存储器。第二处理器检查相应的VA页面是否绑定到第二处理器的第二SDCS，并且如果是：使用第二SDCS中的版本计数器执行对页面的认证解密，并且将解密的页面加载到EPC中的第二个处理器，如果验证通过。

9. 发明申请

WO2016209476A1 FLUSHING AND RESTORING CORE MEMORY CONTENT TO EXTERNAL MEMORY 审中-公开
标题翻译：将外部存储器的内核存储器的内存清理和恢复
公开(公告)号：WO2016209476A1
公开(公告)日：2016-12-29
申请号：PCT/US2016/033961
申请日：2016-05-24
申请人： INTEL CORPORATION
发明人： GENDLER, Alexander , BERKOVITS, Ariel , MISHAELI, Michael , SHULMAN, Nadav , DESAI, Sameer , REHANA, Shani , ANATI, Ittai , SHAFI, Hisham
IPC分类号： G06F15/78 , G06F1/32 , G06F12/06 , G06F11/20
CPC分类号： G06F1/3287 , G06F12/0804 , G06F12/0868 , G06F12/0888 , G06F12/1433 , G06F2212/1052 , G06F2212/311 , G06F2212/621
摘要： A method and apparatus for flushing and restoring core memory content to and from, respectively, external memory are described. In one embodiment, the apparatus is an integrated circuit comprising a plurality of processor cores, the plurality of process cores including one core having a first memory operable to store data of the one core, the one core to store data from the first memory to a second memory located externally to the processor in response to receipt of a first indication that the one core is to transition from a first low power idle state to a second low power idle state and receipt of a second indication generated externally from the one core indicating that the one core is to store the data from the first memory to the second memory, locations in the second memory at which the data is stored being accessible by the one core and inaccessible by other processor cores in the IC; and a power management controller coupled to the plurality of cores and located outside the plurality of cores.
摘要翻译：描述了分别将外部存储器和/或从外部存储器内核心存储器内容清理和恢复的方法和装置。在一个实施例中，该装置是包括多个处理器核心的集成电路，所述多个处理核心包括一个核心，其具有可操作以存储一个核心数据的第一存储器，所述一个核心将数据从第一存储器存储到响应于接收到一个核心将从第一低功率空闲状态转换到第二低功率空闲状态的第一指示，并且接收到从一个核心外部产生的第二指示，该第二存储器位于处理器的外部，指示该一个核心是将来自第一存储器的数据存储到第二存储器，存储数据的第二存储器中的位置可由一个核心访问，并且IC中的其他处理器核心不可访问; 以及耦合到所述多个核心并位于所述多个核心外部的电力管理控制器。

10. 发明申请

WO2014105159A1 PAGING IN SECURE ENCLAVES 审中-公开
标题翻译：寻找安全的包装
公开(公告)号：WO2014105159A1
公开(公告)日：2014-07-03
申请号：PCT/US2013/047322
申请日：2013-06-24
申请人： INTEL CORPORATION , MCKEEN, Francis X. , GOLDSMITH, Michael A. , HUNTLEY, Barry E. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah , ROZAS, Carlos V. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya , BERENZON, Alex , NEIGER, Gilbert
发明人： MCKEEN, Francis X. , GOLDSMITH, Michael A. , HUNTLEY, Barry E. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah , ROZAS, Carlos V. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya , BERENZON, Alex , NEIGER, Gilbert
IPC分类号： G06F12/14
CPC分类号： G06F12/0804 , G06F9/30047 , G06F12/0875 , G06F12/1408 , G06F2212/1052 , G06F2212/402
摘要： Embodiments of an invention for paging in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction. The execution unit is to execute the first instruction, wherein execution of the first instruction includes evicting a first page from an enclave page cache.
摘要翻译：公开了用于在安全飞行器中寻呼的发明的实施例。在一个实施例中，处理器包括指令单元和执行单元。指令单元接收第一条指令。执行单元执行第一指令，其中第一指令的执行包括从飞地页面缓存中逐出第一页。

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