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1. 发明申请

WO2009049256A3 COMMUNICATION NETWORK WITH SKEW COMPENSATION 审中-公开
标题翻译：通信网络与SkEW补偿
公开(公告)号：WO2009049256A3
公开(公告)日：2009-06-04
申请号：PCT/US2008079645
申请日：2008-10-10
申请人： INFINERA CORP , PERKINS DREW , WELCH DAVID F , CHIANG TING-KUANG , SPRAGUE EDWARD E , KANDAPPAN PARTHIBAN , GRUBB STEPHEN G , PARANJAPE PRASAD
发明人： PERKINS DREW , WELCH DAVID F , CHIANG TING-KUANG , SPRAGUE EDWARD E , KANDAPPAN PARTHIBAN , GRUBB STEPHEN G , PARANJAPE PRASAD
IPC分类号： H04J14/02 , H04B10/20
CPC分类号： H04B10/27 , H04J14/02
摘要： Embodiments of the present invention compensate for skew across a wavelength division multiplexed network. The network is a wavelength division multiplexed optical transport network. The skew compensation can be performed electrically or optically. It can be performed on the transmission side of the network, the receiver side of the network or at any intermediary node on the network.
摘要翻译：本发明的实施例补偿波分复用网络上的偏斜。该网络是波分复用光传输网络。偏斜补偿可以电或光学地执行。它可以在网络的发送侧，网络的接收机侧或网络上的任何中间节点上执行。

2. 发明申请

WO2007005756B1 MODULAR ADAPTATION AND CONFIGURATION OF A NETWORK NODE ARCHITECTURE 审中-公开
标题翻译：网络节点架构的模块化适配和配置
公开(公告)号：WO2007005756B1
公开(公告)日：2007-03-01
申请号：PCT/US2006025851
申请日：2006-06-30
申请人： INFINERA CORP , PERKINS DREW D , CHIANG TING-KUANG , SOSA MARCO E , YIN MARK , SPRAGUE EDWARD E
发明人： PERKINS DREW D , CHIANG TING-KUANG , SOSA MARCO E , YIN MARK , SPRAGUE EDWARD E
IPC分类号： H04L12/56
CPC分类号： H04J14/0201 , H04J14/0219 , H04L49/40 , H04L49/405 , H04L49/45
摘要： The present invention provides a system, apparatus and method for modularly adapting a network node architecture to function in one of a plurality of potential node types. The architecture includes a configurable switching element, integrated optics, and a plurality of modules that allow a "type" of node to be adapted and configured within the base architecture. The module interfaces may be optical or electrical and be used to construct various different types of nodes including regenerators, add/drop nodes, terminal nodes, and multi-way nodes using the same base architecture.
摘要翻译：本发明提供了一种用于模块化地适应网络节点体系结构以在多个潜在节点类型之一起作用的系统，装置和方法。该架构包括可配置的开关元件，集成光学元件和允许在基础架构内适配和配置节点“类型”的多个模块。模块接口可以是光学的或电的，并且可以用于构造各种不同类型的节点，包括再生器，添加/分出节点，终端节点和使用相同基础架构的多路节点。

3. 发明申请

WO2009100386A3 DUAL ASYNCRONOUS MAPPING OF CLIENT SIGNALS OF ARBITRARY RATE 审中-公开
标题翻译：双重异常映射的客户信号的仲裁率
公开(公告)号：WO2009100386A3
公开(公告)日：2009-10-01
申请号：PCT/US2009033472
申请日：2009-02-06
申请人： INFINERA CORP , CHIANG TING-KUANG , SPRAGUE EDWARD E
发明人： CHIANG TING-KUANG , SPRAGUE EDWARD E
IPC分类号： H04J3/16 , H04J3/07
CPC分类号： H04J3/076 , H04J3/1611
摘要： A network may include an ingress node that is configured to receive a client signal having a client rate that is one of a multiple different client rates, asynchronously map the client signal into a first frame of a first rate, asynchronously map the first frame into a second frame of a second rate, and output the second frame on the network; an intermediate node that is configured to receive the second frame, recover the first frame from the second frame, asynchronously map the first frame into a third frame of a third rate, and output the third frame on the network, where the intermediate node does not recover the client signal from the first frame; and an egress node that is configured to receive the third frame, recover the first frame from the third frame, recover the client signal from the first frame, and output the client signal.
摘要翻译：网络可以包括入口节点，其被配置为接收具有作为多个不同客户端速率之一的客户端速率的客户端信号，将客户端信号异步地映射到第一速率的第一帧，将第一帧异步地映射到第二帧的第二帧，并且在网络上输出第二帧; 被配置为接收第二帧的中间节点，从第二帧恢复第一帧，将第一帧异步映射到第三帧的第三帧，并且输出网络上的第三帧，其中中间节点不从第一帧恢复客户端信号; 以及被配置为接收第三帧的出口节点，从第三帧恢复第一帧，从第一帧恢复客户端信号，并输出客户信号。

4. 发明专利

CA2612169A1 MODULAR ADAPTATION AND CONFIGURATION OF A NETWORK NODE ARCHITECTURE 未知
公开(公告)号：CA2612169A1
公开(公告)日：2007-01-11
申请号：CA2612169
申请日：2006-06-30
申请人： CHIANG TING-KUANG , INFINERA CORP , SOSA MARCO E , PERKINS DREW D , SPRAGUE EDWARD , YIN MARK
发明人： CHIANG TING-KUANG , SOSA MARCO E , PERKINS DREW D , SPRAGUE EDWARD E , YIN MARK
IPC分类号： H04L12/56
摘要： The present invention provides a system, apparatus and method for modularly adapting a network node architecture to function in one of a plurality of potential node types. The architecture includes a configurable switching element, integrated optics, and a plurality of modules that allow a "type" o f node to be adapted and configured within the base architecture. The module interfaces may be optical or electrical and be used to construct various different types of nodes including regenerators, add/drop nodes, terminal nodes, and multi-way nodes using the same base architecture.

5. 发明专利

CA2612431A1 RECOVERY OF CLIENT CLOCK WITHOUT JITTER 未知
公开(公告)号：CA2612431A1
公开(公告)日：2007-01-11
申请号：CA2612431
申请日：2006-06-27
申请人： INFINERA CORP , CHIANG TING-KUANG , YOUNG SCOTT A
发明人： CHIANG TING-KUANG , YOUNG SCOTT A
IPC分类号： H03L7/081
摘要： The present invention provides a system, apparatus and method for recovering a client signal clock. The present invention is able to more effectively remov e jitter within a clock signal by providing a phase shifting element in the feedback of a PLL system to compensate for sudden changes in an input reference clock. The PLL system provides flexible clock recovery so that it can accommodate various payload types because it extracts a client clock signal independent of a corresponding justification count number.

6. 发明申请

WO2009086328A3 CHANNEL SKEW IDENTIFICATION AND NOTIFICATION 审中-公开
标题翻译：频道识别和通知
公开(公告)号：WO2009086328A3
公开(公告)日：2010-01-14
申请号：PCT/US2008088067
申请日：2008-12-22
申请人： INFINERA CORP
发明人： CHIANG TING-KUANG , PARANJAPE PRASAD , JARCHI MICHAEL D , CHILLAL MILLIKARJUN
IPC分类号： H04L25/14
CPC分类号： H04L25/14
摘要： Embodiments of the present invention analyze a plurality of parallel channels and identify specific channel(s) that have skew outside of an acceptable skew error margin. In certain embodiments, this skew is identified by determining the timing misalignment between a channel under test and a deskew channel. Other channels within the plurality of channels are masked by transmitting a repeating masked bit pattern. This timing misalignment may be measured by comparing a segment within the channel under test to a corresponding segment within the deskew channel and identifying a time differential between the two segments.
摘要翻译：本发明的实施例分析多个并行信道并且识别在可接受的偏移误差容限之外具有偏斜的特定信道。在某些实施例中，通过确定被测信道和歪斜通道之间的定时偏移来识别该偏斜。通过发送重复的屏蔽位模式来掩蔽多个通道内的其它通道。该定时未对准可以通过将被测通道内的段与对照段通信相比较，并且识别两段之间的时间差来测量。

7. 发明专利

CA2463545C AN OPTICAL SIGNAL RECEIVER PHOTONIC INTEGRATED CIRCUIT (RXPIC), AN ASSOCIATED OPTICAL SIGNAL TRANSMITTER PHOTONIC INTEGRATED CIRCUIT (TXPIC) AND AN OPTICAL TRANSPORT NETWORK UTILIZING THESE CIRCUITS 未知
公开(公告)号：CA2463545C
公开(公告)日：2010-12-14
申请号：CA2463545
申请日：2002-10-08
申请人： INFINERA CORP
发明人： WELCH DAVID F , NAGARAJAN RADHAKRISHNAN L , KISH FRED A JR , MISSEY MARK J , DOMINIC VINCENT G , MATHUR ATUL , PETERS FRANK H , JOYNER CHARLES H , SCHNEIDER RICHARD P , CHIANG TING-KUANG
IPC分类号： G02B6/43 , G02B6/12 , G02B6/34 , H01S5/026 , H01S5/40 , H01S5/50 , H04B10/291 , H04B10/67 , H04B10/69 , H04J14/02
摘要： Photonic integrated circuits (PICs), also referred to as opto-electronic integrated circuits (OEICs), and more particularly to a PIC in the form of an optical receiver PIC or RxPIC chip and an optical transmitter PIC (TxPIC) are employed in an optical transport network. Integrated on the RxPIC chip, starting at the input end which is coupled to receive multiplexed optical data signals from an optical transport network is an optical amplifier, an optical demultiplexer, and a plurality of on-chip photodiodes (PDs) each to receive a demultiplexed data signal from the AWG DEMUX for optical-to-electrical signal conversion. The optical input amplifier may be an on-chip gain clamped semiconductor optical amplifier (GC-SOA) or an off-chip fiber amplifier. The optical input amplifier may be optional if the channel signal demultiplexer provides for minimal insertion loss which is optimum with a properly designed arrayed waveguide grating (AWG) demultiplexer.

8. 发明专利

CA2462178C TRANSMITTER PHOTONIC INTEGRATED CIRCUIT (TXPIC) CHIPS 未知
公开(公告)号：CA2462178C
公开(公告)日：2012-04-03
申请号：CA2462178
申请日：2002-12-11
申请人： INFINERA CORP
发明人： WELCH DAVID F , DOMINIC VINCENT G , KISH FRED A JR , MISSEY MARK J , NAGARAJAN RADHAKRISHNAN L , MATHUR ATUL , PETERS FRANK H , TAYLOR ROBERT B , MITCHELL MATTHEW L , NILSSON ALAN C , GRUBB STEPHEN G , SCHNEIDER RICHARD P , JOYNER CHARLES H , NGUYEN VINH D , PAVINSKI DONALD J JR , WEBJORN JONAS , CHIANG TING-KUANG , GRENCAVICH ROBERT , SOSA MARCO E
IPC分类号： H01S5/026 , H01S5/0625 , H01S5/0683 , H01S5/10 , H01S5/12 , H01S5/40 , H04B10/145
摘要： A photonic integrated circuit (PIC) chip comprising an array of modulated sources, each providing a modulated signal output at a channel wavelength different from the channel wavelength of other modulated sources and a wavelength selective combiner having an input optically coupled to received all the signal outputs from the modulated sources and provide a combined output signal on an output waveguide from the chip. The modulated sources, combiner and output waveguide are all integrated on the same chip.

9. 发明专利

CA2612431C RECOVERY OF CLIENT CLOCK WITHOUT JITTER 未知
公开(公告)号：CA2612431C
公开(公告)日：2015-02-17
申请号：CA2612431
申请日：2006-06-27
申请人： INFINERA CORP
发明人： CHIANG TING-KUANG , YOUNG SCOTT A
IPC分类号： H03L7/081
摘要： The present invention provides a system, apparatus and method for recovering a client signal clock. The present invention is able to more effectively remove jitter within a clock signal by providing a phase shifting element in the feedback of a PLL system to compensate for sudden changes in an input reference clock. The PLL system provides flexible clock recovery so that it can accommodate various payload types because it extracts a client clock signal independent of a corresponding justification count number.

10. 发明专利

AT545254T 未知
公开(公告)号：AT545254T
公开(公告)日：2012-02-15
申请号：AT08867677
申请日：2008-12-22
申请人： INFINERA CORP
发明人： CHIANG TING-KUANG , PARANJAPE PRASAD , JARCHI MICHAEL , CHILLAL MILLIKARJUN
IPC分类号： H04L25/14

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