会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明公开
    • METHOD FOR PREVENTING VERTICAL AND LATERAL INHOMOGENEITIES WHEN ETCHING THROUGH-SILICON VIAS
    • 通过硅通孔蚀刻时预防垂直和横向不均匀性的方法
    • EP3306654A1
    • 2018-04-11
    • EP17193221.3
    • 2017-09-26
    • IHP GmbH - Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik
    • WIETSTRUCK, MatthiasKAYNAK, MehmetKULSE, PhilipLISKER, MarcoMARSCHMEYER, SteffenWOLANSKY, Dirk
    • H01L21/768H01L23/48
    • A method for producing a semiconductor device, comprising the steps of: providing a silicon wafer having a plurality of raised portions of equal height on a first surface of the silicon wafer as a placeholder for through-silicon vias; depositing an etch stop layer on the first surface of the silicon wafer; planarizing a surface of the etch stop layer; permanently bonding a first carrier wafer on the surface of the etch stop layer; producing components on or in a second surface of the silicon wafer in a front-end-of-line process; etching a plurality of trenches into the silicon wafer using a masked etching process, proceeding from the second surface of the silicon wafer, each trench being formed at the respective location of one raised portion of the plurality of raised portions; depositing side wall insulation layers made of insulating material on side walls of the trenches; forming through-silicon vias by filling the trenches with electrically conductive material; producing a conductor path stack in a back-end-of-line process for contacting the active components on the second surface of the silicon wafer; temporarily bonding a second carrier wafer onto a surface of the conductor path stack; removing the first carrier wafer and exposing the through-silicon vias by partially removing the etch stop layer.
    • 一种制造半导体器件的方法,包括以下步骤:在硅晶片的第一表面上提供具有相同高度的多个凸起部分的硅晶片作为硅通孔的占位符; 在硅晶片的第一表面上沉积蚀刻停止层; 平坦化蚀刻停止层的表面; 将第一载体晶片永久地结合在所述蚀刻停止层的表面上; 在线前处理中在硅晶片的第二表面上或其中生产组件; 使用掩模蚀刻工艺将多个沟槽蚀刻到硅晶片中,从硅晶片的第二表面开始,每个沟槽形成在多个凸起部分的一个凸起部分的相应位置处; 在沟槽的侧壁上沉积由绝缘材料制成的侧壁绝缘层; 通过用导电材料填充沟槽来形成硅通孔; 在后端处理工艺中产生导体路径堆叠,用于接触硅晶片的第二表面上的有源部件; 将第二载体晶片暂时接合到所述导体路径堆叠的表面上; 通过部分地去除所述蚀刻停止层来去除所述第一载体晶片并且暴露所述硅通孔。