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    • 8. 发明专利
    • Estimation of level-thresholds for memory cells
    • GB2518632A
    • 2015-04-01
    • GB201317081
    • 2013-09-26
    • IBM
    • MITTELHOLZER THOMASPAPANDREOU NIKOLAOSPOZIDIS CHARALAMPOS
    • G11C11/56G06F11/10G11C13/00G11C16/34
    • Methods (figure 4) and apparatus 6 for determining level thresholds for q-level memory cells, or multi level cells (MLC). A plurality of the memory cells are read to obtain respective read signal components (20, figure 4). The read signal components are processed by means of a vector generator 10 in dependence on signal level to produce a signal level vector, comprising a series of elements, indicative of the distribution of read signal components in order of signal level. Signal level binning of the read signal components may also be carried out. The signal level vector is scanned 11 with a sliding window of length greater than the spacing of successive window positions in the scan. At each window position, a metric Mi is calculated in dependence on the elements of the signal level vector in the window. A level-threshold for successive memory cell levels is then determined in a threshold identifier 12, in dependence on the variation of the metric, over the scan. At each window position a reference may be determined based on the average or mean of the elements. The metric may then be calculated from the difference between each element value and the reference value (24 figure 4). The system may comprise phase change memory cells or flash memory cells. The level thresholds are determined from the largest local maxima in the metric variation over the scan (figure 5). The memory cells may be encoded so as to store qary symbols of N-symbol codewords.
    • 9. 发明专利
    • Method and apparatus for read measurement of a plurality of resistive memory cells
    • GB2510339A
    • 2014-08-06
    • GB201301621
    • 2013-01-30
    • IBM
    • PAPANDREOU NIKOLAOSPOZIDIS CHARALAMPOSSEBASTIAN ABU
    • G11C13/00G11C11/56
    • A method and apparatus for read measurement or data sensing a plurality N of resistive memory cells, having a plurality K of programmable levels (figures 2-4), including applying a first read voltage to each of the N memory cells and measuring a first read current, (101 figure 1). A further step (102 figure 1) is executed to determine a respective second read voltage based on the first read current measured at the memory cell and a target read current determined for the memory cell for each of the N memory cells. A subsequent step (103 figure 1) involves applying the respective determined second read voltage to the memory cell for obtaining a second read current for each of the N memory cells. The second read voltage may be determined such that the second read current is constant for all memory cells programmed with the same level or may have one respective target current for each of the K programmed levels. The target currents may be determined as the level means of the first read currents, as blind estimations or may involve the use of a number of identical reference cells. The method may also include data mapping of read currents to the respective cells. The apparatus for measurement includes a voltage generator 13 for applying a bias to the bit line connected to the resistive memory, a current detector 14 for measuring the current through the resistive memory device 11 and a measurement controller 15 all of which may be computerised.