会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明申请
    • DISPLAY DEVICE HAVING MULTIPLE IMAGE DISPLAY UNITS
    • 具有多个图像显示单元的显示设备
    • US20080036692A1
    • 2008-02-14
    • US11875077
    • 2007-10-19
    • Young-Nam YUNHyung-Don NA
    • Young-Nam YUNHyung-Don NA
    • G09G5/00
    • G02F1/13452G02F2001/133342G06F3/1423G09G3/3611G09G3/3648G09G2300/0426G09G2310/0278
    • A display device includes a main display unit for displaying main images by processing main image data in response to main gate signals, a sub display unit for displaying sub images by processing sub image data in response to sub gate signals, a connection part for connecting the main and sub display units, a driver for providing the main image data and the main gate signals to the main display unit and the sub image data and the sub gate signals to the sub display unit, first connection lines disposed between the driver and the sub display unit to transfer the sub gate signals to the sub display unit, second connection lines disposed between the driver and the sub display unit to transfer the sub image data to the sub display unit, and a dummy line disposed between the first connection lines and an image display region of the main display unit.
    • 显示装置包括:主显示单元,用于响应于主门信号处理主图像数据来显示主图像;子显示单元,用于通过响应于子门信号处理子图像数据来显示子图像;连接部分, 主显示单元和副显示单元,用于将主图像数据和主门信号提供给主显示单元的驱动器,副图像数据和子门信号提供给子显示单元,设置在驱动器和子单元之间的第一连接线 显示单元,用于将子门信号传送到副显示单元,设置在驱动器和子显示单元之间的第二连接线将子图像数据传送到副显示单元,以及设置在第一连接线和第一连接线之间的虚线 主显示单元的图像显示区域。
    • 4. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD OF THE SAME
    • 薄膜晶体管阵列及其制造方法
    • US20090278128A1
    • 2009-11-12
    • US12421095
    • 2009-04-09
    • Seok-Je SEONGYoon-Seok CHOIHyung-Don NA
    • Seok-Je SEONGYoon-Seok CHOIHyung-Don NA
    • H01L33/00H01L21/336
    • H01L27/124H01L27/1214H01L27/1288
    • A thin film transistor array panel includes a substrate; a gate electrode formed on the substrate; a data line formed on the substrate; a gate insulating layer formed on the data line and the gate electrode, and having a first contact hole exposing the gate electrode, and a second contact hole exposing the data line; a gate line intersecting the data line, and connected to the gate electrode through the first contact hole; a semiconductor formed the gate insulating layer, and including a channel of a thin film transistor; a source electrode connected to the data line through the second contact hole; a drain electrode opposite to the source electrode with respect to the channel on the semiconductor; a passivation layer having a third contact hole exposing the drain electrode; and a pixel electrode connected to the drain electrode through the third contact hole are included.
    • 薄膜晶体管阵列面板包括基板; 形成在所述基板上的栅电极; 形成在所述基板上的数据线; 栅极绝缘层,形成在数据线和栅电极上,并具有暴露栅电极的第一接触孔和暴露数据线的第二接触孔; 与数据线相交的栅极线,并通过第一接触孔连接到栅电极; 半导体形成栅极绝缘层,并且包括薄膜晶体管的沟道; 源电极,通过第二接触孔连接到数据线; 相对于半导体上的沟道与源电极相对的漏电极; 钝化层,具有暴露所述漏电极的第三接触孔; 并且包括通过第三接触孔连接到漏电极的像素电极。