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    • 5. 发明申请
    • Parallel structure NTSC rejection filter and filtering method
    • 并联结构NTSC抑制滤波器和滤波方法
    • US20050012865A1
    • 2005-01-20
    • US10846390
    • 2004-05-13
    • Min-Ho KimDong-Seog HanBeom-Kon Kim
    • Min-Ho KimDong-Seog HanBeom-Kon Kim
    • H04N7/015H04L25/06H04N5/21H04N5/44H04L25/08
    • H04L25/061H04N5/21H04N5/4401H04N21/42607
    • Method and apparatus for use with digital television receivers are included among the embodiments. In exemplary systems, components of an interfering analog television signal (e.g., an NTSC signal) in the same channel as a DTV signal are separately estimated and canceled from the DTV signal. For instance, separate frequency shifters produce shifted versions of the DTV signal, each shifter placing one interfering NTSC carrier signal at or near DC. A DC detector detects the NTSC carrier strength for each carrier, and carrier cancellation signals are synthesized based on these measured carrier strengths. This rejection filter is simpler than prior art filters that require phase-lock on the interfering carriers, and also allows the filter to operate when phase-lock on interfering carriers is difficult to obtain. Other embodiments are described and claimed.
    • 在实施例中包括用于数字电视接收机的方法和装置。 在示例性系统中,与DTV信号相同信道中的干扰模拟电视信号(例如,NTSC信号)的组件被分别估计并从DTV信号中消除。 例如,分离的移频器产生DTV信号的移位版本,每个移位器在DC附近或附近放置一个干扰NTSC载波信号。 DC检测器检测每个载波的NTSC载波强度,并且基于这些测量的载波强度来合成载波消除信号。 该抑制滤波器比现有技术的滤波器要简单,这些滤波器需要在干扰载波上进行相位锁定,并且还允许滤波器在难以获得干扰载波上的相位锁定时工作。 描述和要求保护其他实施例。
    • 6. 发明授权
    • Digital carrier wave restoring device and method for use in a television
signal receiver
    • 数字载波恢复装置及其在电视信号接收机中的应用
    • US5809088A
    • 1998-09-15
    • US679265
    • 1996-07-12
    • Dong-Seog Han
    • Dong-Seog Han
    • H04L27/06H04N5/44H04N5/455H04N7/025
    • H04L27/066
    • A digital carrier wave restoring device for use in a telecommunication receiving system which utilizes a pilot signal: frequency-converts an output signal of a filter to a digital signal processing frequency band; phase-splits the digital signal to output a first I signal and a first Q signal; low-pass filters and phase-splits the digital signal to output a second I signal and a second Q signal; mixes the first I signal and the first Q signal with a fixed local oscillation frequency to output a first I signal and a first Q signal of a baseband; mixes the second I signal and the second Q signal with the fixed local oscillation frequency to output a second I signal and a second Q signal of a baseband; and detects a frequency error and a phase error to generate an error correction value for correcting the frequency error and the phase error, and for applying to a tuning unit a second tuning frequency which is obtained by adding a preliminary correction frequency value to the error correction value, to thereby cause the tuning unit to correct a first tuning frequency.
    • 一种在电信接收系统中使用的数字载波恢复装置,其利用导频信号:将滤波器的输出信号频率转换为数字信号处理频带; 相位分离数字信号以输出第一I信号和第一Q信号; 低通滤波器并相分离数字信号以输出第二I信号和第二Q信号; 将第一I信号和第一Q信号与固定的本地振荡频率混合,以输出基带的第一I信号和第一Q信号; 将第二I信号和第二Q信号与固定的本地振荡频率混合,以输出基带的第二I信号和第二Q信号; 并且检测频率误差和相位误差,以产生用于校正频率误差和相位误差的误差校正值,并且向调谐单元施加通过将初步校正频率值与误差校正相加而获得的第二调谐频率 值,从而使调谐单元校正第一调谐频率。
    • 7. 发明授权
    • Apparatus and method for controlling operation of a high defination
television adaptive equalizer
    • 用于控制高清电视自适应均衡器的操作的装置和方法
    • US5661528A
    • 1997-08-26
    • US476023
    • 1995-06-07
    • Dong-Seog Han
    • Dong-Seog Han
    • H04L25/03H04N5/21H04N5/44H04N5/455
    • H04N5/211H04L25/03038H04N5/4401H04L2025/03662
    • An adaptive equalizer for use in a high definition television (HDTV) receiver, which includes a filtering device having a first filter for FIR (Finite Impulse Response) filtering by receiving a real signal and a real coefficient for output from the filtering device, a second filter for FIR filtering by receiving the real signal and an imaginary coefficient, a third filter for FIR filtering by receiving the real coefficient and an imaginary signal, and a fourth filter for FIR filtering by receiving the imaginary signal and the imaginary coefficient. The adaptive equalizer also includes an adding device having a first adder and a second adder, the first adder subtracting the second filter output from the first filter output in the filtering device, and the second adder adding the outputs of the third and fourth filters. Further, the adaptive equalizer includes an equalization coefficient calculation and downloading device for calculating an equalization coefficient according to the outputs of real and imaginary parts from the first and second adders in the adder to thereby provide the real coefficient and the imaginary coefficient.
    • 一种用于高分辨率电视(HDTV)接收机的自适应均衡器,其包括具有通过接收实信号的FIR(有限脉冲响应)滤波的第一滤波器和用于从滤波装置输出的实系数的滤波装置,第二 滤波器,用于通过接收实际信号和虚数系数进行FIR滤波,通过接收实系数和虚信号进行FIR滤波的第三滤波器,以及通过接收虚信号和虚系数的FIR滤波的第四滤波器。 自适应均衡器还包括具有第一加法器和第二加法器的加法器件,第一加法器减去从滤波器件中的第一滤波器输出输出的第二滤波器,第二加法器将第三和第四滤波器的输出相加。 此外,自适应均衡器包括均衡系数计算和下载装置,用于根据加法器中的第一和第二加法器的实部和虚部的输出来计算均衡系数,从而提供实数系数和虚数系数。
    • 8. 发明授权
    • Parallel structure NTSC rejection filter and filtering method
    • 并联结构NTSC抑制滤波器和滤波方法
    • US07218357B2
    • 2007-05-15
    • US10846390
    • 2004-05-13
    • Min-Ho KimDong-Seog HanBeom-Kon Kim
    • Min-Ho KimDong-Seog HanBeom-Kon Kim
    • H04N5/21
    • H04L25/061H04N5/21H04N5/4401H04N21/42607
    • Method and apparatus for use with digital television receivers are included among the embodiments. In exemplary systems, components of an interfering analog television signal (e.g., an NTSC signal) in the same channel as a DTV signal are separately estimated and canceled from the DTV signal. For instance, separate frequency shifters produce shifted versions of the DTV signal, each shifter placing one interfering NTSC carrier signal at or near DC. A DC detector detects the NTSC carrier strength for each carrier, and carrier cancellation signals are synthesized based on these measured carrier strengths. This rejection filter is simpler than prior art filters that require phase-lock on the interfering carriers, and also allows the filter to operate when phase-lock on interfering carriers is difficult to obtain. Other embodiments are described and claimed.
    • 在实施例中包括用于数字电视接收机的方法和装置。 在示例性系统中,与DTV信号相同信道中的干扰模拟电视信号(例如,NTSC信号)的组件被分别估计并从DTV信号中消除。 例如,分离的移频器产生DTV信号的移位版本,每个移位器在DC附近或附近放置一个干扰NTSC载波信号。 DC检测器检测每个载波的NTSC载波强度,并且基于这些测量的载波强度来合成载波消除信号。 该抑制滤波器比现有技术的滤波器要简单,这些滤波器需要在干扰载波上进行相位锁定,并且还允许滤波器在难以获得干扰载波上的相位锁定时工作。 描述和要求保护其他实施例。
    • 9. 发明授权
    • Method and circuit for detecting data segment synchronizing signal in
high-definition television
    • 高分辨率电视数据段同步信号检测方法及电路
    • US6014416A
    • 2000-01-11
    • US877238
    • 1997-06-17
    • Hyun-Soo ShinDong-Seog Han
    • Hyun-Soo ShinDong-Seog Han
    • H04L7/04H04N5/08H04N5/44H04N7/015H04L7/00
    • H04L7/044H04L7/042H04N5/08H04N5/4401H04N7/015
    • A data segment synchronizing signal detecting circuit for reducing bit resolution of an HDTV without affecting its function. The apparatus includes a hard limiter added between a four-symbol correlator and an adder, to obtain a 2-bit output of three-level values for a four-bit input. The circuit may also include a first symbol delay for delaying an output of a symbol correlator by a factor N corresponding to a number of symbols of one segment, a first adder for adding the value delayed by the first symbol delay and the output of the symbol correlator, and accumulating the added result, a first maximum value location detector for detecting a first location of a first maximum value of the added result accumulated in the first adder, a second symbol delay for delaying the output of the symbol correlator by (one segment symbol)/N, according to the first maximum value detected by the first maximum value location detector, a second adder for adding the value delayed by the second symbol delay and the output of the symbol correlator, and accumulating the added result, a second maximum value location detector for detecting a second location of a second maximum value of the added result accumulated in the second adder, and a synchronizing signal generator for generating a segment synchronizing signal, according to an output of the second maximum value location detector.
    • 一种用于降低HDTV的比特分辨率而不影响其功能的数据段同步信号检测电路。 该装置包括在四符号相关器和加法器之间添加的硬限幅器,以获得用于四位输入的三电平值的2位输出。 电路还可以包括用于将符号相关器的输出延迟与一个段的符号数相对应的因子N的第一符号延迟,用于将延迟了第一符号延迟的值与符号的输出相加的第一加法器 相关器,并且累积相加结果;第一最大值位置检测器,用于检测累加在第一加法器中的相加结果的第一最大值的第一位置,用于将符号相关器的输出延迟的第二符号延迟(一段 符号)N,根据由第一最大值位置检测器检测到的第一最大值,第二加法器,用于将延迟了第二符号延迟的值与符号相关器的输出相加,并累加相加结果,第二最大值 值位置检测器,用于检测累加在第二加法器中的相加结果的第二最大值的第二位置;以及同步信号发生器,用于产生为 根据第二最大值位置检测器的输出,提供同步信号。