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1. 发明专利

JP2005086195A Silicon wafer and method of fabricating the same 有权
标题翻译：硅晶片及其制造方法
公开(公告)号：JP2005086195A
公开(公告)日：2005-03-31
申请号：JP2003424487
申请日：2003-12-22
申请人： Hynix Semiconductor Inc , Siltron Inc , シルトロンインク , 株式会社ハイニックスセミコンダクター
发明人： MUN YOUNG HEE , KIM GUN , KOH CHUNG GEUN , PYI SEUNG HO
IPC分类号： C30B29/06 , H01L21/00 , H01L21/02 , H01L21/322 , H01L21/324
CPC分类号： H01L21/324 , H01L21/3225
摘要： PROBLEM TO BE SOLVED: To provide a silicon wafer and a method of fabricating the same, in which an ideal device active zone is formed from a surface of a wafer to a fixed depth, and an oxygen sludge and a bulk stacking fault have a constant density to the direction of the depth in the internal region (bulk region) of the wafer. SOLUTION: The silicon wafer has a front face, a rear face, a marginal edge portion and a region in between the front face and the rear face. The silicon wafer is comprised of a first DZ formed from the front face of the wafer to a predetermined depth, a second DZ formed from the rear face of the wafer to the predetermined depth, and the bulk region formed between the first DZ and the second DZ, in which the density profile of the fault is kept at a constant distribution from the front face of the wafer to the direction of the rear face. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种硅晶片及其制造方法，其中从晶片表面到固定深度形成理想的器件活性区，以及氧污泥和块体堆垛层错对晶片的内部区域（体积区域）的深度方向具有恒定的密度。解决方案：硅晶片具有前表面，后表面，边缘部分以及前表面和后表面之间的区域。硅晶片由从晶片的前表面形成到预定深度的第一DZ，从晶片的后表面形成到预定深度的第二DZ，以及形成在第一DZ和第二DZ之间的主体区域 DZ，其中故障的密度分布保持从晶片的前表面到后表面的方向上的恒定分布。版权所有（C）2005，JPO＆NCIPI

2. 发明公开

KR20070090627A ANALYSING METHOD FOR DEFECT OF WAFER 审中-公开
标题翻译： WAFER缺陷分析方法
公开(公告)号：KR20070090627A
公开(公告)日：2007-09-06
申请号：KR20060020564
申请日：2006-03-03
申请人： HYNIX SEMICONDUCTOR INC
发明人： KOH CHUNG GEUN
IPC分类号： H01L21/66
CPC分类号： H01L22/12 , H01L21/30604
摘要： A method for analyzing a defect of a wafer is provided to measure a depth of a pin mark which is induced on a rear surface of the wafer due to an RTP process, through a selective etching process. A wafer subjected to an RTP(Rapid Thermal Processing) process is prepared and the wafer is annealed. A surface of the wafer is wet-etched until a defect caused by a pin is exposed, in which a defect region is etched at an etching rate faster than that of other portions. An etching thickness of the wafer is calculated to measure a depth of the defect due to the pin.
摘要翻译：提供了一种用于分析晶片缺陷的方法，以通过选择性蚀刻工艺来测量由于RTP工艺而在晶片的后表面上感应的针标的深度。制备经受RTP（快速热处理）工艺的晶片，并将晶片退火。湿式蚀刻晶片的表面，直到由引脚引起的缺陷暴露，其中以比其它部分更快的蚀刻速率蚀刻缺陷区域。计算晶片的蚀刻厚度以测量由于引脚引起的缺陷的深度。

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