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1. 发明申请

US20070138951A1 Photo sensor and organic light-emitting display using the same 有权
标题翻译：照片传感器和有机发光显示器使用相同
公开(公告)号：US20070138951A1
公开(公告)日：2007-06-21
申请号：US11641842
申请日：2006-12-20
申请人： Hye Park , Byoung Choi , Sun Yang , Youn Oh , Eun Lee , Won Kang
发明人： Hye Park , Byoung Choi , Sun Yang , Youn Oh , Eun Lee , Won Kang
IPC分类号： H01J1/62 , H01J63/04
CPC分类号： H01L27/144 , H01L27/3269 , H01L31/145 , H01L31/153 , H01L31/1872 , Y02E10/50 , Y02P70/521
摘要： An organic light-emitting display includes a substrate, a thin film transistor on the substrate, an organic light-emitting diode electrically connected to the thin film transistor, and a photo sensor having a plurality of photo diodes connected to one another in parallel.
摘要翻译：有机发光显示器包括基板，基板上的薄膜晶体管，与薄膜晶体管电连接的有机发光二极管和具有并联连接的多个光电二极管的光电传感器。

2. 发明申请

US20070235714A1 Nanowire composite and preparation method thereof 有权
标题翻译：纳米线复合材料及其制备方法
公开(公告)号：US20070235714A1
公开(公告)日：2007-10-11
申请号：US11441989
申请日：2006-05-26
申请人： Soon Kwon , Byoung Choi , Eun Lee , Kyung Cho , In Han , Jae Lee , Seong Choi
发明人： Soon Kwon , Byoung Choi , Eun Lee , Kyung Cho , In Han , Jae Lee , Seong Choi
IPC分类号： H01L29/06
CPC分类号： C30B29/62 , C23C16/045 , C30B25/005 , Y10S977/764 , Y10S977/784 , Y10S977/785 , Y10S977/953 , Y10S977/957
摘要： A nanowire composite and a method of preparing the nanowire composite comprise a template having a plurality of hollow channels, nanowires formed within the respective channels of the template, and a functional element formed by removing a portion of the template so that one or more of the nanowires formed within the portion of the template are exposed. Since the nanowire composite can be prepared in a simple manner at low costs and can be miniaturized, the nanowire composite finds application in resonators and a variety of sensors.
摘要翻译：纳米线复合材料和制备纳米线复合材料的方法包括具有多个中空通道的模板，形成在模板的相应通道内的纳米线，以及通过去除模板的一部分而形成的功能元件，使得一个或多个形成在模板部分内的纳米线被暴露。由于纳米线复合材料可以以简单的方式以低成本制备并且可以小型化，纳米线复合材料可应用于谐振器和各种传感器。

3. 发明申请

US20070128808A1 Method for producing nanowires using a porous template 有权
标题翻译：使用多孔模板生产纳米线的方法
公开(公告)号：US20070128808A1
公开(公告)日：2007-06-07
申请号：US11447328
申请日：2006-06-06
申请人： Byoung Choi , Jong Kim , Eun Lee
发明人： Byoung Choi , Jong Kim , Eun Lee
IPC分类号： H01L21/336 , H01L21/44
CPC分类号： H01L29/0665 , B82Y10/00 , C30B29/60 , H01L29/0673 , H01L29/0676 , Y10T428/249994
摘要： Disclosed herein is a method for producing nanowires. The method comprises the steps of providing a porous template with a plurality of holes in the form of tubes, filling the tubes with nanoparticles or nanoparticle precursors, and forming the filled nanoparticles or nanoparticle precursors into nanowires. According to the method, highly rectilinear and well-ordered nanowires can be produced in a simple manner.
摘要翻译：本文公开了一种生产纳米线的方法。该方法包括以下步骤：提供具有管形式的多个孔的多孔模板，用纳米颗粒或纳米颗粒前体填充管，并将填充的纳米颗粒或纳米颗粒前体形成纳米线。根据该方法，可以以简单的方式制备高度直线和有序的纳米线。

4. 发明申请

US20070232028A1 Method of manufacturing silicon nanowires using porous glass template and device comprising silicon nanowires formed by the same 有权
标题翻译：使用多孔玻璃模板制造硅纳米线的方法和由其形成的硅纳米线的装置
公开(公告)号：US20070232028A1
公开(公告)日：2007-10-04
申请号：US11444115
申请日：2006-05-31
申请人： Eun Lee , Byoung Choi , Soon Kwon , Kyung Cho , Jae Lee
发明人： Eun Lee , Byoung Choi , Soon Kwon , Kyung Cho , Jae Lee
IPC分类号： H01L29/06 , H01L21/8242 , H01L21/20
CPC分类号： C30B29/06 , B82Y10/00 , B82Y30/00 , C30B11/12 , C30B25/00 , C30B29/605 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/16 , H01L31/1804 , H01L33/20 , H01S5/10 , H01S5/3031 , Y02E10/547 , Y02P70/521 , Y10S977/762 , Y10S977/778 , Y10S977/78 , Y10S977/784 , Y10S977/785 , Y10S977/932 , Y10S977/949
摘要： A method of manufacturing silicon nanowires is characterized in that silicon nanowires are formed and grown through a solid-liquid-solid process or a vapor-liquid-solid process using a porous glass template having nanopores doped with erbium or an erbium precursor. In addition, a device including silicon nanowires formed using the above exemplary method according to the present invention can be effectively applied to various devices, for example, electronic devices such as field effect transistors, sensors, photodetectors, light emitting diodes, laser diodes, etc.
摘要翻译：制造硅纳米线的方法的特征在于，使用具有掺杂有铒或铒前体的纳米孔的多孔玻璃模板，通过固 - 液 - 固体方法或气液固化法形成和生长硅纳米线。此外，使用根据本发明的上述示例性方法形成的包括硅纳米线的器件可以有效地应用于各种器件，例如诸如场效应晶体管，传感器，光电检测器，发光二极管，激光二极管等的电子器件。

5. 发明申请

US20050231248A1 Control circuit for delay locked loop 有权
标题翻译：延迟锁定环路的控制电路
公开(公告)号：US20050231248A1
公开(公告)日：2005-10-20
申请号：US10878450
申请日：2004-06-28
申请人： Sun Yang , Byoung Choi
发明人： Sun Yang , Byoung Choi
IPC分类号： G11C8/00 , H03L7/06 , H03L7/081 , H03L7/095
CPC分类号： H03L7/0812 , H03L7/095
摘要： Provided is directed to a delay locked loop control circuit capable of reducing a test time and preventing a yield from being reduced, by preventing a failure due to a charge sharing and a failure in a specific frequency and voltage due to a noise of a feedback clock, by means of including: a level setting unit for setting an initial level of a locked state signal, which is decided whether or not phases of a reference clock and a feedback clock are aligned; a signal generation unit for generating a third control signal according to a first control signal comparing phases of the reference clock and the feedback clock, and a second control signal checking out phases of the reference clock and the feedback clock in every predetermined time; a level maintaining unit for maintaining a level of the locked state signal according to the locked state signal and a fourth control signal comparing a signal delaying the feedback clock for a predetermined time with the reference clock; a detection unit for varying a level of the locked state signal by detecting whether or not phases of a reference clock and a feedback clock are aligned according to the first to third control signals; and a control unit for controlling a variation of the locked state signal by means of the detection unit according to the fourth control signal.
摘要翻译：提供了一种延迟锁定环控制电路，其能够通过防止由于反馈时钟的噪声导致的电荷共享和特定频率和电压中的故障而导致的故障，从而减少测试时间并且防止产量降低通过包括：电平设定单元，用于设定锁定状态信号的初始电平，判定参考时钟和反馈时钟的相位是否对齐; 信号生成单元，用于根据比较参考时钟和反馈时钟的相位的第一控制信号和在每个预定时间内检出参考时钟和反馈时钟的相位的第二控制信号来产生第三控制信号; 电平维持单元，用于根据锁定状态信号保持锁定状态信号的电平;以及第四控制信号，将延迟预定时间的反馈时钟的信号与参考时钟进行比较; 检测单元，用于通过检测参考时钟和反馈时钟的相位是否根据第一至第三控制信号对准来改变锁定状态信号的电平; 以及控制单元，用于根据第四控制信号通过检测单元来控制锁定状态信号的变化。

6. 发明申请

US20070241662A1 Electroluminescent element and electronic device including the same 有权
标题翻译：电致发光元件和包括其的电子器件
公开(公告)号：US20070241662A1
公开(公告)日：2007-10-18
申请号：US11442875
申请日：2006-05-30
申请人： Byoung Choi , Kyung Cho , Soon Kwon , Eun Lee , Jae Lee
发明人： Byoung Choi , Kyung Cho , Soon Kwon , Eun Lee , Jae Lee
IPC分类号： H05B33/00
CPC分类号： H05B33/20 , Y10T428/2929
摘要： An electroluminescent element and an electronic device including the electroluminescent element include a glass template having a silica layer as a matrix, electrodes and a luminescent material. Since the electroluminescent element according to the present invention includes silica as a matrix, the electroluminescent element has a stabilized structure even though a space between the luminescent layer and the electrode of the glass template is not filled. Further, such an electroluminescent element may be easily prepared, and thus may be effectively applied to various electronic devices, such as display devices, illumination devices and backlight units.
摘要翻译：包括电致发光元件的电致发光元件和电子器件包括具有二氧化硅层作为基体的玻璃模板，电极和发光材料。由于根据本发明的电致发光元件包括二氧化硅作为基质，所以即使未填充玻璃模板的发光层和电极之间的空间，电致发光元件也具有稳定的结构。此外，这种电致发光元件可以容易地制备，并且因此可以有效地应用于诸如显示装置，照明装置和背光单元的各种电子装置。

7. 发明申请

US20070111493A1 Nanowires comprising metal nanodots and method for producing the same 失效
标题翻译：包含金属纳米点的纳米线及其制造方法
公开(公告)号：US20070111493A1
公开(公告)日：2007-05-17
申请号：US11506091
申请日：2006-08-17
申请人： Eun Lee , Byoung Choi
发明人： Eun Lee , Byoung Choi
IPC分类号： H01L21/44 , H01L23/52
CPC分类号： H01L29/0665 , B82Y10/00 , H01L29/0673 , H01L29/0676 , H01L33/18 , Y10S977/70 , Y10S977/762
摘要： Nanowires methods for producing the nanowires are provided. The nanowires include a plurality of metal nanodots uniformly disposed therein, and a core portion, wherein each of the plurality of metal nanodots is coupled to the core portion. According to the method, metal nanodots can be uniformly disposed in the nanowires, and nanowires having various physical properties can be produced by controlling the size and interval of the nanodots. Therefore, the nanowires can be effectively used in a variety of applications, including electronic devices, such as field effect transistors (FETs), sensors, photodetectors, light emitting diodes (LEDs), and laser diodes (LDs).
摘要翻译：提供了制备纳米线的纳米线方法。纳米线包括均匀地设置在其中的多个金属纳米点和芯部分，其中多个金属纳米点中的每一个耦合到芯部分。根据该方法，金属纳米点可以均匀地设置在纳米线中，并且可以通过控制纳米点的尺寸和间隔来制造具有各种物理性质的纳米线。因此，纳米线可以有效地用于各种应用中，包括诸如场效应晶体管（FET），传感器，光电检测器，发光二极管（LED）和激光二极管（LD）的电子器件。

8. 发明申请

US20060040509A1 Composition for preparing nanoporous material 失效
标题翻译：用于制备纳米多孔材料的组合物
公开(公告)号：US20060040509A1
公开(公告)日：2006-02-23
申请号：US11002187
申请日：2004-12-03
申请人： Jin Yim , Byoung Choi , Duk An
发明人： Jin Yim , Byoung Choi , Duk An
IPC分类号： H01L21/31
CPC分类号： C07H3/06 , B82Y30/00 , C01G1/00 , C01G1/02 , C01P2006/16 , C08B37/0012 , C08J9/0071 , C08J9/26 , C08J2201/046 , C08J2383/04 , C08L5/16 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/31695 , Y10S977/706 , Y10S977/78 , Y10S977/781 , C08L83/00
摘要： Disclosed herein is a composition for preparing a nanoporous material. The composition comprises i) a cyclodextrin derivative, ii) a thermostable matrix precursor, and iii) a solvent for dissolving the components i) and ii). The composition enables the preparation of a low dielectric constant film in which nanopores with a size of 20 Å or less are uniformly distributed.
摘要翻译：本文公开了一种用于制备纳米多孔材料的组合物。组合物包含i）环糊精衍生物，ii）热稳定基质前体，和iii）用于溶解组分i）和ii）的溶剂。该组合物能够制备其中尺寸为20或更小的纳米孔均匀分布的低介电常数膜。

9. 发明申请

US20050232036A1 Semiconductor memory device and method of driving the same 有权
标题翻译：半导体存储器件及其驱动方法
公开(公告)号：US20050232036A1
公开(公告)日：2005-10-20
申请号：US10879552
申请日：2004-06-29
申请人： Byoung Choi
发明人： Byoung Choi
IPC分类号： G11C7/00 , G11C8/12 , G11C29/00
CPC分类号： G11C8/12 , G11C29/781 , G11C29/785
摘要： Provided is directed to a semiconductor memory device and a method of driving the same capable of improving a repair efficiency with comparison to the conventional method which repairs all the redundancy row even when a defective cell is occurred in only one cell, by including: a memory cell array which is comprised of at least more than one redundancy block and redundancy segment by means of dividing it into a plurality of blocks toward a row direction and then dividing the blocks into a plurality of segments; a control circuit for storing a repair information of a defective cell and for repairing the segment generating the defective cell to the redundancy segment according to the repair information by inputting a row address signal and a column address signal.
摘要翻译：本发明涉及一种半导体存储器件及其驱动方法，该半导体存储器件及其驱动方法能够与仅在一个单元中发生缺陷单元时修复所有冗余行的常规方法相比提高修复效率，包括：存储器单元阵列，其由至少一个冗余块和冗余段组成，通过将其划分为多个块朝向行方向，然后将块划分成多个段; 控制电路，用于通过输入行地址信号和列地址信号来存储缺陷单元的修复信息，并根据修复信息修复产生缺陷单元的段到冗余段。

10. 发明申请

US20050134586A1 Method for generating 3D mesh from 3D points by using shrink-wrapping scheme of boundary cells 审中-公开
标题翻译：通过使用边界单元的收缩包装方案从3D点生成3D网格的方法
公开(公告)号：US20050134586A1
公开(公告)日：2005-06-23
申请号：US10831153
申请日：2004-04-26
申请人： Bon Koo , Chang Chu , Jae Kim , Byoung Choi , Young Choi
发明人： Bon Koo , Chang Chu , Jae Kim , Byoung Choi , Young Choi
IPC分类号： G06T17/00 , G06T17/20
CPC分类号： G06T17/20 , G06T2210/56
摘要： The present invention relates to a method for generating a mesh model representing a 3D surface from unorganized 3D points extracted from a 3D scanner by using a shrink-wrapping scheme of boundary cells. A method for generating 3-dimensional mesh according to the present invention comprises the steps of: (a) receiving unorganized 3D point coordinates extracted by a 3D scanner or a digitizer; (b) extracting a minimum bounding box including all the point coordinates and uniformly dividing the extracted bounding box into cells of a predetermined size; (c) extracting a boundary cell including at least one point from the cells, extracting a boundary surface from all the boundary cells, and generating an initial mesh by summing extracted boundary surfaces; (d) calculating distances between each vertex constituting the mesh and the several points, finding a nearest point, and moving the vertex to the nearest point; and (e) averaging location of each shrink-wrapped vertex and location of the neighboring vertexes, and moving the shrink-wrapped vertex to center of neighboring vertexes.
摘要翻译：本发明涉及一种用于通过使用边界单元的收缩包装方案从3D扫描器提取的从未组织的3D点生成表示3D表面的网格模型的方法。根据本发明的用于生成三维网格的方法包括以下步骤：（a）接收由3D扫描仪或数字化仪提取的无组织3D点坐标; （b）提取包括所有点坐标的最小边界框，并将提取的边界框均匀地划分成预定大小的单元格; （c）从所述单元提取包括至少一个点的边界单元，从所有边界单元提取边界表面，并通过对提取的边界表面求和来生成初始网格; （d）计算构成网格的每个顶点与几个点之间的距离，找到最近的点，并将顶点移动到最近点; 和（e）平均每个收缩包装顶点的位置和相邻顶点的位置，并将收缩包装的顶点移动到相邻顶点的中心。

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