会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 7. 发明授权
    • Digital frequency generator
    • 数字频率发生器
    • US5122757A
    • 1992-06-16
    • US673841
    • 1991-03-18
    • Hubert WeberVolker Thamm
    • Hubert WeberVolker Thamm
    • H03K5/00H03B21/02H03D7/00H03K5/156
    • H03B21/025H03D7/00
    • A digital frequency generator is formed from generators for fist and second clock signals which feed a frequency adder stage that produces an output having a frequency of the sum of the frequency of the second clock signal and one half the frequency of the first clock signal. The frequency adder stage is formed from a phase shifter which produces four different phases, each at a frequency of the first clock signal divided by two, and a multiplexer which selects phases under the control of a sequence controller supplying an address signal thereto. The sequence controller is fed from the first and second clock signals and produces in an address counter a sequence of count states synchronously with edges of the first clock signal after an ascending edge of the second clock signal. The count state of the address counter determines the selected phase. The pattern of selected phases during said sequence of count states is such that the output of the multiplexer exhibits four sequential asymmetrical cycles each spanning one and one half cycles of the first clock signal, while before and after said sequence of count states the same phase is selected to produce at the output of the multiplexer symmetrical sequential cycles each spanning two cycles of the first clock signal.
    • 数字频率发生器由用于第一和第二时钟信号的发生器形成,其馈送频率加法器级,其产生具有第二时钟信号的频率和第一时钟信号的频率之和的频率的频率的输出。 频率加法器级由移相器形成,该移相器产生四个不同的相位,每个相位以第一时钟信号除以2的频率,以及多路复用器,其在提供地址信号的序列控制器的控制下选择相位。 序列控制器从第一和第二时钟信号馈送,并且在第二时钟信号的上升沿之后,在地址计数器中产生与第一时钟信号的边沿同步的计数状态序列。 地址计数器的计数状态决定所选择的相位。 在所述计数状态序列期间所选择的相位的模式使得多路复用器的输出显示四个顺序的非对称周期,每个周期跨越第一时钟信号的一个半周期,而在所述计数状态序列之前和之后相同的相位是 被选择以在多路复用器的输出处产生对称的顺序循环,每个循环跨越第一时钟信号的两个周期。