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    • 1. 发明申请
    • THIN FILM TRANSISTOR SUBSTRATE
    • 薄膜晶体管基板
    • US20090141207A1
    • 2009-06-04
    • US12255908
    • 2008-10-22
    • Yoon-Sung UMHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • Yoon-Sung UMHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • G02F1/136H01L29/04H01L21/00
    • H01L29/6675G02F1/13624G02F2001/134345H01L27/1288
    • In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.
    • 在薄膜晶体管中,第一和第二薄膜晶体管连接到第N栅极线和第M数据线,第一和第二子像素电极分别连接到第一和第二薄膜晶体管。 第三薄膜晶体管包括连接到第(N + 1)栅极线的栅电极,与栅电极重叠的半导体层,连接到第二子像素电极并与栅电极部分重叠的源极, 漏电极面对源电极。 第一辅助电极连接到漏电极并且设置在与第一和第二子像素电极相同的层上。 相对电极布置在与栅极线相同的层上,并且与第一辅助电极至少部分重叠,并且其间设置有至少一个绝缘层。
    • 3. 发明申请
    • LIQUID CRYSTAL DISPLAY
    • 液晶显示器
    • US20090096976A1
    • 2009-04-16
    • US12194058
    • 2008-08-19
    • Hoon KimJae-Jin LyuHye-Ran You
    • Hoon KimJae-Jin LyuHye-Ran You
    • G02F1/1343G02F1/13
    • G02F1/1393G02F2001/134345G09G3/3614G09G3/3651G09G2300/0443G09G2300/0491G09G2320/0238G09G2320/028
    • In a liquid crystal display, an image-defining data voltage is simultaneously applied to a main pixel electrode (MPE) and an electrically isolatable sub pixel electrode (SPE) to thereby respectively define a main pixel voltage and a sub pixel voltage. The MPE defines one plate of a first capacitor whose other plate receives a first common voltage whose voltage level can be varied after the image-defining data voltage is applied. Thus the main pixel voltage is shifted up or shifted down according to the voltage variation of the first common voltage. The SPE defines one plate of a second capacitor whose other plate receives a second common voltage. By causing the main pixel voltage to be of greater absolute amplitude than the sub pixel voltage, a side visibility of the liquid crystal display can be enhanced. Also, the liquid crystal display utilizes a liquid crystal having a dielectric anisotropy and an elastic constant ratio within a specific range, so that an undesirable increase of a black brightness effect is reduced and thus image contrast is not adversely affected.
    • 在液晶显示器中,将图像定义数据电压同时施加到主像素电极(MPE)和电隔离子像素电极(SPE),从而分别限定主像素电压和子像素电压。 MPE定义了第一电容器的一个板,其另一个板接收在施加图像定义数据电压之后电压电平可以改变的第一公共电压。 因此,主像素电压根据第一公共电压的电压变化向上移位或向下移动。 SPE定义了第二电容器的一个板,其另一个板接收第二公共电压。 通过使主像素电压成为比子像素电压更大的绝对幅度,可以提高液晶显示器的侧面可见度。 此外,液晶显示器利用在特定范围内具有介电各向异性和弹性常数比的液晶,从而降低黑色亮度效果的不期望的增加,因此不会对图像对比度产生不利影响。
    • 4. 发明授权
    • Thin film transistor substrate
    • 薄膜晶体管基板
    • US08026991B2
    • 2011-09-27
    • US12255908
    • 2008-10-22
    • Yoon-Sung UmHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • Yoon-Sung UmHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • G02F1/136H01L29/04H01L21/00
    • H01L29/6675G02F1/13624G02F2001/134345H01L27/1288
    • In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.
    • 在薄膜晶体管中,第一和第二薄膜晶体管连接到第N栅极线和第M数据线,第一和第二子像素电极分别连接到第一和第二薄膜晶体管。 第三薄膜晶体管包括连接到第(N + 1)栅极线的栅电极,与栅电极重叠的半导体层,连接到第二子像素电极并与栅电极部分重叠的源极, 漏电极面对源电极。 第一辅助电极连接到漏电极并且设置在与第一和第二子像素电极相同的层上。 相对电极布置在与栅极线相同的层上,并且与第一辅助电极至少部分重叠,并且其间设置有至少一个绝缘层。