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    • 3. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    • 薄膜晶体管阵列及其制造方法
    • US20110254815A1
    • 2011-10-20
    • US12910268
    • 2010-10-22
    • Jae-Sung KIMHoon KANGYang-Ho JUNG
    • Jae-Sung KIMHoon KANGYang-Ho JUNG
    • G09G5/00H01L33/08
    • G02F1/136227G02F1/00H01L27/1248H01L27/1288H01L29/41733
    • A manufacturing method of a thin film transistor array panel includes forming a gate line, forming a gate insulating layer on the gate line, forming a data line including a drain electrode on the gate insulating layer, forming a passivation layer on the gate insulating layer, the data line, and the drain electrode, forming a negative photosensitive organic layer on the passivation layer, heat treating the negative photosensitive organic layer to form an insulating layer including a first portion, and a second portion that is thinner than the first portion, and forming a pixel electrode, a first contact assistant, and a second contact assistant on the insulating layer. The pixel electrode is disposed on the first portion, the first and second contact assistants are disposed on the second portion, and the thickness of the second portion is less than about 1.5 micrometers (μm).
    • 薄膜晶体管阵列面板的制造方法包括形成栅极线,在栅极线上形成栅极绝缘层,在栅极绝缘层上形成包括漏电极的数据线,在栅极绝缘层上形成钝化层, 数据线和漏电极,在钝化层上形成负光敏有机层,对负光敏有机层进行热处理,形成包含第一部分的绝缘层和比第一部分薄的第二部分,以及 在绝缘层上形成像素电极,第一接触辅助件和第二接触辅助件。 像素电极设置在第一部分上,第一和第二接触助剂设置在第二部分上,第二部分的厚度小于约1.5微米(μm)。
    • 6. 发明申请
    • LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME
    • 液晶显示器及其制造方法
    • US20090237581A1
    • 2009-09-24
    • US12267164
    • 2008-11-07
    • Jae-Sung KIMHoon KangYang-Ho JungHi-Kuk Lee
    • Jae-Sung KIMHoon KangYang-Ho JungHi-Kuk Lee
    • G02F1/1368G02F1/13
    • G02F1/1339
    • In accordance with one or more embodiments of the present disclosure, a liquid crystal display includes a first substrate, a plurality of first signal lines formed on the first substrate, a plurality of second signal lines intersecting the first signal lines, a plurality of thin film transistors connected to the first signal lines and the second signal lines, an organic insulator formed on the thin film transistors, a plurality of pixel electrodes formed on the organic insulator, a second substrate facing the first substrate, a common electrode formed on the second substrate, a sealant disposed between the first substrate and the second substrate and formed according to the circumference of the second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate and disposed in a region defined by the sealant. The organic insulator includes an opening formed at a position overlapping the sealant.
    • 根据本公开的一个或多个实施例,液晶显示器包括第一基板,形成在第一基板上的多个第一信号线,与第一信号线相交的多个第二信号线,多个薄膜 连接到第一信号线和第二信号线的晶体管,形成在薄膜晶体管上的有机绝缘体,形成在有机绝缘体上的多个像素电极,面对第一基板的第二基板,形成在第二基板上的公共电极 ,设置在所述第一基板和所述第二基板之间并根据所述第二基板的圆周形成的密封剂,以及插入在所述第一基板和所述第二基板之间并且设置在由所述密封剂限定的区域中的液晶层。 有机绝缘体包括形成在与密封剂重叠的位置处的开口。
    • 8. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    • 薄膜晶体管阵列及其制造方法
    • US20130075736A1
    • 2013-03-28
    • US13360386
    • 2012-01-27
    • Jae-Sung KIMHoon KANGJin-Young CHOI
    • Jae-Sung KIMHoon KANGJin-Young CHOI
    • H01L29/786H01L21/283H01L33/16
    • G02F1/13458G02F1/136227G02F2001/134372H01L27/124
    • A thin film transistor array panel includes: an substrate; a gate line and a gate pad portion disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad portion; a data line and a data pad portion disposed on the gate insulating layer; a gate assistance pad portion disposed at a position corresponding to the gate pad portion; a first insulating layer disposed on the data line and removed at the gate pad portion and the data pad portion; a first field generating electrode disposed on the first insulating layer; a second insulating layer disposed on the first field generating electrode and removed at the gate pad portion and the data pad portion; and a second field generating electrode disposed on the second insulating layer. The assistance gate pad portion and the gate insulating layer include a contact hole exposing the gate pad portion.
    • 薄膜晶体管阵列面板包括:基板; 设置在基板上的栅极线和栅极焊盘部分; 设置在栅极线和栅极焊盘部分上的栅极绝缘层; 设置在栅极绝缘层上的数据线和数据焊盘部分; 设置在与所述栅极焊盘部对应的位置的栅极辅助焊盘部; 设置在数据线上并在栅极焊盘部分和数据焊盘部分移除的第一绝缘层; 设置在所述第一绝缘层上的第一场产生电极; 第二绝缘层,设置在所述第一场产生电极上,并在所述栅极焊盘部分和所述数据焊盘部分处被去除; 以及设置在所述第二绝缘层上的第二场产生电极。 辅助栅极焊盘部分和栅极绝缘层包括暴露栅极焊盘部分的接触孔。