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1. 发明授权

US06898697B1 Efficient method for mode change detection and synchronization 有权
标题翻译：用于模式变化检测和同步的高效方法
公开(公告)号：US06898697B1
公开(公告)日：2005-05-24
申请号：US10113387
申请日：2002-03-29
申请人： Hongwen Gao , Chetana N. Keltcher , Michael T. Clark
发明人： Hongwen Gao , Chetana N. Keltcher , Michael T. Clark
IPC分类号： G06F9/30 , G06F9/318 , G06F9/38 , G06F9/52 , G06F12/02 , G06F13/00
CPC分类号： G06F9/30189 , G06F9/30076 , G06F9/30101 , G06F9/342 , G06F9/3861
摘要： A processor is configured to operate in a modes which utilize segmentation and which do not utilize segmentation. The processor includes circuitry which is configured to detect and respond to mode and state changes. The circuitry is configured to determine whether a segmentation state of the processor changes in response to execution of a control transfer operation. If the segmentation state does not change as a result of the transfer instruction, execution of instructions may continue sequentially and a corresponding first check performed. However, if the segmentation state does change as a result of the transfer instruction, a flush of the pipeline is initiated prior to performing a corresponding second check. When a first mode of operation is detected a limit check may be performed, while a canonical check may performed when a second mode of operation is detected. A special register is defined which is configured to indicate changes in segmentation state subsequent to a control transfer operations. A read of the special register may then be performed in order to determine whether a state change is indicated.
摘要翻译：处理器被配置为以利用分段并且不利用分段的模式操作。处理器包括被配置为检测并响应模式和状态改变的电路。电路被配置为确定处理器的分段状态是否响应于控制传送操作的执行而改变。如果作为传送指令的结果，分段状态不改变，则指令的执行可以顺序地继续进行并进行相应的第一检查。然而，如果作为转移指令的结果，分段状态确实改变，则在执行相应的第二次检查之前启动流水线的刷新。当检测到第一操作模式时，可以执行极限检查，而当检测到第二操作模式时可以执行规范检查。定义特殊寄存器，其被配置为指示在控制传送操作之后的分段状态的改变。然后可以执行特殊寄存器的读取，以便确定是否指示状态改变。

2. 发明授权

US06934903B1 Using microcode to correct ECC errors in a processor 失效
标题翻译：使用微码来纠正处理器中的ECC错误
公开(公告)号：US06934903B1
公开(公告)日：2005-08-23
申请号：US10023310
申请日：2001-12-17
申请人： Chetana N. Keltcher , William Alexander Hughes , Michael T. Clark , Bruce R. Holloway
发明人： Chetana N. Keltcher , William Alexander Hughes , Michael T. Clark , Bruce R. Holloway
IPC分类号： G11C7/10 , H03M13/00 , G11C29/00
CPC分类号： G11C7/1006 , H03M13/00
摘要： An apparatus may include an ECC check circuit configured to detect an ECC error in response to an access to first data in a memory and a microcode unit. The microcode unit is coupled to receive an indication that the ECC check circuit has detected the ECC error. In response to the indication, the microcode unit is configured to dispatch a microcode routine stored by the microcode unit. The microcode routine includes instructions which, when executed, correct the ECC error in the memory. In another embodiment, a processor includes the microcode unit and execution circuitry. A method is also contemplated. An access is performed to first data in a memory. An ECC error is detected in response to the access. A microcode routine stored by a microcode unit is dispatched in response to the detecting of the ECC error. The microcode routine includes instructions which, when executed, correct the ECC error in the memory.
摘要翻译：一种装置可以包括ECC检查电路，其被配置为响应于对存储器和微代码单元中的第一数据的访问来检测ECC错误。微代码单元被耦合以接收ECC检查电路已经检测到ECC错误的指示。响应于该指示，微码单元被配置为发送由微码单元存储的微码例程。微代码程序包括在执行时纠正存储器中的ECC错误的指令。在另一个实施例中，处理器包括微代码单元和执行电路。也考虑了一种方法。对存储器中的第一数据执行访问。响应于访问检测到ECC错误。响应于ECC错误的检测，调度由微代码单元存储的微代码例程。微代码程序包括在执行时纠正存储器中的ECC错误的指令。

3. 发明授权

US07373484B1 Controlling writes to non-renamed register space in an out-of-order execution microprocessor 有权
标题翻译：控制对无序执行微处理器中的未重命名寄存器空间的写入
公开(公告)号：US07373484B1
公开(公告)日：2008-05-13
申请号：US10755692
申请日：2004-01-12
申请人： Arun Radhakrishnan , Benjamin T. Sander , Michael A. Filippo , Michael T. Clark , David E. Kroesche
发明人： Arun Radhakrishnan , Benjamin T. Sander , Michael A. Filippo , Michael T. Clark , David E. Kroesche
IPC分类号： G06F9/30
CPC分类号： G06F9/3842 , G06F9/3013 , G06F9/384
摘要： A method of controlling write operations to a non-renamed register space includes receiving a write operation to a given register within the non-renamed register space. The method also includes determining whether a pending write operation to the given register exists. In response to determining that the pending write operation to the given register exists, the method includes blocking the write operation to the given register from being scheduled. However, in response to determining that the pending write operation to the given register does not exist, the method includes allowing the write operation to the given register to be scheduled. Further, if the pending write operation to the given register does not exist, the method includes allowing a subsequent write operation to a different register within the non-renamed register space to be scheduled.
摘要翻译：控制对未重新命名的寄存器空间的写入操作的方法包括：接收对非重命名寄存器空间内的给定寄存器的写操作。该方法还包括确定是否存在对给定寄存器的挂起写入操作。响应于确定对给定寄存器的挂起写入操作存在，该方法包括阻止对给定寄存器的写入操作被调度。然而，响应于确定对给定寄存器的挂起写操作不存在，该方法包括允许对给定寄存器的写操作进行调度。此外，如果对给定寄存器的挂起写入操作不存在，则该方法包括允许对未重新命名的寄存器空间内的不同寄存器的后续写入操作进行调度。

4. 发明授权

US06973562B1 Establishing an operating mode in a processor 有权
标题翻译：在处理器中建立操作模式
公开(公告)号：US06973562B1
公开(公告)日：2005-12-06
申请号：US09483101
申请日：2000-01-14
申请人： Kevin J. McGrath , Michael T. Clark
发明人： Kevin J. McGrath , Michael T. Clark
IPC分类号： G06F9/34 , G06F9/318 , G06F9/30
CPC分类号： G06F9/30189 , G06F9/30185 , G06F9/342
摘要： A processor supports a processing mode in which the address size is greater than 32 bits and the operand size may be 32 or 64 bits. The address size may be nominally indicated as 64 bits, although various embodiments of the processor may implement any address size which exceeds 32 bits, up to and including 64 bits, in the processing mode. The processing mode may be established by placing an enable indication in a control register into an enabled state and by setting a first operating mode indication and a second operating mode indication in a segment descriptor to predefined states. Other combinations of the first operating mode indication and the second operating mode indication may be used to provide compatibility modes for 32 bit and 16 bit processing compatible with the x86 processor architecture (with the enable indication remaining in the enabled state).
摘要翻译：处理器支持地址大小大于32位的处理模式，操作数大小可以是32位或64位。地址大小可以名义上表示为64位，尽管在处理模式下，处理器的各种实施例可以实现超过32位，高达并包括64位的任何地址大小。可以通过将控制寄存器中的使能指示置于使能状态并且通过将段描述符中的第一操作模式指示和第二操作模式指示设置为预定状态来建立处理模式。可以使用第一操作模式指示和第二操作模式指示的其他组合来提供与x86处理器架构兼容的32位和16位处理的兼容性模式（使能指示保持在使能状态）。

5. 发明授权

US06178956B2 Automotive fluid control system with pressure balanced solenoid valve 有权
标题翻译：具有压力平衡电磁阀的汽车流体控制系统
公开(公告)号：US06178956B2
公开(公告)日：2001-01-30
申请号：US09194346
申请日：1998-11-19
申请人： Christian Steinmann , Michael J. Covey , Thomas D. Herrington , Michael T. Clark , John W. Dillon , Steven J. Roskowski , Keith D. Marsh
发明人： Christian Steinmann , Michael J. Covey , Thomas D. Herrington , Michael T. Clark , John W. Dillon , Steven J. Roskowski , Keith D. Marsh
IPC分类号： F02M2507
CPC分类号： F02M35/10222 , F02M26/21 , F02M26/48 , F02M26/53 , F02M26/67 , F02M26/72 , F02M26/74 , F02M35/10019 , F02M35/10321 , F02M35/10386 , F02M35/1045
摘要： An automotive fluid control system with pressure balanced solenoid valve [24] and fluid mixing housing [22] is disclosed. The solenoid valve [24] is preferably used in an EGR (exhaust gas circulation) fluid control system, although the valve may be used in other vehicle fluid control systems, such as an engine block cooling liquid control system. A poppet member [84] of an EGR valve is pressured balanced such that only a light spring [170] and armature [88] are needed to control the positioning of the poppet member [84]. Magnetic and inductance sensors [184, 282] are used to accurately determine the position of the poppet member. The fluid mixing housing [22] homogeneously mixes first and second fluids. A portion of a main first fluid flow is funneled off and mixed in the housing [22] with a second fluid prior to being returned to the main fluid flow. Ideally, the housing [22] has a circumferentially extending channel [95] for intercepting, funnelling and mixing the captured portion of the main first fluid flow with the second fluid flow. Also, a solenoid subassembly [82] is disclosed which can mate with a variety of different valve housings [22] and which is adapted to mount on various engine configurations.
摘要翻译：公开了一种具有压力平衡电磁阀[24]和流体混合壳体[22]的汽车流体控制系统。电磁阀[24]优选用于EGR（排气循环）流体控制系统，尽管该阀可用于其他车辆流体控制系统，例如发动机缸体冷却液控制系统。 EGR阀的提升阀构件[84]被加压平衡，使得只需要一个弹簧[170]和电枢[88]来控制提升阀构件[84]的定位。磁性和电感传感器[184,282]用于准确地确定提升阀构件的位置。流体混合壳体[22]均匀混合第一和第二流体。主要第一流体流的一部分在被返回到主流体流之前用第二流体漏出并在壳体[22]中混合。理想地，壳体22具有周向延伸的通道，用于拦截，漏斗和混合主要第一流体流的捕获部分与第二流体流。此外，公开了一种螺线管子组件[82]，其可以与各种不同的阀壳体[22]配合，并且其适于安装在各种发动机构造上。

6. 发明授权

US5015627A Stabilized somatotropin for parenteral administration 失效
标题翻译：稳定的生长激素用于肠胃外给药
公开(公告)号：US5015627A
公开(公告)日：1991-05-14
申请号：US555970
申请日：1990-07-20
申请人： Thomas O. Lindsey , Michael T. Clark
发明人： Thomas O. Lindsey , Michael T. Clark
IPC分类号： A61K9/00 , A61K38/27 , A61K47/48
CPC分类号： A61K9/0024 , A61K38/27 , A61K47/48238
摘要： A stabilized somatotropin peptide aldehyde complex which provides prolonged release of the somatotropin and enhanced feed efficiency. The complex is prepared by dissolving the somatotropin and peptide aldehyde in water, isolating the complex from the aqueous solution, and crystalizing the product from alcohol. Specifically, the complex comprises porcine somatotropin and leupeptin and is particularly useful for enhancing feed efficiency in swine.
摘要翻译：稳定的生长激素肽醛复合物，其提供生长激素的延长释放和提高的饲料效率。通过将生长激素和肽醛溶解在水中，从水溶液中分离复合物，并从醇中使产物结晶来制备复合物。具体来说，复合物包括猪生长激素和亮抑酶肽，并且特别可用于提高猪的饲料效率。

7. 发明授权

US4440564A Heterocyclic pentalenes as herbicides 失效
标题翻译：杂环萜烯作为除草剂
公开(公告)号：US4440564A
公开(公告)日：1984-04-03
申请号：US418369
申请日：1982-09-15
申请人： Michael T. Clark , Ian J. Gilmore
发明人： Michael T. Clark , Ian J. Gilmore
IPC分类号： A01N43/90 , C07D515/04 , C07D515/06 , C07D515/12 , C07D515/16 , C07D517/04 , C07D517/06 , C07D517/12 , C07D517/16 , A01N43/02
CPC分类号： C07D515/04 , A01N43/90 , C07D515/06 , C07D517/04 , C07D517/06 , C07D517/08
摘要： Use as herbicides of, and herbicidal compositions containing as active ingredients, compounds of the formula: ##STR1## wherein the symbols have assigned meanings.
摘要翻译：作为含有作为活性成分的除草剂的除草剂可用作下式化合物：其中符号具有分配的含义。

8. 发明授权

US4163793A Use of certain thiophenecarbaldehyde phenylhydrazones as fungicides 失效
标题翻译：使用某些噻吩甲醛苯腙作为杀菌剂
公开(公告)号：US4163793A
公开(公告)日：1979-08-07
申请号：US921651
申请日：1978-07-03
申请人： Michael T. Clark , Pieter Ten Haken
发明人： Michael T. Clark , Pieter Ten Haken
IPC分类号： A01N35/10 , A01N37/28 , A01N43/06 , A01N43/30 , A01N43/36 , A01N43/40 , C07D207/32 , C07D207/335 , C07D213/53 , C07D307/52 , C07D317/66 , C07D333/22 , C07D333/62 , A01N9/12
CPC分类号： C07D207/335 , A01N35/10 , A01N37/28 , A01N43/06 , A01N43/30 , A01N43/36 , A01N43/40 , C07C251/72 , C07D213/53 , C07D307/52 , C07D317/66 , C07D333/22 , C07D333/62
摘要： Certain thiophenecarbaldehyde phenylhydrazones are used to control unwanted fungi.
摘要翻译：某些噻吩甲醛苯腙用于控制不需要的真菌。

9. 发明授权

US07937574B2 Precise counter hardware for microcode loops 失效
标题翻译：微码循环的精确计数器硬件
公开(公告)号：US07937574B2
公开(公告)日：2011-05-03
申请号：US11778936
申请日：2007-07-17
申请人： Michael T. Clark , Jelena Ilic , Syed Faisal Ahmed , Michael T. DiBrino
发明人： Michael T. Clark , Jelena Ilic , Syed Faisal Ahmed , Michael T. DiBrino
IPC分类号： G06F9/26
CPC分类号： G06F9/325 , G06F9/264 , G06F9/3017 , G06F9/3802 , G06F9/382 , G06F9/3842 , G06F9/3867
摘要： In an embodiment, a microcode unit for a processor is contemplated. The microcode unit comprises a microcode memory storing a plurality of microcode routines executable by the processor, wherein each microcode routine comprises two or more microcode operations. Coupled to the microcode memory, the sequence control unit is configured to control reading microcode operations from the microcode memory to be issued for execution by the processor. The sequence control unit is configured to stall issuance of microcode operations forming a body of a loop in a first routine of the plurality of microcode routines until a loop counter value that indicates a number of iterations of the loop is received by the sequence control unit.
摘要翻译：在一个实施例中，预期用于处理器的微代码单元。微代码单元包括存储可由处理器执行的多个微代码例程的微代码存储器，其中每个微代码程序包括两个或多个微代码操作。耦合到微代码存储器，顺序控制单元被配置为控制从微代码存储器读取微代码操作以供处理器执行。顺序控制单元被配置为阻止在多个微代码例程的第一程序中形成循环体的微码操作的发布，直到由序列控制单元接收到指示循环的迭代次数的循环计数值。

10. 发明申请

US20090024842A1 Precise Counter Hardware for Microcode Loops 失效
标题翻译：微码循环的精确计数器硬件
公开(公告)号：US20090024842A1
公开(公告)日：2009-01-22
申请号：US11778936
申请日：2007-07-17
申请人： Michael T. Clark , Jelena Ilic , Syed Faisal Ahmed , Michael T. DiBrino
发明人： Michael T. Clark , Jelena Ilic , Syed Faisal Ahmed , Michael T. DiBrino
IPC分类号： G06F9/315
CPC分类号： G06F9/325 , G06F9/264 , G06F9/3017 , G06F9/3802 , G06F9/382 , G06F9/3842 , G06F9/3867
摘要： In an embodiment, a microcode unit for a processor is contemplated. The microcode unit comprises a microcode memory storing a plurality of microcode routines executable by the processor, wherein each microcode routine comprises two or more microcode operations. Coupled to the microcode memory, the sequence control unit is configured to control reading microcode operations from the microcode memory to be issued for execution by the processor. The sequence control unit is configured to stall issuance of microcode operations forming a body of a loop in a first routine of the plurality of microcode routines until a loop counter value that indicates a number of iterations of the loop is received by the sequence control unit.
摘要翻译：在一个实施例中，预期用于处理器的微代码单元。微代码单元包括存储可由处理器执行的多个微代码例程的微代码存储器，其中每个微代码程序包括两个或多个微代码操作。耦合到微代码存储器，顺序控制单元被配置为控制从微代码存储器读取微代码操作以供处理器执行。顺序控制单元被配置为阻止在多个微代码例程的第一程序中形成循环体的微码操作的发布，直到由序列控制单元接收到指示循环的迭代次数的循环计数值。

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