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1. 发明申请

US20110193086A1 SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR PACKAGES 有权
标题翻译：半导体存储器件和半导体封装
公开(公告)号：US20110193086A1
公开(公告)日：2011-08-11
申请号：US12891141
申请日：2010-09-27
申请人： Ho-Cheol LEE , Chi-Sung OH , Jin-Kuk KIM
发明人： Ho-Cheol LEE , Chi-Sung OH , Jin-Kuk KIM
IPC分类号： H01L27/118
CPC分类号： H01L25/0657 , G11C5/025 , G11C5/06 , H01L22/32 , H01L24/09 , H01L24/73 , H01L27/0255 , H01L27/108 , H01L2224/0401 , H01L2224/0912 , H01L2224/09179 , H01L2224/09515 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32225 , H01L2224/48227 , H01L2224/73207 , H01L2224/73265 , H01L2225/06541 , H01L2924/15311 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor memory device includes a semiconductor die and an input-output bump pad part. The semiconductor die includes a plurality of memory cell arrays. The input-output bump pad part is formed in a central region of the semiconductor die. The input-output bump pad part provides a plurality of channels for connecting each of the memory cell arrays independently to an external device. The semiconductor memory device may adopt the multi-channel interface, thereby having high performance with relatively low power consumption.
摘要翻译：半导体存储器件包括半导体管芯和输入 - 输出凸块焊盘部分。半导体管芯包括多个存储单元阵列。输入输出凸块焊盘部分形成在半导体管芯的中心区域。输入 - 输出凸块焊盘部件提供多个通道，用于将每个存储单元阵列独立地连接到外部设备。半导体存储器件可以采用多通道接口，从而具有相对较低功耗的高性能。

2. 发明申请

US20140346516A1 SEMICONDUCTOR MEMORY DEVICES AND SEMICONDUCTOR PACKAGES 审中-公开
标题翻译：半导体存储器件和半导体封装
公开(公告)号：US20140346516A1
公开(公告)日：2014-11-27
申请号：US14450359
申请日：2014-08-04
申请人： Ho-Cheol LEE , Chi-Sung OH , Jin-Kuk KIM
发明人： Ho-Cheol LEE , Chi-Sung OH , Jin-Kuk KIM
IPC分类号： H01L25/065 , H01L21/66 , H01L27/02 , H01L23/00 , H01L27/108
CPC分类号： H01L25/0657 , G11C5/025 , G11C5/06 , H01L22/32 , H01L24/09 , H01L24/73 , H01L27/0255 , H01L27/108 , H01L2224/0401 , H01L2224/0912 , H01L2224/09179 , H01L2224/09515 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32225 , H01L2224/48227 , H01L2224/73207 , H01L2224/73265 , H01L2225/06541 , H01L2924/15311 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor memory device includes a semiconductor die and an input-output bump pad part. The semiconductor die includes a plurality of memory cell arrays. The input-output bump pad part is formed in a central region of the semiconductor die. The input-output bump pad part provides a plurality of channels for connecting each of the memory cell arrays independently to an external device. The semiconductor memory device may adopt the multi-channel interface, thereby having high performance with relatively low power consumption.
摘要翻译：半导体存储器件包括半导体管芯和输入 - 输出凸块焊盘部分。半导体管芯包括多个存储单元阵列。输入输出凸块焊盘部分形成在半导体管芯的中心区域。输入 - 输出凸块焊盘部件提供多个通道，用于将每个存储单元阵列独立地连接到外部设备。半导体存储器件可以采用多通道接口，从而具有相对较低功耗的高性能。

3. 发明申请

US20110035544A1 MULTI-PATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE HAVING MAILBOX AREAS AND MAILBOX ACCESS CONTROL METHOD THEREOF 失效
标题翻译：具有邮箱区域和邮箱访问控制方法的多通道可访问半导体存储器件
公开(公告)号：US20110035544A1
公开(公告)日：2011-02-10
申请号：US12909069
申请日：2010-10-21
申请人： Chi-Sung OH , Yong-Jun KIM , Kyung-Woo NAM , Jin-Kuk KIM , Soo-Young KIM
发明人： Chi-Sung OH , Yong-Jun KIM , Kyung-Woo NAM , Jin-Kuk KIM , Soo-Young KIM
IPC分类号： G06F12/06 , G06F12/00
CPC分类号： G11C5/02 , G11C8/12
摘要： A multipath accessible semiconductor memory device having a mailbox area and a mailbox access control method thereof are provided. The semiconductor memory device includes N number of ports, at least one shared memory area allocated in a memory cell array, and N number of mailbox areas for message communication. The at least one shared memory area is operationally connected to the N number of ports, and is accessible through a plurality of data input/output lines to form a data access path between the at least one shared memory area and one port, having an access right to the at least one memory area, among the N number of ports. The N number of mailbox areas are provided in one-to-one correspondence with the N number of ports and are accessible through the plurality of data input/output lines when an address of a predetermined area of the at least one shared memory area is applied to the semiconductor memory device. An efficient layout of mailboxes and an efficient message access path can be obtained.
摘要翻译：提供具有邮箱区域和邮箱访问控制方法的多路径可访问半导体存储装置。半导体存储器件包括N个端口，分配在存储单元阵列中的至少一个共享存储区域和N个用于消息通信的邮箱区域。所述至少一个共享存储区域可操作地连接到所述N个端口，并且可通过多个数据输入/输出线路访问，以在所述至少一个共享存储区域和一个端口之间形成数据访问路径，在N个端口中的至少一个存储区域的权限。 N个邮箱区域与N个端口一一对应地提供，并且当应用至少一个共享存储区域的预定区域的地址时可以通过多个数据输入/输出线路访问邮箱区域到半导体存储器件。可以获得邮箱的有效布局和高效的邮件访问路径。

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