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1. 发明专利

JPH11273013A Magnetic disk device 失效
标题翻译：磁盘设备
公开(公告)号：JPH11273013A
公开(公告)日：1999-10-08
申请号：JP7515798
申请日：1998-03-24
申请人： Hitachi Ltd , Hitachi Vlsi Eng Corp , 日立超エル・エス・アイ・エンジニアリング株式会社 , 株式会社日立製作所
发明人： OTA MORIYOSHI , KURAISHI MAMORU , FUJII NOBUYUKI
IPC分类号： G11B5/09
摘要： PROBLEM TO BE SOLVED: To provide a magnetic disk device provided with an offset cancel circuit capable of reducing the offset of an automatic gain control(AGC) loop circuit without increasing current consumption and an occupied area.
SOLUTION: The magnetic disk device is constituted of a signal processing circuit provided with a reading circuit for amplifying a signal read out by a magnetic head and an AGC loop circuit consisting of a variable gain amplifier 11, a low pass filter(LPF) 12, a post stage amplifier 13, and a gain controlling voltage generation circuit 14 and capable of extracting necessary data based on a signal outputted from the reading circuit and generating a servo signal for a head driving motor and a control circuit for controlling the rotary driving motor. The AGC loop circuit is also provided with an offset cancel circuit 16 consisting of a voltage input/current output type amplifier and capable of adjusting a current drawn out from a current route in the amplifier 11 based on the output voltage of the amplifier 11 or the LPF 12 differently from an offset cancel circuit 15 for the amplifier 13.
COPYRIGHT: (C)1999,JPO
摘要翻译：要解决的问题：提供一种具有能够在不增加电流消耗和占用面积的情况下减少自动增益控制（AGC）回路电路的偏移的偏移消除电路的磁盘装置。解决方案：磁盘装置由设置有用于放大由磁头读出的信号的读取电路和由可变增益放大器11，低通滤波器（LPF）12组成的AGC环路电路的信号处理电路构成，后级放大器13和增益控制电压产生电路14，并且能够基于从读取电路输出的信号提取必要的数据，并产生用于磁头驱动电机的伺服信号和用于控制旋转驱动电动机的控制电路。 AGC环路电路还设置有由电压输入/电流输出型放大器组成的偏移消除电路16，其能够根据放大器11的输出电压或放大器11的输出电压来调节从放大器11中的当前路径引出的电流 LPF12与放大器13的偏移消除电路15不同。

2. 发明专利

JPH09116392A PULSE GENERATION CIRCUIT 失效
公开(公告)号：JPH09116392A
公开(公告)日：1997-05-02
申请号：JP27223695
申请日：1995-10-20
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： KURAISHI MAMORU , OOTA MORIYOSHI
IPC分类号： H03K3/0232 , H03K3/033
摘要： PROBLEM TO BE SOLVED: To correct the variance of pulse width due to the manufacturing variance of a pulse generation circuit and also to change the pulse width by providing a comparator to compare the node potential of a charge/discharge circuit with the reference voltage, feeding the output signal of the comparator back to a flip-flop, and also changing the reference voltage to generate a one- shot pulse of desired width. SOLUTION: The inverted output QN of a flip-flop FF1 falls synchronously with the rise of an input signal, and a switch MOSFET MN1 is turned off. Then the capacitance C1 is charged and the potential of a node A gradually rises. When the potential of the node A exceeds a reference voltage Vr, the output signal of a comparator CMP is changed to a high level from a low level. Then the FF1 is cleared. As a result, a one-shot pulse having the prescribed width that is decided by the capacity C1, the current I of a constant current source C1 and the level of the voltage Vr is generated at a non-inverted output terminal Q of the FF1.

3. 发明专利

JPH11185207A DELAY TIME CONTROL CIRCUIT AND SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPH11185207A
公开(公告)日：1999-07-09
申请号：JP35712797
申请日：1997-12-25
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： OOTA MORIYOSHI , KURAISHI MAMORU
IPC分类号： G11B5/09
摘要： PROBLEM TO BE SOLVED: To provide a delay time control circuit which can set accurately a compensation time to '0' in a write-in compensation circuit of a magnetic disk drive device. SOLUTION: Resistance elements R1, R2 are inserted to a pair of current path between a fixed delay circuit 2 and a variable delay circuit 3 in which a delay time is decided depending on a supplied current value and a current source 1 supplying a current for control to these delay circuits, while a gm amplifier 4 an input terminal of which is connected to a current output terminal of these resistance elements R1, R2 is provided. Then, an output terminal of the gm amplifier is connected to the current input terminal of the resistance elements R1, R2, and difference of current between current paths is prevented by the gm amplifier 4.

4. 发明专利

JPH08114651A TEST CIRCUIT 失效
公开(公告)号：JPH08114651A
公开(公告)日：1996-05-07
申请号：JP27309994
申请日：1994-10-13
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： KURAISHI MAMORU , HIKASA KAZUHIKO
IPC分类号： G01R31/28 , G06F11/22 , H01L21/66 , H01L21/822 , H01L27/04
摘要： PURPOSE: To provide a technique preventing such a signal as breaking a semiconductor integrated circuit from being supplied to the semiconductor integrated circuit. CONSTITUTION: The test circuit 100 constituted of a semiconductor integrated circuit 1, a pulse oscillator 3 supplying operation timing to the semiconductor integrated circuit 1 and a pulse adjusting circuit 2 adjusting the signal supplied from the pulse oscillator 3 adjusts a desired input signal to supply the same to the semiconductor integrated circuit 1 and prevents the supply of an undesired signal.

5. 发明专利

JPH07303038A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH07303038A
公开(公告)日：1995-11-14
申请号：JP9469194
申请日：1994-05-09
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： OKA MIKI , KURAISHI MAMORU
IPC分类号： H03K19/086 , H03K19/013
摘要： PURPOSE:To provide a semiconductor integrated circuit device capable of shortening the falling time of the signal output of an ECL circuit with low power consumption and increasing operating speed. CONSTITUTION:The collectors of transistors Q5, Q6 are connected to the signal output Out1, 0ut2 of the ECL circuit, and the emitters to ground potential, and a prescribed voltage lower than a threshold voltage divided by resistors R5, R6, R7, R8 is inputted to the bases of them. For example, when a signal Hi is inputted to signal input In1. the signal output Out1 goes from Hi to Lo. When the signal input In1 goes from Lo to Hi, the differentiated voltage of a capacitor C1 is added on the base of the transistor Q5 at the leading edge of a signal, and the transistor Q5 is turned on, and an electric charge accumulated in a load L1 is discharged to the ground potential, therefore, the falling time of the signal outputted from the signal output Out 1 can be shortened.

6. 发明专利

JPH09289419A SEMICONDUCTOR INTEGRATED CIRCUIT AND MAGNETIC DISK DRIVER 失效
公开(公告)号：JPH09289419A
公开(公告)日：1997-11-04
申请号：JP9992496
申请日：1996-04-22
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： KURAISHI MAMORU , OOTA MORIYOSHI
IPC分类号： G11B5/027 , H03F3/45
摘要： PROBLEM TO BE SOLVED: To prevent the unbalanced base-emitter voltage and also to prevent the reduction of output amplitude by placing a voltage/current converter between a differential output terminal and an emitter terminal and reducing the difference of output currents between both output transistors. SOLUTION: This semiconductor integrated circuit contains an emitter coupled logic(ECL) type output circuit which has a differential amplifier stage 1 and an output stage 2 consisting of a pair of output transistors TR Q1 and Q2 having the emitters connected to the output terminals OUT1 and OUT2 respectively, and a voltage/current converter 3 which is placed between the differential output terminal and the emitter terminal of both TR Q1 and Q2 of the stage 1. Then the current capacity is increased and reduced for the smaller and larger ones of both TRs (Q1, Q2) respectively. Thus, the same emitter current is secured between both TR Q1 and Q2 regardless of the constant and load of an external resistance. As a result, the unbalanced base-emitter voltage and the reduction of output amplitude can be prevented.

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