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1. 发明专利

JPS59188155A Semiconductor pellet mount 失效
标题翻译： SEMICONDUCTOR PELLET MOUNT
公开(公告)号：JPS59188155A
公开(公告)日：1984-10-25
申请号：JP6088783
申请日：1983-04-08
申请人： Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： ICHIHARA SEIICHI , KAWANOBE TOORU , OOTSUKA KENICHI , MIYAMOTO KEIJI , INABA KICHIJI , KIMOTO RIYOUSUKE
IPC分类号： H01L21/60 , H05K3/30 , H05K3/34
CPC分类号： H01L24/81 , H01L2224/14505 , H01L2224/81136 , H01L2224/81139 , H01L2224/81801 , H01L2924/014 , H05K3/303 , H05K3/3436 , H05K3/3452
摘要： PURPOSE:To enable to readily control the connecting shape of a solder, to provide high reliability and high workability, and to suppress the increase in the manufacturing steps by forming an isolator solder height not moistened to an insulating substrate to a semiconductor pellet. CONSTITUTION:A mounting surface of a semiconductor pellet 1 is composed to be electrically independent from a connecting electrode 2 of an independent electrode 18, and a connecting solder height 6 and an isolating solder height 19 are formd. A connecting electrode 5 and a hydrophobic film 17 are formed on an insulating substrate 4. The film 17 is formed by printing a metal material such as titanium, and a solder height 7 is formed on the electrode 5. A semiconductor pellet 1 and the substrate 4 are positioned, and heated to form a connecting solder 3 and an isolating solder 16. Since the solder 16 tends to maintain spherical shape of the prescribed size, the solder 3 and the connecting height as well as the connecting shape are controlled, and formed in a columnar or swelled shape.
摘要翻译：目的：为了能够容易地控制焊料的连接形状，提供高可靠性和高加工性，并且通过将未被浸透到绝缘基板的隔离器焊料高度形成为半导体芯片来抑制制造步骤的增加。构成：将半导体芯片1的安装面与独立电极18的连接电极2电气独立，形成连接焊料高度6和隔离焊料高度19。连接电极5和疏水膜17形成在绝缘基板4上。薄膜17通过印刷诸如钛的金属材料形成，并且在电极5上形成焊料高度7.半导体芯片1和基板 4被定位并被加热以形成连接焊料3和隔离焊料16.由于焊料16趋于保持规定尺寸的球形，焊料3和连接高度以及连接形状被控制并形成呈柱形或膨胀形状。

2. 发明专利

JPS59172752A Semiconductor device and manufacture thereof 失效
标题翻译：半导体器件及其制造
公开(公告)号：JPS59172752A
公开(公告)日：1984-09-29
申请号：JP4704683
申请日：1983-03-23
申请人： Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： KAWANOBE TOORU , KIMOTO RIYOUSUKE , OOTSUKA KENICHI
IPC分类号： H01L23/50 , H01L23/495
CPC分类号： H01L23/49582 , H01L2924/0002 , H01L2924/00
摘要： PURPOSE:To improve the reliability by preventing the generation of whisker phenomenon and thus improving solderability by adhering fused solder or a solder material containing Sn, Pb, etc. to the external terminal of the titled device consisting of a package wherein glass is the sealing material or the component mateial. CONSTITUTION:The package of the titled device consists of a structure wherein a base 1 and a cap 2 are hermetically sealed by adhesion and fixing with the sealing glass 3 such as low melting point glass containing e.g. PbO as one of the main components. Many outer leads 4 as the external terminals project out of both sides of this package. This outer lead 4 is made of a metallic material such as an Fe-Ni series alloy whose coefficient of thermal expansion is relatively close to that of the sealing glass 3, e.g. 42 alloy. This outer lead 4 is installed to e.g. a printed circuit board by soldering at the time of mounting, and thereby the surface of said lead 4 is entirely covered with a solder coating layer 5 except for the tip surface 4a.
摘要翻译：目的：通过防止产生晶须现象，提高可焊性，通过将熔融焊料或含有Sn，Pb等的焊锡材料附着在由包装物构成的标题装置的外部端子上，从而提高可焊性，其中玻璃是密封材料或组件材料。构成：标题装置的包装由其中底座1和盖2通过密封玻璃3的粘合和固定而密封的结构，例如含有例如低密度玻璃的低熔点玻璃。 PbO为主要成分之一。作为外部端子的许多外部引线4从该封装的两侧投影出来。该外引线4由诸如Fe-Ni系合金的金属材料制成，其热膨胀系数比密封玻璃3的热膨胀系数相对接近。 42合金。该外引线4安装到例如通过在安装时通过焊接的印刷电路板，由此除了尖端表面4a之外，所述引线4的表面完全被焊料涂层5覆盖。

3. 发明专利

JPS5967663A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS5967663A
公开(公告)日：1984-04-17
申请号：JP17768782
申请日：1982-10-12
申请人： Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： SATOU HAJIME , OOTSUKA KENICHI , SUZUKI HIROMICHI , KITAMURA WAHEI , MIKINO HIROSHI , KIMOTO RIYOUSUKE
IPC分类号： H01L23/50 , H01L23/28 , H01L23/495
CPC分类号： H01L23/49582 , H01L2224/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/49 , H01L2224/49171 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE:To improve the reliability by improving the moisture resistance by forming metallic layers of excellent adhesion property of Al, etc. at parts corresponding to the periphery of a package for a lead frame. CONSTITUTION:A semiconductor pellet 5 is fixed on a tab 2 of the lead frame 1, and electrode pads of this pellet 5 and inner leads 3 are connected respectively by wires 6. The lead frame 1 particularly the inner leads 3 have the Al layers 8 formed on front surfaces and back surfaces at the points along the outer periphery of the package 7 formed by resin mold in a later process, further preferably on side surfaces in the width direction. Thereafter, the lead frame 1 is brought to a resin mold process, and the resin package 7 is formed. The above-mentioned constitution enables to improve the adhesion property between the lead frame and the resin by the high adhesion property between the Al and the resin.
摘要翻译：目的：通过在对应于引线框架的封装的周边的部分形成Al等的优良粘附性的金属层，通过提高耐湿性来提高可靠性。构成：半导体芯片5固定在引线框架1的突片2上，并且该芯片5的电极焊盘和内部引线3分别由电线6连接。引线框架1，特别是内部引线3具有Al层8 形成在后面的工序中由树脂模具形成的封装7的外周的点处的前表面和后表面上，更优选地在宽度方向的侧表面上形成。此后，将引线框1进入树脂模制工艺，形成树脂封装7。上述结构能够通过Al和树脂之间的高粘附性而提高引线框架和树脂之间的粘附性。

4. 发明专利

JPS5943559A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS5943559A
公开(公告)日：1984-03-10
申请号：JP15387482
申请日：1982-09-06
申请人： Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： MIKINO HIROSHI , OOTSUKA KENICHI , SUZUKI HIROMICHI , KITAMURA WAHEI , SATOU HAJIME , KIMOTO RIYOUSUKE
IPC分类号： H01L23/50 , H01L23/28 , H01L23/495
CPC分类号： H01L23/49548 , H01L2224/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： PURPOSE:To prevent the production of an improper external appearance of a semiconductor device by allowing the minimum sectional position of a pinch-off part forming a tab lead to coincide with the outside surface position of a package body, thereby reducing the exposing area of the tab lead pinch-off part to suppress the adherence of solder to the exposed surface. CONSTITUTION:The outer surface 18a of a package body 18 is disposed at the pinch-off part 17 of a tab lead 13, and the outer surface 18 is allowed to coincide with the minimum sectional position 17a. In other words, it is constructed so that the outer surface 18a of the package body 18 is contacted with the thinnest position of the tab lead 13. Thus, the tab lead 18 is cut a the pinch-off part 17, the lead 14 is cut at the frame 11, and even if it is bent or cut, the cut surface of the lead 13 which is exposed partly at the outer surface 18a becomes the minimum sectional area position, and the exposed area becomes extremely small. Accordingly, when the lead is dipped in the solder in the solder coating of later step, the solder is hardly bonded to the exposed surface of the lead 13.
摘要翻译：目的：为了防止半导体器件的外观不正确，使得形成突片引线的夹紧部分的最小截面位置与封装体的外表面位置一致，从而减少了片状引线夹紧部分，以抑制焊料对暴露表面的粘附。构成：包装主体18的外表面18a设置在突片引线13的夹断部分17处，允许外表面18与最小截面位置17a重合。换句话说，其构造使得包装主体18的外表面18a与突片13的最薄的位置接触。因此，突片引线18被切断部分17，引线14是在框架11处切割，即使弯曲或切割，部分地在外表面18a处暴露的引线13的切割表面变为最小截面积位置，并且暴露面积变得非常小。因此，当在后续步骤的焊料涂层中将引线浸入焊料中时，焊料几乎不与引线13的暴露表面结合。

5. 发明专利

JPS58200559A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS58200559A
公开(公告)日：1983-11-22
申请号：JP8314282
申请日：1982-05-19
申请人： Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： SUZUKI HIROMICHI , OOTSUKA KENICHI , KITAMURA WAHEI , SATOU HAJIME , MIKINO HIROSHI , OKIKAWA SUSUMU , KIMOTO RIYOUSUKE
IPC分类号： H01L23/50 , H01L23/28 , H01L23/495
CPC分类号： H01L23/49582 , H01L2224/32245 , H01L2224/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/73265 , H01L2224/83424 , H01L2924/01012 , H01L2924/01013 , H01L2924/01022 , H01L2924/01025 , H01L2924/01078 , H01L2924/01082 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE:To improve adhesive property between a lead and a resin, and to enhance humidity-proof property and reliability while reducing cost by forming an aluminum layer to a contact interface with the resin of the lead. CONSTITUTION:The aluminum layers 4 are formed to the inner leads 3, a tab 2 and the surfaces of tab leads, and a semiconductor element pellet 5 is fixed to the tab 2. The aluminum layers 4 are formed through plating, evaporation or cladding or the like, and pure aluminum or an aluminum alloy is used. The so- called corrosion-risisting aluminum containing manganese of 0.1-5.0% or magnesium of the same % or titanium of the same % or the like may be used. Since the aluminum layers 4 interpose to the contact interface between the leads 1 and the resin 8, adhesive propety between the lead and the resin is improved by high adhesive property between aluninum and the resin, and the intrusion of moisture through the interface is prevented.
摘要翻译：目的：提高铅和树脂之间的粘合性，并且通过在与铅的树脂的接触界面形成铝层而降低成本的同时提高耐湿性和可靠性。构成：铝层4形成在内引线3，突片2和突片引线的表面上，半导体元件片5被固定到突片2上。铝层4通过电镀，蒸发或包层形成使用纯铝或铝合金。可以使用所谓的含有0.1-5.0％的含锰锰，或相同％或相同％的钛的镁等。由于铝层4插入到引线1和树脂8之间的接触界面上，所以通过铝和树脂之间的高粘附性，提高引线和树脂之间的粘合性，防止了通过界面侵入水分。

6. 发明专利

JPS59107551A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS59107551A
公开(公告)日：1984-06-21
申请号：JP21692182
申请日：1982-12-13
申请人： Hitachi Ltd , Hitachi Micro Comput Eng Ltd
发明人： SATOU HAJIME , OOTSUKA KENICHI , KITAMURA WAHEI , SUZUKI HIROMICHI , MIKINO HIROSHI , KIMOTO RIYOUSUKE , KOSAKA HIDEKI , MURAKAMI HAJIME , MASUDA MASACHIKA , TOIDA TOKUJI
IPC分类号： H01L21/60 , H01L23/498
CPC分类号： H01L24/06 , H01L23/49838 , H01L2224/05554 , H01L2224/06153 , H01L2224/48 , H01L2224/48227 , H01L2224/49 , H01L2224/49171 , H01L2224/49431 , H01L2224/49433 , H01L2924/15153 , H01L2924/15165 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： PURPOSE:To make the pin multiplication easier by a method wherein the pads of the second row group are provided in the gaps of the junction pads of the first row group. CONSTITUTION:Wirings 13 are made narrower than the junction pads 12 to arrange the other junction pads with the same shape in the spaces 15. Through these procedures, the pin multiplication may be made easier by means of containing multiple pads in a mounting substrate by forming the pads of the second row in the spaces of the pads of the first row. Besides a semiconductor chip 8 and the junction pads 13 of the mounting substrate may be connected 17 to be resin sealed 16.
摘要翻译：目的：通过其中第二行组的焊盘设置在第一行组的接合焊盘的间隙中的方法来使引脚倍增更容易。构成：布线13被制成比连接焊盘12窄，以在空间15中布置具有相同形状的其它结垫。通过这些步骤，可以通过在安装基板中包含多个焊盘来形成引脚倍增，在第一行的焊盘的空间中的第二行的焊盘。除了半导体芯片8和安装基板的连接垫13可以连接17以进行树脂密封16。

7. 发明专利

JPH0547469B2 失效
公开(公告)号：JPH0547469B2
公开(公告)日：1993-07-16
申请号：JP905285
申请日：1985-01-23
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： OOTSUKA KENICHI , KAWANOBE TOORU , KIMOTO RYOSUKE
IPC分类号： H01L21/673 , B65D85/00 , B65D85/38 , B65D85/86 , H01L21/67 , H01L21/68

8. 发明专利

JPS58139497A SOLDERING DEVICE 失效
公开(公告)号：JPS58139497A
公开(公告)日：1983-08-18
申请号：JP2113982
申请日：1982-02-15
申请人： HITACHI LTD
发明人： OOTSUKA KENICHI
IPC分类号： H05K3/34 , B23K1/08

9. 发明专利

JPS5662347A PRODUCTION OF RESIN MOLDED IC 失效
公开(公告)号：JPS5662347A
公开(公告)日：1981-05-28
申请号：JP13764379
申请日：1979-10-26
申请人： HITACHI LTD
发明人： SUZUKI AKIRA , OOTSUKI KEIZOU , TSUBOSAKI KUNIHIRO , IWATA YUTAKA , OOTSUKA KENICHI
IPC分类号： H01L23/50 , H01L21/48 , H01L21/56
摘要： PURPOSE:To reduce the man-hour by forming removing films in a space between leads on the faces susceptible to resin flashes and then, removing resin flashes possibly developed with the films, following a resin molding. CONSTITUTION:A removing film 14 is formed in a space 13 formed between leads 12. A removing film 15 is formed in portions susceptible to resin flashes 16 by resin possibly spilled through a clearance between dies and lead frame 11 during molding. When molding is made, the removing film 14 acts as a tie bar while resin flashes are developed on the removing films 14 and 15. Subsequently, if the removing films 14 and 15 are removed by a film removing agent, the resin flashes can be got rid of at the same time.

10. 发明专利

JPS5447831A SOLDER HOT DIPPING METHOD 失效
公开(公告)号：JPS5447831A
公开(公告)日：1979-04-14
申请号：JP11335877
申请日：1977-09-22
申请人： HITACHI LTD
发明人： TOYOOKA MORIO , OOTSUKA KENICHI
IPC分类号： C23C2/08 , B23K1/20 , C23C2/02 , C23C2/10 , C23C2/30
摘要： PURPOSE:To make it possible to plate a work of poor solderability with solder in a reliable and simple manner in a short time by degreasing the work and dipping it in a flux liquid over a long time to simultaneously remove an oxide film on the surface of the work at the time of coating the flux. CONSTITUTION:For example, the lead of a semiconductor device such as IC is degreased and dipped in a treating liquid with a flux action based on an org. acid, an inorg. salt, etc. with the strong action of removing an oxide film, e.g. zinc chloride, ammonium chloride and hydrochloric acid, and contg. little surfactant. An oxide film on the surface of the lead can be thoroughly removed by the treatment at 50-80 deg.C for 30-60sec. Even if the flux does not stick partially to the bent portion, the corner, etc. of the lead, solder is assuredly sticked and unevenness in sticking does not occur since the oxide film has been thoroughly removed. By this method a work of poor solderability or of a complex shape can be plated with solder in a reliable and simple manner in a short time.

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