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    • 1. 发明专利
    • APPARATUS AND METHOD FOR PHASE DETECTION
    • JPH10295073A
    • 1998-11-04
    • JP10002997
    • 1997-04-17
    • HITACHI LTD
    • NISHIOKA ATSUSHIWADA AKIHISAMIYAHARA YOJIRO
    • G01R23/10G01R25/08H02M1/08H03L7/08
    • PROBLEM TO BE SOLVED: To cope with sudden changes in the phase of an input signal, to deal with sudden changes in its amplitude and to deal with changes in frequency in a single-phase PLL circuit by a method, wherein a frequency initial value is corrected by a counted value which is found by a frequency initial-value circuit as a separate circuit from the detecting loop of the single-phase PLL circuit. SOLUTION: A frequency initial-value circuit is constituted of a filter 9, a one-cycle counting circuit 7 and a computing unit 8. In a phase-difference detection circuit 1, the phase difference Δθ between a phase detection value θ and an input signal is found on the basis of three signals, i.e., the input signal, an output signal of a multiplier 5 and a second internal reference signal. A frequency detection circuit 2 is constituted of a circuit used to amplify the phase difference Δθ and of a circuit which adds a frequency initial-value found by the frequency initial-value circuit and finds a frequency detection value. In a phase detection circuit 3, the frequency detection value is integrated so as to find a phase detection value θ. In an amplitude detection circuit 6, the difference between the output value of the input signal of the multiplier 5 is amplified, so as to find an amplitude detection value. By this constitution, the phase difference Δθ becomes small, and the output signal of the multiplier 5 is made to agree with the input signal.
    • 4. 发明专利
    • METHOD AND DEVICE FOR CURRENT DETECTION
    • JPS6484157A
    • 1989-03-29
    • JP24347887
    • 1987-09-28
    • HITACHI LTD
    • MIYAHARA YOJIROAZUSAZAWA NOBORUNEMEZAWA MASANOBU
    • G01R19/00G01R19/252H02M7/48
    • PURPOSE:To reduce the size of the device and lessen the influence of a pulsating component, and to enable high-accuracy current detection up to a low current area by converting a current into pulses proportional to its current value and counting the pulses, and then generating a pulse counted value. CONSTITUTION:When such a high current that the pulses is inputted at, for example, a sampling period Tc is supplied, a multiplied pulse signal is counted by a reversible counter 22 and the counted values M(i-1) and M(i) are stored in a register A23 every time a pulse is inputted. A counter 25, on the other hand, counts a reference clock and T(i-1) and T(I) are stored as time counted values in a register A26 every time a multiplied pulse is inputted. Then the contents of the registers A23 and A26 are stored in registers B24 and B27 and then read out at the time of sampling S(i-1) and S(i). The read current counted value M and time counted value T are therefore values at the time of pulse signal input and irrelevant to the sampling period Tss. The current value Im is therefore calculated with hgh accuracy from IM=KXM(i)-M(i-1)/T(i)-T (i-1) (T: constant).
    • 5. 发明专利
    • INVERTER CONTROLLER
    • JPS63174570A
    • 1988-07-19
    • JP322587
    • 1987-01-12
    • HITACHI LTD
    • MIYAHARA YOJIROAZUSAZAWA NOBORU
    • H02M7/48
    • PURPOSE:To prevent an element from being destroyed at the time of starting/ stopping, by setting an only self-extinguishing element on the positive side or the negative side, in an ignition state or the like, prior to suppressing a gate at the time of stopping an inverter, regardless of the ON/OFF of gate pulse. CONSTITUTION:An inverter controller is composed of a gate pulse generation circuit 6, an output circuit 9, and a minimum pulse width producing circuit 30. The producing circuit 30 is composed of an OR circuit 7, a forward/reverse short-circuiting-proof circuit 8, a clock oscillator 10, and a delay circuit 11. In this case, at the time of stopping an inverter, when a gate is suppressed immediately after gate pulse is turned ON, then the gate pulse width of its element gets smaller. At the time of starting, the gate pulse of the positive or negative element is forcibly turned ON, and the suppression is released, and a fixed time later, the forcible turn-on of the gate pulse is stopped, and an ignition state with normal gate pulse is kept. As a result, the element or the like can be prevented from being destroyed.
    • 9. 发明专利
    • SPEED SIGNAL DETECTOR
    • JPS63238464A
    • 1988-10-04
    • JP7231087
    • 1987-03-26
    • HITACHI LTD
    • KAMIYAMA KENZOMIYAHARA YOJIROAZUSAZAWA NOBORUMATSUDA TOSHIHIKO
    • G01P3/42G01P3/44
    • PURPOSE:To enable the reliable speed data of a rotor to be transmitted by converting analog signals with a frequency proportional to the number of revolutions of the rotor to digital signals. CONSTITUTION:Analog signal generating means outputs analog signals with a frequency proportional to the number of revolutions of a rotor. The analog signals are converted to digital signals by waveform shaping means. The number of pulses of the digital signals is counted by counting means. From a value counted within a speed measuring time in the counted values of the counting means, a phase angle corresponding to above-mentioned value is detected by a first phase angle detecting means. The phase angles of the analog signals at speed measurement starting time and ending time are detected by a second phase angle detecting means. From a difference between those phase angles, a phase angle corresponding to the speed measuring time is calculated by phase angle calculating means. From the ratio of the phase angle calculated by the phase angle calculating means to the speed measuring time, a digital speed signal is produced.