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1. 发明授权

US06249152B1 Data storage control circuit 有权
标题翻译：数据存储控制电路
公开(公告)号：US06249152B1
公开(公告)日：2001-06-19
申请号：US09392786
申请日：1999-09-09
申请人： Hiroyuki Tanaka , Mitsuya Ohie
发明人： Hiroyuki Tanaka , Mitsuya Ohie
IPC分类号： H04L700
CPC分类号： G06F9/30101
摘要： A shift register comprising a digital filter samples an input signal inputted from an external terminal based on a clock signal and inputs output signals a to d of the shift register constituting the results of the sampling to a gate circuit also comprising the digital filter. The voltage level of the output signal of the gate circuit makes a transition from an L level to an H level when at least three voltage levels of the output signals a to d are H levels. A sense circuit then detects changes in the voltage level of the gate circuit and outputs a signal instructing for the data outputted from the counter to be stored in the register.
摘要翻译：包括数字滤波器的移位寄存器基于时钟信号对从外部端子输入的输入信号进行采样，并将构成采样结果的移位寄存器的输出信号a至d输入到还包括数字滤波器的门电路。当输出信号a至d的至少三个电压电平为H电平时，门电路的输出信号的电压电平从L电平转变为H电平。然后，检测电路检测门电路的电压电平的变化，并输出指示从计数器输出的数据的信号以存储在寄存器中。

2. 发明申请

US20060015760A1 Semiconductor device for supplying power supply voltage to semiconductor device 有权
标题翻译：用于向半导体器件提供电源电压的半导体器件
公开(公告)号：US20060015760A1
公开(公告)日：2006-01-19
申请号：US11231824
申请日：2005-09-22
申请人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
发明人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
IPC分类号： G06F1/26
CPC分类号： G06F1/32 , G06F13/385 , G06F2213/0042 , Y02D10/14 , Y02D10/151
摘要： A semiconductor device that includes a first power supply terminal supplied with a first power supply voltage, a second power supply terminal supplied with a second power supply voltage, and a third power supply terminal supplied with a third power supply voltage. The semiconductor device also includes a first terminal being connectable to a host device and a second terminal being connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving a data outputted from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving a data outputted from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage.
摘要翻译：一种半导体器件，包括被提供有第一电源电压的第一电源端子，被提供有第二电源电压的第二电源端子和被提供有第三电源电压的第三电源端子。半导体器件还包括可连接到主机设备的第一终端和可连接到外围设备的第二终端。半导体器件还包括连接到第一端子和第一电源端子的第一电路块，并且基于第一电源电压接收从主机设备输出的数据，连接到第二端子的第二电路块和第三电源供给端子，并且基于第三电源电压接收从外围设备输出的数据，以及连接到第二电源端子的第三电路块，并且基于第二电源控制第一电路块和第二电路块的操作电压。

3. 发明授权

US06885095B2 Test circuit and multi-chip package type semiconductor device having the test circuit 失效
公开(公告)号：US06885095B2
公开(公告)日：2005-04-26
申请号：US10747230
申请日：2003-12-30
申请人： Kazutoshi Inoue , Mitsuya Ohie
发明人： Kazutoshi Inoue , Mitsuya Ohie
IPC分类号： G01R31/28 , G01R31/3185 , G06F11/22 , H01L21/822 , H01L27/04 , H01L23/02
CPC分类号： G01R31/318505 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/49175 , H01L2924/3011 , H01L2924/00014 , H01L2924/00
摘要： A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.

4. 发明授权

US5936448A Integrated circuit having independently testable input-output circuits and test method therefor 失效
标题翻译：具有可独立测试的输入输出电路的集成电路及其测试方法
公开(公告)号：US5936448A
公开(公告)日：1999-08-10
申请号：US864672
申请日：1997-05-28
申请人： Mitsuya Ohie , Kazutoshi Inoue , Toshihide Nagatome
发明人： Mitsuya Ohie , Kazutoshi Inoue , Toshihide Nagatome
IPC分类号： G01R31/28 , G01R31/317 , G01R31/3185 , H01L21/822 , H01L27/04 , H03K3/295
CPC分类号： G01R31/3185 , G01R31/31715
摘要： An integrated circuit in which Schmitt input circuits can be tested in a short time and a highly accurate test result can be obtained. The integrated circuit includes switches each passing outputs of Schmitt inverters with inputs connected to input-output ports to the inputs of tristate circuits with outputs connected to adjacent input-output ports. The outputs of the Schmitt inverters may be blocked by the switches from being passed to internal logical circuits. A switch passes the output of the Schmitt inverter to the adjacent tristate circuit during the test of the Schmitt inverter. Alternately, each half of the Schmitt inverters can be tested as predetermined control signals selectively control each switch and each tristate circuit.
摘要翻译：可以在短时间内测试施密特输入电路并且可以获得高精度的测试结果的集成电路。集成电路包括每个通过施密特逆变器的输出的开关，其输入端连接到输入 - 输出端口到三态电路的输入，输出端连接到相邻的输入 - 输出端口。施密特逆变器的输出可能被开关阻塞而被传递到内部逻辑电路。在施密特逆变器的测试期间，开关将施密特逆变器的输出传递到相邻的三态电路。或者，可以测试施密特逆变器的每一半，因为预定的控制信号选择性地控制每个开关和每个三态电路。

5. 发明授权

US5481214A Voltage to pulse-width conversion circuit 失效
标题翻译：电压到脉冲宽度转换电路
公开(公告)号：US5481214A
公开(公告)日：1996-01-02
申请号：US277063
申请日：1994-07-19
申请人： Takashi Tamaki , Mitsuya Ohie
发明人： Takashi Tamaki , Mitsuya Ohie
IPC分类号： G09G3/00 , G09G3/20 , H03K7/08 , H03M1/56 , H03K3/017
CPC分类号： H03K7/08
摘要： A voltage to pulse-width conversion circuit having counter which counts a reference frequency and produces a digital output signal having a multi-bit digital value; a decoder which decode the multi-bit digital value of the digital output signal and outputs first and second decoded signals; a digital/analog converter which receives the first and second decoded signals and produces an analog signal having an analog voltage; a comparator which compares the reference voltage and the analog voltage and produces a comparison result signal and a setting circuit which sets the level of the output node to a predetermined voltage level in response to the first and second decoded signals.
摘要翻译：具有对基准频率进行计数并产生具有多位数字值的数字输出信号的计数器的电压到脉冲宽度转换电路; 解码器，其对数字输出信号的多位数字值进行解码并输出第一和第二解码信号; 数字/模拟转换器，其接收第一和第二解码信号并产生具有模拟电压的模拟信号; 比较器，其比较所述参考电压和所述模拟电压，并产生比较结果信号和设置电路，所述设置电路响应于所述第一和第二解码信号将所述输出节点的电平设置为预定电压电平。

6. 发明授权

US07664969B2 Semiconductor device for supplying external power supply voltages to three circuit blocks including USB controller and I/O block 有权
标题翻译：用于向包括USB控制器和I / O块的三个电路块提供外部电源电压的半导体器件
公开(公告)号：US07664969B2
公开(公告)日：2010-02-16
申请号：US11231824
申请日：2005-09-22
申请人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
发明人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
IPC分类号： G06F1/26
CPC分类号： G06F1/32 , G06F13/385 , G06F2213/0042 , Y02D10/14 , Y02D10/151
摘要： A semiconductor device includes first, second and third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device and a second terminal connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving data output from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving data output from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage.
摘要翻译：半导体器件包括分别提供有第一，第二和第三电源电压的第一，第二和第三电源端子。半导体器件还包括可连接到主机设备的第一终端和可连接到外围设备的第二终端。半导体器件还包括连接到第一端子和第一电源端子并基于第一电源电压接收从主机设备输出的数据的第一电路块，连接到第二端子的第二电路块和第三电源终端，并且基于第三电源电压接收从外围设备输出的数据;以及第三电路块，连接到第二电源端子，并且基于第二电源电压来控制第一电路块和第二电路块的操作。

7. 发明授权

US07409573B2 Micro-controller having USB control unit, MC unit and oscillating circuit commonly used by the USB control unit and the MC unit 有权
标题翻译：具有由USB控制单元和MC单元通常使用的USB控制单元，MC单元和振荡电路的微控制器
公开(公告)号：US07409573B2
公开(公告)日：2008-08-05
申请号：US11154718
申请日：2005-06-17
申请人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
发明人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
IPC分类号： G06F1/00 , G06F1/04 , G06F3/00
CPC分类号： G06F1/3253 , G06F1/3203 , Y02D10/151
摘要： A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.
摘要翻译：微控制器包括USB控制单元，具有操作模式和停止模式的MC单元以及由USB控制单元和MC单元共同使用的振荡电路。 USB控制单元包括用于观看第一数据的条件的观看电路和作为第一数据的补码数据的第二数据。响应于由观看结果产生的操作控制信号和响应于MC单元的模式而改变其电压电平的振荡控制信号来控制振荡电路的操作。

8. 发明授权

US06938108B2 Micro-controller having USB control unit, MC unit and oscillating circuit commonly used by the USB control unit and the MC unit 失效
标题翻译：具有由USB控制单元和MC单元通常使用的USB控制单元，MC单元和振荡电路的微控制器
公开(公告)号：US06938108B2
公开(公告)日：2005-08-30
申请号：US09963589
申请日：2001-09-27
申请人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
发明人： Mitsuya Ohie , Kyotaro Nakamura , Shuichi Hashidate
IPC分类号： G06F15/78 , G06F1/04 , G06F1/32 , G06F1/26 , G06F13/00
CPC分类号： G06F1/3253 , G06F1/3203 , Y02D10/151
摘要： A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.
摘要翻译：微控制器包括USB控制单元，具有操作模式和停止模式的MC单元以及由USB控制单元和MC单元共同使用的振荡电路。 USB控制单元包括用于观看第一数据的条件的观看电路和作为第一数据的补码数据的第二数据。响应于由观看结果产生的操作控制信号和响应于MC单元的模式而改变其电压电平的振荡控制信号来控制振荡电路的操作。

9. 发明授权

US06580164B1 Semiconductor device and method of manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06580164B1
公开(公告)日：2003-06-17
申请号：US09685590
申请日：2000-10-11
申请人： Mitsuya Ohie
发明人： Mitsuya Ohie
IPC分类号： H01L2348
CPC分类号： H01L23/49575 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/32145 , H01L2224/451 , H01L2224/48091 , H01L2224/48145 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/4943 , H01L2924/00014 , H01L2924/07802 , H01L2924/10161 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00015 , H01L2224/05599 , H01L2924/00012
摘要： First pad electrodes for connection to leads and second pad electrodes for an internal interface, are provided over a main surface of a first LSI chip. Third pad electrodes of a second LSI chip and the second pad electrodes of the first LSI chip are respectively electrically connected to one another by wires. Circuits required as for a system LSI, which are not included in the first LSI chip, are placed over the second LSI chip, to implement a desired function used as for a system LSI by the two LSI chips. The system LSI is easily implemented by a semiconductor device wherein a plurality of LSI chips are sealed with a resin.
摘要翻译：用于连接到引线的第一焊盘电极和用于内部接口的第二焊盘电极设置在第一LSI芯片的主表面上。第二LSI芯片的第三焊盘电极和第一LSI芯片的第二焊盘电极分别通过电线彼此电连接。不包括在第一LSI芯片中的系统LSI所需的电路放置在第二LSI芯片上，以实现由两个LSI芯片用于系统LSI的期望功能。系统LSI容易地由半导体器件实现，其中多个LSI芯片用树脂密封。

10. 发明授权

US5451952A CMOS flash analog-to-digital converter with hysteresis 失效
标题翻译：具有迟滞功能的CMOS闪存模数转换器
公开(公告)号：US5451952A
公开(公告)日：1995-09-19
申请号：US107069
申请日：1993-08-17
申请人： Seiichi Yamazaki , Mitsuya Ohie , Yasuhiro Shin
发明人： Seiichi Yamazaki , Mitsuya Ohie , Yasuhiro Shin
IPC分类号： G01R19/165 , H03K5/08 , H03M1/36 , H03M1/34
CPC分类号： H03M1/365
摘要： A flash analog-to-digital converter has CMOS comparators that compare an analog input signal with internal reference voltages and produce internal output signals. Each comparison is performed according to the threshold voltage of an inverter. A threshold control circuit in each comparator adjusts this threshold voltage according to the internal output signal, thereby providing hysteresis. A logic circuit receives the internal output signals from all the comparators and generates a digital output signal. The hysteresis of the comparators keeps the digital output signal from oscillating between adjacent values when the analog input signal is near one of the internal reference voltages.
摘要翻译：闪存模数转换器具有CMOS比较器，将模拟输入信号与内部参考电压进行比较，并产生内部输出信号。根据逆变器的阈值电压进行每次比较。每个比较器中的阈值控制电路根据内部输出信号调整该阈值电压，从而提供滞后。逻辑电路从所有比较器接收内部输出信号并产生数字输出信号。当模拟输入信号接近内部参考电压之一时，比较器的滞后保持数字输出信号在相邻值之间振荡。

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