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1. 发明授权

US06679950B2 Cleaning method and cleaner 失效
标题翻译：清洁方法和清洁剂
公开(公告)号：US06679950B2
公开(公告)日：2004-01-20
申请号：US09892742
申请日：2001-06-28
申请人： Hiroshi Tomita , Motoyuki Sato , Soichi Nadahara , Mitsuhiko Shirakashi , Kenya Ito
发明人： Hiroshi Tomita , Motoyuki Sato , Soichi Nadahara , Mitsuhiko Shirakashi , Kenya Ito
IPC分类号： B08B300
CPC分类号： H01L21/67046 , B01F3/04099 , B01F3/0446 , B01F5/0476 , B01F2003/0439 , B01F2003/04886 , B01F2201/01 , B08B1/00 , B08B1/04 , B08B3/02 , Y10S134/902
摘要： A substrate cleaning method of the present invention enables effective cleaning of a wafer having a recess therein without causing any increase in cleaning costs. Ozone gas and ammonia water are supplied to an area right above a wafer 7 having a recess therein, and a gas-dissolving liquid is produced by dissolving the ozone gas in the ammonia water. The gas-dissolving liquid is used to carry out contact and non-contact types of physical cleaning on the wafer.
摘要翻译：本发明的基板清洗方法能够有效地清洗其中具有凹槽的晶片，而不会导致清洁成本的任何增加。将臭氧气体和氨水供给到其中具有凹部的晶片7的正上方的区域，并且通过将臭氧气体溶解在氨水中来制造气体溶解液。气溶液用于在晶片上进行接触和非接触式的物理清洁。

2. 发明授权

US06431185B1 Apparatus and method for cleaning a semiconductor substrate 失效
标题翻译：用于清洁半导体衬底的装置和方法
公开(公告)号：US06431185B1
公开(公告)日：2002-08-13
申请号：US09401864
申请日：1999-09-22
申请人： Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
发明人： Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
IPC分类号： B08B600
CPC分类号： H01L21/67051 , B08B3/02 , B08B2203/0288 , Y10S134/902
摘要： There is proposed an apparatus and method for cleaning a semiconductor substrate, which make it possible to minimize the adhesion of mist in a cleaning tank at the occasion of cleaning a semiconductor substrate, to realize a high removal effect of residual polishing particles, and to enable to obtain a clean surface. In view of preventing a mist generated by the jet of high pressure water from re-adhering to the substrate during the cleaning of a semiconductor substrate, a cover member is disposed at a mist-generating region so as to prevent the splash of the mist. Additionally, a cavity is caused to generate by contacting a high pressure water with a still water, and high-frequency generated by the generation of the cavity is utilized for removing the residual polishing particles. Alternatively, the ejection of high pressure water against the surface of the substrate is performed in a liquid phase such as ultrapure water, thereby preventing the generation of mist.
摘要翻译：提出了一种用于清洁半导体衬底的装置和方法，这使得可以在清洁半导体衬底的情况下最小化清洗槽中的雾的粘附性，以实现残留的抛光颗粒的高的去除效果，并且使得能够以获得干净的表面。考虑到在清洁半导体衬底期间防止高压水射流产生的雾再次粘附到衬底上，在雾化产生区域处设置一个盖构件，以防止雾沫的飞溅。此外，通过使高压水与静止水接触而产生空腔，并且通过产生空腔产生的高频被用于去除残留的抛光颗粒。或者，将高压水喷射到基板的表面，以超纯水等液相进行，从而防止产生雾。

3. 发明授权

US06673163B2 Apparatus and method for cleaning a semiconductor substrate 失效
标题翻译：用于清洁半导体衬底的装置和方法
公开(公告)号：US06673163B2
公开(公告)日：2004-01-06
申请号：US10179885
申请日：2002-06-26
申请人： Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
发明人： Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
IPC分类号： B08B300
CPC分类号： H01L21/67051 , B08B3/02 , B08B2203/0288 , Y10S134/902
摘要： There is proposed an apparatus and method for cleaning a semiconductor substrate, which make it possible to minimize the adhesion of mist in a cleaning tank at the occasion of cleaning a semiconductor substrate, to realize a-high removal effect of residual polishing particles, and to enable to obtain a clean surface. In view of preventing a mist generated by the jet of high pressure water from re-adhering to the substrate during the cleaning of a semiconductor substrate, a cover member is disposed at a mist-generating region so as-to prevent the splash of the mist. Additionally, a cavity is caused to generate by contacting a high pressure water with a still water, and high-frequency generated by the generation of the cavity is utilized for removing the residual polishing particles. Alternatively, the ejection of high pressure water against the surface of the substrate is performed in a liquid phase such-as ultrapure water, thereby preventing the generation of mist.
摘要翻译：提出了一种用于清洁半导体衬底的装置和方法，其使得可以在清洁半导体衬底的情况下使清洁槽中的雾的粘附最小化，以实现残留的抛光颗粒的高的去除效果，并且使得能够获得干净的表面。考虑到在清洁半导体衬底期间防止高压水射流产生的雾再次附着在衬底上，覆盖构件设置在产生雾的区域，以防止雾气的飞溅。此外，通过使高压水与静止水接触而产生空腔，并且通过产生空腔产生的高频被用于去除残留的抛光颗粒。或者，将高压水喷射到基板的表面上，以超纯水等液相进行，从而防止产生雾。

4. 发明授权

US07055535B2 Holding unit, processing apparatus and holding method of substrates 失效
标题翻译：保持单元，加工设备和基板的保持方法
公开(公告)号：US07055535B2
公开(公告)日：2006-06-06
申请号：US10629678
申请日：2003-07-30
申请人： Junji Kunisawa , Norio Kimura , Kenya Ito , Akira Fukunaga , Yuuki Inoue , Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
发明人： Junji Kunisawa , Norio Kimura , Kenya Ito , Akira Fukunaga , Yuuki Inoue , Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
IPC分类号： B08B3/08 , B25B11/00 , H01L21/306
CPC分类号： H01L21/6838 , Y10S134/902 , Y10T279/11
摘要： A holding unit holds a substrate to enable a surface of the substrate to be processed. The unit has a vacuum suction member that comes into contact with a peripheral portion of the surface of the substrate and sucks the substrate. A processing apparatus holds the wafer stably and allows an edge, a bevel portion and/or a back surface of the wafer to be processed.
摘要翻译：保持单元保持基板以使得能够处理基板的表面。该单元具有与基板的表面的周边部分接触并吸附基板的真空吸附构件。处理装置稳定地保持晶片，并且允许晶片的边缘，斜面部分和/或背面被处理。

5. 发明授权

US06420271B2 Method of forming a pattern 失效
标题翻译：形成图案的方法
公开(公告)号：US06420271B2
公开(公告)日：2002-07-16
申请号：US09814839
申请日：2001-03-23
申请人： Yasuhiko Sato , Eishi Shiobara , Motoyuki Sato , Yasunobu Onishi , Hiroshi Tomita , Tokuhisa Ohiwa , Junko Ohuchi , Hisataka Hayashi
发明人： Yasuhiko Sato , Eishi Shiobara , Motoyuki Sato , Yasunobu Onishi , Hiroshi Tomita , Tokuhisa Ohiwa , Junko Ohuchi , Hisataka Hayashi
IPC分类号： H01L214763
CPC分类号： H01L21/31144 , G03F7/085 , G03F7/09 , H01L21/3081 , H01L21/32139
摘要： A method of forming a pattern comprising the steps of, forming a lower film on a substrate, the lower film being a film containing carbon atom at a ratio of 80 wt % or more, or a vapor phase deposition film, either applying an adhesion-promoting treatment to a surface of the lower film or forming an adhesion-promoting on the lower film, forming an intermediate film on a surface of the lower film, forming a resist film on the intermediate film, forming a resist pattern by conducting a patterning exposure of the resist film, forming an intermediate film pattern by transferring the resist pattern to the intermediate film, and forming a lower film pattern by transferring the intermediate film pattern to the lower film.
摘要翻译：一种形成图案的方法，包括以下步骤：在基底上形成下膜，下膜是含有80重量％以上的碳原子的膜或气相沉积膜，促进对下膜的表面的处理或在下膜上形成粘合促进，在下膜的表面上形成中间膜，在中间膜上形成抗蚀剂膜，通过进行图案曝光形成抗蚀剂图案的抗蚀剂膜，通过将抗蚀剂图案转印到中间膜而形成中间膜图案，并通过将中间膜图案转印到下膜来形成下膜图案。

6. 发明授权

US08779410B2 Resistance change memory and method of manufacturing the same 有权
标题翻译：电阻变化记忆及其制造方法
公开(公告)号：US08779410B2
公开(公告)日：2014-07-15
申请号：US13355692
申请日：2012-01-23
申请人： Motoyuki Sato , Yoshiaki Asao , Takashi Obara , Takashi Nakazawa
发明人： Motoyuki Sato , Yoshiaki Asao , Takashi Obara , Takashi Nakazawa
IPC分类号： H01L21/00 , H01L29/06 , H01L27/22
CPC分类号： H01L27/228
摘要： According to one embodiment, a resistance change memory includes resistance change elements, vias and sidewall insulating layers, the elements and the vias provided alternately in a first direction and a second direction orthogonal to the first direction, and the sidewall insulating layers provided on sidewalls of the elements. The elements are provided in a lattice pattern having a constant pitch. A thickness of each of the sidewall insulating layers in a direction orthogonal to the sidewalls is a value for contacting the sidewall insulating layers each other or more to form holes between the sidewall insulating layers. The vias are provided in the holes respectively.
摘要翻译：根据一个实施例，电阻变化存储器包括电阻变化元件，通路和侧壁绝缘层，沿与第一方向正交的第一方向和第二方向上交替设置的元件和通孔，以及设置在第二方向上的侧壁绝缘层元素。元件以具有恒定间距的格子图案提供。每个侧壁绝缘层在与侧壁正交的方向上的厚度是用于使侧壁绝缘层彼此接触或接触以在侧壁绝缘层之间形成孔的值。通孔分别设置在孔中。

7. 发明授权

US08754465B2 Semiconductor device with fixed charge layers 失效
标题翻译：具有固定电荷层的半导体器件
公开(公告)号：US08754465B2
公开(公告)日：2014-06-17
申请号：US13603704
申请日：2012-09-05
申请人： Motoyuki Sato
发明人： Motoyuki Sato
IPC分类号： H01L29/788
CPC分类号： H01L29/788 , H01L21/28273 , H01L29/42332 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66825 , H01L29/7883
摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a first floating gate electrode on the tunnel insulating film, an inter-floating gate insulating film on the first floating gate electrode, a second floating gate electrode on the inter-floating gate insulating film, an inter-electrode insulating film on the second floating gate electrode, and a control gate electrode on the inter-electrode insulating film. The inter-floating gate insulating film includes a main insulating film, and a first fixed charge layer between the main insulating film and the second floating gate electrode and having negative fixed charges.
摘要翻译：根据一个实施例，半导体器件包括半导体衬底，半导体衬底上的隧道绝缘膜，隧道绝缘膜上的第一浮栅，第一浮栅上的浮置浮栅绝缘膜，第二浮置互栅极绝缘膜上的栅电极，第二浮栅上的电极间绝缘膜，以及电极间绝缘膜上的控制栅电极。互浮栅极绝缘膜包括主绝缘膜和主绝缘膜和第二浮栅之间的第一固定电荷层，并具有负固定电荷。

8. 发明授权

US08037384B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08037384B2
公开(公告)日：2011-10-11
申请号：US12340549
申请日：2008-12-19
申请人： Takumi Hasegawa , Motoyuki Sato , Tomoji Nakamura , Nobuo Konami , Jun Matsushima
发明人： Takumi Hasegawa , Motoyuki Sato , Tomoji Nakamura , Nobuo Konami , Jun Matsushima
IPC分类号： G01R31/28
CPC分类号： G01R31/318533
摘要： A semiconductor device includes a test target circuit; scan chains that enable scanning of the test target circuit; a first random number generation circuit that forms test patterns supplied to the scan chains; a second random number generation circuit that is provided separately from the first random number generation circuit; and a random number control circuit that uses the random numbers generated by the second random number generation circuit to change the random numbers generated by the first random number generation circuit. In a test of the semiconductor device, since a period of a clock of a scan chain does not need to be longer than that of a clock of a pattern generator, the number of clocks of the pattern generator needed for a test can be prevented from increasing. Accordingly, a test time can be prevented from increasing.
摘要翻译：半导体器件包括测试目标电路; 可扫描测试目标电路的扫描链; 形成提供给扫描链的测试图案的第一随机数生成电路; 与第一随机数生成电路分开设置的第二随机数生成电路; 以及使用由第二随机数生成电路产生的随机数来改变由第一随机数生成电路产生的随机数的随机数控制电路。在半导体器件的测试中，由于扫描链的时钟周期不需要长于模式发生器的时钟周期，因此可以防止测试所需的模式发生器的时钟数增加。因此，可以防止测试时间增加。

9. 发明申请

US20100003813A1 Semiconductor device and method of fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20100003813A1
公开(公告)日：2010-01-07
申请号：US12585334
申请日：2009-09-11
申请人： Katsuyuki Sekine , Akio Kaneko , Motoyuki Sato , Seiji Inumiya , Kazuhiro Eguchi
发明人： Katsuyuki Sekine , Akio Kaneko , Motoyuki Sato , Seiji Inumiya , Kazuhiro Eguchi
IPC分类号： H01L21/28
CPC分类号： C23C16/401 , C23C16/56 , H01L21/02329 , H01L21/3145
摘要： According to the present invention, there is provided a semiconductor device comprising: a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode, wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
摘要翻译：根据本发明，提供了一种半导体器件，包括：选择性地形成在半导体衬底的预定区域上的栅极绝缘膜; 形成在所述栅极绝缘膜上的栅电极; 以及在所述半导体衬底的表面部分中形成在位于所述栅极电极下方的沟道区域的两侧上的源极区和漏极区，其中所述栅极绝缘膜与所述栅电极接触的界面中的碳浓度不大于5×1022原子/ cm3。

10. 发明授权

US07521309B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07521309B2
公开(公告)日：2009-04-21
申请号：US11948344
申请日：2007-11-30
申请人： Akio Kaneko , Motoyuki Sato , Katsuyuki Sekine , Tomohiro Saito , Kazuaki Nakajima , Tomonori Aoyama
发明人： Akio Kaneko , Motoyuki Sato , Katsuyuki Sekine , Tomohiro Saito , Kazuaki Nakajima , Tomonori Aoyama
IPC分类号： H01L21/336
CPC分类号： H01L29/517 , H01L21/28097 , H01L21/3215 , H01L21/823814 , H01L21/823835 , H01L21/823842 , H01L29/66507
摘要： A method of manufacturing a semiconductor device having a MOSFET of a first conductivity type and a MOSFET of a second conductivity type different from the first conductivity type formed on a semiconductor substrate, the method has: forming a gate insulating film; forming a first gate electrode layer, and forming a second gate electrode layer; forming a first metal containing layer on said first gate electrode layer and said second gate electrode layer; forming a second metal containing layer for preventing diffusion of a metal on said first metal containing layer; forming a third metal containing layer on said second gate electrode layer from which said first metal containing layer and said second metal containing layer are selectively removed, the third metal containing layer having a thickness different from the thickness of said first metal containing layer in a case where the third metal containing layer contains the same metal or alloy as the metal or alloy contained in said first metal containing layer; and performing a thermal processing, thereby causing reaction between the metal contained in said first metal containing layer and said first gate electrode layer to convert said first gate electrode layer into an alloy and causing reaction between the metal contained in said third metal containing layer and said second gate electrode layer to convert said second gate electrode layer into an alloy, thereby forming gate electrodes of different compositions.
摘要翻译：一种制造具有第一导电类型的MOSFET的半导体器件的方法和形成在半导体衬底上的与第一导电类型不同的第二导电类型的MOSFET，该方法具有：形成栅极绝缘膜; 形成第一栅电极层，形成第二栅电极层; 在所述第一栅电极层和所述第二栅电极层上形成第一含金属层; 形成用于防止金属在所述第一金属含有层上的扩散的第二含金属层; 在所述第二栅电极层上形成第三金属含有层，从所述第二金属含有层和所述第二金属含有层被选择性地除去，所述第三金属含有层的厚度与所述第一金属含有层的厚度不同其中所述第三含金属层包含与所述第一含金属层中所含的金属或合金相同的金属或合金; 并进行热处理，从而使包含在所述第一金属含有层中的金属与所述第一栅极电极层之间产生反应，将所述第一栅电极层转换成合金，并引起所述第三金属含有层中含有的金属与所述第二栅极电极层，以将所述第二栅电极层转换成合金，从而形成不同组成的栅电极。

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