专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20050024535A1 Image display apparatus 审中-公开
标题翻译：图像显示装置
公开(公告)号：US20050024535A1
公开(公告)日：2005-02-03
申请号：US10901975
申请日：2004-07-30
申请人： Hiroshi Tatemori , Masayoshi Murayama , Hiroshi Kida , Tsutomu Ohtani , Nobuyuki Tadehara
发明人： Hiroshi Tatemori , Masayoshi Murayama , Hiroshi Kida , Tsutomu Ohtani , Nobuyuki Tadehara
IPC分类号： G06T3/40 , G09G5/00 , G09G5/36 , H04N5/45 , H04N11/20 , H04N3/27
CPC分类号： G09G5/00 , G06T3/40 , G09G2340/0407 , G09G2340/12 , H04N7/012 , H04N7/0122 , H04N7/0125
摘要： An image display apparatus is provided with: a display device for displaying an image with a resolution of 1280×768; and an image processing device for making graphic video information for displaying a GUI, so as not to exceed the resolution of 1280×768 and according to a difference in resolution of primitive video information with a resolution of 1920×1080, and for combining the made graphic video information with the primitive video information. The display device extracts the graphic video information from the primitive video information, to thereby display the GUI based on the extracted graphic video information.
摘要翻译：图像显示装置具有：显示装置，用于显示分辨率为1280×768的图像; 以及图像处理装置，用于制作用于显示GUI的图形视频信息，以便不超过1280×768的分辨率，并且根据分辨率为1920×1080的原始视频信息的分辨率的差异，并且将所制作的图形视频信息与原始视频信息。显示设备从原始视频信息中提取图形视频信息，从而基于所提取的图形视频信息显示GUI。

2. 发明授权

US06775085B2 Apparatus for recording and reproducing information and information reproducing method 失效
公开(公告)号：US06775085B2
公开(公告)日：2004-08-10
申请号：US10024602
申请日：2001-12-21
申请人： Masaaki Saito , Masayoshi Murayama , Hiroshi Kida , Tsutomu Ohtani , Ichiro Miyake , Tsutomu Takahashi , Kenichiro Tada , Yasuyuki Noda , Gaku Yamamura , Kazutomo Watanabe
发明人： Masaaki Saito , Masayoshi Murayama , Hiroshi Kida , Tsutomu Ohtani , Ichiro Miyake , Tsutomu Takahashi , Kenichiro Tada , Yasuyuki Noda , Gaku Yamamura , Kazutomo Watanabe
IPC分类号： G11B1902
CPC分类号： G11B19/12 , G11B19/04
摘要： Disclosed is an apparatus for recording and reproducing information and an information reproducing method in which the reproducing operation can be restarted from a position where reproduction was interrupted. The restart is possible for all of information contents recorded on a recording medium and without the need of troublesome operations. For this purpose, reproduction history information representing a reproduction history of each of the information contents recorded on the recording medium is stored in a management memory.

3. 发明授权

US07142773B2 Information recording and reproducing apparatus with a ring buffer and method for monitoring ring buffer 失效
公开(公告)号：US07142773B2
公开(公告)日：2006-11-28
申请号：US09987453
申请日：2001-11-14
申请人： Gaku Yamamura , Ichiro Miyake , Tsutomu Takahashi , Kenichiro Tada , Yasuyuki Noda , Kazutomo Watanabe , Masayoshi Murayama , Hiroshi Kida , Tsutomu Ohtani , Masaaki Saito
发明人： Gaku Yamamura , Ichiro Miyake , Tsutomu Takahashi , Kenichiro Tada , Yasuyuki Noda , Kazutomo Watanabe , Masayoshi Murayama , Hiroshi Kida , Tsutomu Ohtani , Masaaki Saito
IPC分类号： H04N7/10
CPC分类号： G11B20/10 , G11B2020/1062 , G11B2020/10666 , H04N5/76 , H04N5/781
摘要： An information recording and reproducing apparatus with a ring buffer, in which user can know a state of the ring buffer in a real-time manner and a monitoring method of the ring buffer. A ring buffer monitor image signal is generated which indicates an image showing a relative positional relation of a current recording position and a current reproducing position in the ring buffer.

4. 发明授权

US06529854B2 Coordinate position detecting method and display apparatus using the same 失效
标题翻译：坐标位置检测方法及使用其的显示装置
公开(公告)号：US06529854B2
公开(公告)日：2003-03-04
申请号：US09840189
申请日：2001-04-24
申请人： Hiroshi Kida , Masayoshi Murayama , Masaaki Saito , Tsutomu Ohtani
发明人： Hiroshi Kida , Masayoshi Murayama , Masaaki Saito , Tsutomu Ohtani
IPC分类号： G01C1700
CPC分类号： G06F3/0421
摘要： A coordinate position detecting method uses a plurality of light emitting elements and a plurality of light receiving elements located on mutually opposite sides, all the elements being arranged at a predetermined interval in horizontal and vertical directions, with each pair of mutually opposed light emitting element and light receiving element forming a light beam path, such that the coordinate position of a light blocking object can be detected once the light beam path is blocked. The method comprises: storing N previous coordinate datas obtained when detecting a movement of the light blocking ojecte, using n (1≦n≦N) coordinate datas of the N previous coordinate datas to calculate a coordinate position of the light blocking object; and changing the number of the coordinate datas for use in calculating the coordinate position, in accordance with a speed of the movment of the light blocking object.
摘要翻译：坐标位置检测方法使用多个发光元件和位于相互相对的两侧的多个光接收元件，所有元件以水平和垂直方向以预定间隔布置，每对相互相对的发光元件和光接收元件形成光束路径，使得一旦光束路径被阻挡就可以检测到遮光物体的坐标位置。该方法包括：使用N个先前坐标数据的n（1 <= n <= N）坐标数据来存储当检测到光阻止物体的运动时获得的N个先前坐标数据，以计算遮光对象的坐标位置; 以及根据遮光对象的移动速度来改变用于计算坐标位置的坐标数据的数量。

5. 发明申请

US20050235313A1 Program information acquisition apparatus, program information acquisition method, and program information acquisition program 审中-公开
标题翻译：节目信息获取装置，节目信息获取方法和节目信息采集程序
公开(公告)号：US20050235313A1
公开(公告)日：2005-10-20
申请号：US11092990
申请日：2005-03-30
申请人： Akihito Yamada , Masayoshi Murayama , Hiroshi Kida , Nozomu Kikuchi , Hideyuki Uchiyama , Takanori Harada
发明人： Akihito Yamada , Masayoshi Murayama , Hiroshi Kida , Nozomu Kikuchi , Hideyuki Uchiyama , Takanori Harada
IPC分类号： H04N5/445 , H04N5/50 , H04N7/025 , H04N7/03 , H04N7/035
CPC分类号： H04N5/44543 , H04N7/16 , H04N21/4383 , H04N21/44222 , H04N21/4432 , H04N21/4532 , H04N21/4821 , H04N21/84
摘要： A program information acquisition apparatus includes a program information acquisition unit, a program information accumulation unit, and a program information acquisition determining unit. In this configuration, a start of an acquisition operation by the program information acquisition unit is determined based on an information accumulation status of the program information accumulation unit. Thus, program information distributed from a desired reception target can be accumulated as the latest information as much as possible. Since unneeded program information is not acquired, program information acquisition with high energy saving effects is made possible.
摘要翻译：节目信息获取装置包括节目信息获取单元，节目信息存储单元和节目信息获取确定单元。在该配置中，基于节目信息聚积单元的信息累积状态来确定节目信息获取单元的获取操作的开始。因此，可以尽可能多地累积从期望的接收目标分发的节目信息作为最新信息。由于不获取不需要的节目信息，所以能够节省高节能效果的节目信息获取成为可能。

6. 发明授权

US08380897B2 Host computer, computer terminal, and card access method 失效
标题翻译：主机，计算机终端和卡访问方式
公开(公告)号：US08380897B2
公开(公告)日：2013-02-19
申请号：US13486661
申请日：2012-06-01
申请人： Masayoshi Murayama
发明人： Masayoshi Murayama
IPC分类号： G06F3/00
CPC分类号： G06F13/385 , Y02D10/14 , Y02D10/151
摘要： According to one embodiment, the host controller includes a transmission circuit that encodes transmission data, according to a serial transfer format, a reception circuit that decodes received data, according to the serial transfer format, a variable frequency clock generator that generates a card clock and a transfer clock, a card clock output unit that outputs the card clock to the memory card, an interface unit that includes both a transmission interface that transfers the transmission data from the transmission circuit to the memory card in synchronization with the transfer clock and a reception interface that transfers received data from the memory card to the reception circuit in synchronization with the transfer clock, and a setting register circuit that holds setting information for an input/output method of the memory card, and controls frequency of the transfer clock generated by the variable frequency clock generator, based on the setting information.
摘要翻译：根据一个实施例，主机控制器包括：传输电路，根据串行传输格式，根据串行传输格式对接收数据进行解码的接收电路，产生卡时钟的可变频率时钟发生器，以及传送时钟，将卡时钟输出到存储卡的卡时钟输出单元，包括传输接口的接口单元，传输接口与传送时钟同步地将传输数据从传输电路传送到存储卡，接收接口，其将接收到的数据从存储卡传送到与传送时钟同步的接收电路;以及设置寄存器电路，其保存用于存储卡的输入/输出方法的设置信息，并且控制由存储卡生成的传送时钟的频率可变频时钟发生器，根据设定信息。

7. 发明申请

US20120054531A1 HOST CONTROLLER, SEMICONDUCTOR DEVICE AND METHOD FOR SETTING SAMPLING PHASE 失效
标题翻译：主机控制器，半导体器件和设置采样相位的方法
公开(公告)号：US20120054531A1
公开(公告)日：2012-03-01
申请号：US13075309
申请日：2011-03-30
申请人： Masayoshi Murayama
发明人： Masayoshi Murayama
IPC分类号： G06F1/04
CPC分类号： H03L7/081 , G06F2213/0038
摘要： According to one embodiment, there is provided a host controller, which samples reception data in a VDS mode and an FDS mode, includes a VDS phase register which holds a phase shift amount in the VDS mode, an FDS phase register which holds a phase shift amount in the FDS mode, a mode setting unit configured to indicate in which of the VDS mode and the FDS mode data is sampled, a sampling position setting unit which selects the phase shift amount set in one of the VDS and the FDS phase register in accordance with a setting value of the mode setting unit, and provides the selected phase shift amount as a sampling position, and a clock phase shift unit which shifts a phase of an input clock signal in accordance with the shift amount, and provides the shifted input clock signal as a sampling clock.
摘要翻译：根据一个实施例，提供了以VDS模式和FDS模式对接收数据进行采样的主机控制器，包括保持VDS模式中的相移量的VDS相位寄存器，保持相移的FDS相位寄存器 FDS模式中的相位偏移量被设定为在VDS模式和FDS模式数据中的哪一个被采样的模式设定单元，根据模式设定单元的设定值，提供所选择的相移量作为采样位置，以及时钟相移单元，其根据移位量移位输入时钟信号的相位，并提供偏移输入时钟信号作为采样时钟。

8. 发明授权

US5591870A Process for producing a vanadium-phosphorus oxide catalyst precursor 失效
标题翻译：钒 - 磷氧化物催化剂前体的制备方法
公开(公告)号：US5591870A
公开(公告)日：1997-01-07
申请号：US480916
申请日：1995-06-07
申请人： Masakatsu Hatano , Masayoshi Murayama , Kenji Shima , Masumi Ito
发明人： Masakatsu Hatano , Masayoshi Murayama , Kenji Shima , Masumi Ito
IPC分类号： B01J23/22 , B01J27/198 , C07C51/215 , C07C57/05
CPC分类号： C07C51/215 , B01J23/002 , B01J23/22 , B01J27/198 , B01J2523/00
摘要： A process for producing a vanadium-phosphorus oxide-containing catalyst precursor, which comprises (a) introducing into an organic solvent a vanadium alkoxide as a pentavalent vanadium compound and a phosphorus compound in the presence of a reducing agent capable of reducing the pentavalent vanadium compound to a tetravalent state, (b) hydrolyzing at least a part of the vanadium alkoxide before or after the introduction of the phosphorus compound, and (c) heating the vanadium-containing liquid medium obtained in step (b), in the presence of the phosphorus compound to reduce at least a part of vanadium to a tetravalent state.
摘要翻译：一种含钒 - 氧化磷的催化剂前体的制备方法，其包括（a）在能够还原五价钒化合物的还原剂的存在下将有机溶剂中的钒醇盐作为五价钒化合物和磷化合物引入（b）在引入磷化合物之前或之后水解至少一部分钒醇盐，和（c）在步骤（b）中获得的含钒液体介质中，在磷化合物以将至少一部分钒还原成四价态。

9. 发明授权

US5032838A Variable length code parallel decoding apparatus and method 失效
标题翻译：可变长度码并行解码装置及方法
公开(公告)号：US5032838A
公开(公告)日：1991-07-16
申请号：US428287
申请日：1989-10-26
申请人： Masayoshi Murayama , Fumitaka Sato , Kensuke Adachi , Shigekazu Sumita
发明人： Masayoshi Murayama , Fumitaka Sato , Kensuke Adachi , Shigekazu Sumita
IPC分类号： H03M7/40 , H03M7/42
CPC分类号： H03M7/425
摘要： When a variable length code requires two cycles in decoding, portions of code bit strings serving as objects to be decoded in first and second cycles of the variable length code are caused to overlap each other. In the first cycle, a non-overlapping portion is determined as a decoded portion. A length of a code bit string actually decoded in the first cycle is determined as a length of the code bit string serving as the object to be decoded in the first cycle excluding the length of the overlapping portion so as to determine a start position of the code bit string serving as the object to be decoded in the second cycle.
摘要翻译：当可变长度代码在解码中需要两个周期时，引起用作可变长度码的第一和第二周期中要解码的对象的码位串的部分彼此重叠。在第一周期中，将非重叠部分确定为解码部分。在第一周期中实际解码的码位串的长度被确定为用作除了重叠部分的长度之外的第一周期中要解码的对象的码位串的长度，以便确定用作第二周期中要解码的对象的码位串。

10. 发明授权

US08214563B2 Host computer, computer terminal, and card access method 失效
标题翻译：主机，计算机终端和卡访问方式
公开(公告)号：US08214563B2
公开(公告)日：2012-07-03
申请号：US12823632
申请日：2010-06-25
申请人： Masayoshi Murayama
发明人： Masayoshi Murayama
IPC分类号： G06F3/00
CPC分类号： G06F13/385 , Y02D10/14 , Y02D10/151
摘要： According to one embodiment, the host controller includes a transmission circuit that encodes transmission data, according to a serial transfer format, a reception circuit that decodes received data, according to the serial transfer format, a variable frequency clock generator that generates a card clock and a transfer clock, a card clock output unit that outputs the card clock to the memory card, an interface unit includes a transmission interface that transfers the transmission data from the transmission circuit to the memory card in synchronization with the transfer clock, and a reception interface that transfers received data from the memory card to the reception circuit in synchronization with the transfer clock, and a setting register circuit that holds setting information concerning an input/output method of the memory card, and controls frequency of the transfer clock generated by the variable frequency clock generator, based on the setting information.
摘要翻译：根据一个实施例，主机控制器包括：传输电路，根据串行传输格式，根据串行传输格式对接收数据进行解码的接收电路，产生卡时钟的可变频率时钟发生器，以及传输时钟，将时钟输出到存储卡的卡时钟输出单元，接口单元包括传输接口，该传输接口与传输时钟同步地将传输数据从传输电路传送到存储卡;接收接口其将接收到的数据从存储卡传送到与传送时钟同步的接收电路，以及设置寄存器电路，其保存关于存储卡的输入/输出方法的设置信息，并且控制由变量产生的传送时钟的频率频率时钟发生器，基于设置信息。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式