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    • 1. 发明授权
    • Storage control apparatus
    • 存储控制装置
    • US08499112B2
    • 2013-07-30
    • US13203830
    • 2011-08-16
    • Hiroshi MineKen NomuraDamien Le MoalTadashi TakeuchiMasaaki Iwasaki
    • Hiroshi MineKen NomuraDamien Le MoalTadashi TakeuchiMasaaki Iwasaki
    • G06F13/24
    • G06F9/45533G06F9/5077G06F11/0712G06F11/0724G06F11/0793G06F11/301G06F11/3055
    • An aspect of the invention is a storage control apparatus, comprising a plurality of processors, a memory, an I/O device coupled to a storage device, a virtualization module that allocates a first processor to a first guest and a second processor to a second guest from among the plurality of processors, and an interrupt control module that receives an interrupt from the I/O device and transmits the interrupt to any one of the plurality of processors, wherein the virtualization module comprises, a state detection module that detects at least one of a state of the first guest and a state of the first processor, and an interrupt delivery destination control module that switches the interrupt with respect to the first processor to the second processor when at least one of the state of the first guest and the state of the first processor becomes a predetermined state.
    • 本发明的一个方面是一种存储控制装置,包括多个处理器,存储器,耦合到存储装置的I / O装置,将第一处理器分配给第一客户机和第二处理器的虚拟化模块, 多个处理器中的客户端以及从所述I / O设备接收中断并将所述中断发送到所述多个处理器中的任何一个的中断控制模块,其中所述虚拟化模块包括:至少检测到的状态检测模块 第一访客的状态和第一处理器的状态之一,以及当第一访客和第二处理器的状态中的至少一个状态中的至少一个时,将中断相对于第一处理器切换到第二处理器的中断传送目的地控制模块 第一处理器的状态变为预定状态。
    • 2. 发明申请
    • STORAGE CONTROL APPARATUS
    • 存储控制装置
    • US20130046911A1
    • 2013-02-21
    • US13203830
    • 2011-08-16
    • Hiroshi MineKen NomuraDamien Le MoalTadashi TakeuchiMasaaki Iwasaki
    • Hiroshi MineKen NomuraDamien Le MoalTadashi TakeuchiMasaaki Iwasaki
    • G06F13/24
    • G06F9/45533G06F9/5077G06F11/0712G06F11/0724G06F11/0793G06F11/301G06F11/3055
    • An aspect of the invention is a storage control apparatus, comprising a plurality of processors, a memory, an I/O device coupled to a storage device, a virtualization module that allocates a first processor to a first guest and a second processor to a second guest from among the plurality of processors, and an interrupt control module that receives an interrupt from the I/O device and transmits the interrupt to any one of the plurality of processors, wherein the virtualization module comprises, a state detection module that detects at least one of a state of the first guest and a state of the first processor, and an interrupt delivery destination control module that switches the interrupt with respect to the first processor to the second processor when at least one of the state of the first guest and the state of the first processor becomes a predetermined state.
    • 本发明的一个方面是一种存储控制装置,包括多个处理器,存储器,耦合到存储装置的I / O装置,将第一处理器分配给第一客户机和第二处理器的虚拟化模块, 多个处理器中的客户端以及从所述I / O设备接收中断并将所述中断发送到所述多个处理器中的任何一个的中断控制模块,其中所述虚拟化模块包括:至少检测到的状态检测模块 第一访客的状态和第一处理器的状态之一,以及当第一访客和第二处理器的状态中的至少一个状态中的至少一个时,将中断相对于第一处理器切换到第二处理器的中断传递目的地控制模块 第一处理器的状态变为预定状态。
    • 3. 发明授权
    • Computer, computer system, and data communication method
    • 计算机,计算机系统和数据通信方法
    • US08504780B2
    • 2013-08-06
    • US13127071
    • 2011-04-08
    • Hiroshi MineKen NomuraDamien Le MoalTadashi Takeuchi
    • Hiroshi MineKen NomuraDamien Le MoalTadashi Takeuchi
    • G06F12/00
    • G06F9/544G06F2213/0038
    • A computer includes first and second processors, first and second I/O devices, a shared memory, and an interrupt controller. The first processor issues a control command for causing the first I/O device to read target data from the first apparatus and store the target data in the shared memory. The first I/O device reads the target data from the first apparatus and, transfers the target data to the shared memory, and generates an I/O complete interrupt. The interrupt controller delivers the generated I/O complete interrupt to the second processor. When the second processor receives the I/O complete interrupt, the second processor issues a control command for causing the second I/O device to read the target data from the shared memory and send the target data to the second apparatus. The second I/O device reads the target data from the shared memory and sends the target data to the second apparatus.
    • 计算机包括第一和第二处理器,第一和第二I / O设备,共享存储器和中断控制器。 第一处理器发出用于使第一I / O设备从第一设备读取目标数据并将目标数据存储在共享存储器中的控制命令。 第一个I / O设备从第一个装置读取目标数据,并将目标数据传送到共享存储器,并产生一个I / O完成中断。 中断控制器将生成的I / O完成中断传递给第二个处理器。 当第二处理器接收到I / O完成中断时,第二处理器发出用于使第二I / O设备从共享存储器读取目标数据并将目标数据发送到第二设备的控制命令。 第二I / O设备从共享存储器读取目标数据并将目标数据发送到第二设备。
    • 6. 发明申请
    • COMPUTER, COMPUTER SYSTEM, AND DATA COMMUNICATION METHOD
    • 计算机,计算机系统和数据通信方法
    • US20120260017A1
    • 2012-10-11
    • US13127071
    • 2011-04-08
    • Hiroshi MineKen NomuraDamien Le MoalTadashi Takeuchi
    • Hiroshi MineKen NomuraDamien Le MoalTadashi Takeuchi
    • G06F13/36G06F13/24
    • G06F9/544G06F2213/0038
    • A computer includes first and second processors, first and second I/O devices, a shared memory, and an interrupt controller. The first processor issues a control command for causing the first I/O device to read target data from the first apparatus and store the target data in the shared memory. The first I/O device reads the target data from the first apparatus and, transfers the target data to the shared memory, and generates an I/O complete interrupt. The interrupt controller delivers the generated I/O complete interrupt to the second processor. When the second processor receives the I/O complete interrupt, the second processor issues a control command for causing the second I/O device to read the target data from the shared memory and send the target data to the second apparatus. The second I/O device reads the target data from the shared memory and sends the target data to the second apparatus.
    • 计算机包括第一和第二处理器,第一和第二I / O设备,共享存储器和中断控制器。 第一处理器发出用于使第一I / O设备从第一设备读取目标数据并将目标数据存储在共享存储器中的控制命令。 第一个I / O设备从第一个装置读取目标数据,并将目标数据传送到共享存储器,并产生一个I / O完成中断。 中断控制器将生成的I / O完成中断传递给第二个处理器。 当第二处理器接收到I / O完成中断时,第二处理器发出用于使第二I / O设备从共享存储器读取目标数据并将目标数据发送到第二设备的控制命令。 第二I / O设备从共享存储器读取目标数据并将目标数据发送到第二设备。
    • 7. 发明申请
    • COMPUTER SYSTEM AND COMPUTER SYSTEM INPUT/OUTPUT METHOD
    • 计算机系统和计算机系统输入/输出方法
    • US20110082950A1
    • 2011-04-07
    • US12895169
    • 2010-09-30
    • Hiroshi MINETadashi TakeuchiKen NomuraDamien Le Moal
    • Hiroshi MINETadashi TakeuchiKen NomuraDamien Le Moal
    • G06F3/00
    • G06F3/0635G06F3/061G06F3/0665G06F3/067
    • Under the environment where a storage system is virtualized by Thin Provisioning technology or the like, it is difficult to statically estimate the I/O characteristics of the entire virtual volume, causing a problem that the effect of input/output control by a computer cannot be fully achieved by I/O scheduling that is based on the characteristics of a virtual volume unit. To solve the above problem, the computer system of the present invention acquires characteristics information of a storage apparatus in which there exists an actual storage area corresponding to a virtual volume storage area that is the access target when accessing the virtual volume, divides an I/O request with respect to the virtual volume by storage apparatus in a case where the I/O request spans multiple storage apparatuses, carries out I/O scheduling based on the acquired actual area characteristics information, and issues the I/O request directly to the storage apparatus in accordance with the I/O scheduling result.
    • 在通过精简配置技术等虚拟化存储系统的环境下,难以静态地估计整个虚拟卷的I / O特性,导致计算机的输入/输出控制的影响不能 通过基于虚拟卷单元的特性的I / O调度完全实现。 为了解决上述问题,本发明的计算机系统获取存储装置的特性信息,在存储装置中存在与存取虚拟卷时作为访问对象的虚拟卷存储区域对应的实际存储区域,将I / 在I / O请求跨越多个存储装置的情况下,由存储装置对虚拟卷进行O请求,基于所获取的实际区域特性信息执行I / O调度,并将I / O请求直接发送到 存储装置根据I / O调度结果。