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1. 发明授权

US5672894A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5672894A
公开(公告)日：1997-09-30
申请号：US543864
申请日：1995-10-19
申请人： Hiroshi Maeda , Susumu Ueda , Hiroshi Fujimoto , Yoshiaki Nakayama
发明人： Hiroshi Maeda , Susumu Ueda , Hiroshi Fujimoto , Yoshiaki Nakayama
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/482 , H01L23/52 , H01L23/522 , H01L29/417 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L29/7816 , H01L23/4824 , H01L29/41758 , H01L2924/0002
摘要： The resistance to electromigration in a double-layer Al wiring structure of lateral DMOS or the like is improved by further reducing ON resistance and mitigating current concentration. The first-layer source wiring and the first-layer drain wiring which are electrically connected to a plurality of source cells and drain cells respectively are formed into a pectinate pattern respectively. The second-layer source wiring and the second-layer drain wiring are also formed into a pectinate pattern respectively and disposed in inclination at 45 degrees to the patterns of the first-layer source wiring and first-layer drain wiring. At the intersections of the first-layer source wiring and the second-layer source wiring, at the intersections of the first-layer drain wiring and the second-layer drain wiring, at the outer circumferential portions of the pectinate patterns of first-layer source and drain wirings and at the source and drain pads, contact holes are provided on a layer insulation film to make a contact between the first-layer source and drain wirings and the second-layer source and drain wirings, respectively.
摘要翻译：通过进一步降低导通电阻和减轻电流浓度，提高了横向DMOS等的双层Al布线结构中的电迁移阻力。分别与多个源电池和漏电池电连接的第一层源极布线和第一层漏极布线分别形成果胶图案。第二层源极布线和第二层漏极布线也分别形成为果胶图案，并且以与第一层源极布线和第一层漏极布线的图案成45度的倾斜度设置。在第一层源极布线和第二层源极布线的交点处，在第一层漏极布线和第二层漏极布线的交点处，在第一层源极布线的第二层源极布线和漏极布线，并且在源极和漏极焊盘处，接触孔设置在层间绝缘膜上，以分别在第一层源极和漏极布线与第二层源极和漏极布线之间接触。

2. 发明授权

US07505240B2 Overcurrent protection device for semiconductor element 有权
标题翻译：半导体元件过流保护装置
公开(公告)号：US07505240B2
公开(公告)日：2009-03-17
申请号：US11602259
申请日：2006-11-21
申请人： Tadatoshi Asada , Hideto Okahara , Susumu Ueda
发明人： Tadatoshi Asada , Hideto Okahara , Susumu Ueda
IPC分类号： H02H3/08 , H02H9/02 , G05F3/02
CPC分类号： H03K17/0826 , H03K5/08 , H03K17/08122 , H03K17/08126 , H03K17/0822 , H03K17/14 , H03K17/145
摘要： An overcurrent protecting device for protecting a semiconductor element from an overcurrent includes: the semiconductor element; a shunt resistor for detecting the overcurrent when the electric current in the semiconductor element exceeds a threshold value; a reference resistor for setting the threshold value; a constant electric current circuit for supplying a constant electric current to the reference resistor; and a comparator for comparing a terminal voltage of the shunt resistor and a terminal voltage of the reference resistor. The shunt resistor is made of a same kind of resistor as the reference resistor.
摘要翻译：用于保护半导体元件免于过电流的过电流保护装置包括：半导体元件; 用于在半导体元件中的电流超过阈值时检测过电流的分流电阻器; 用于设置阈值的参考电阻; 用于向参考电阻器提供恒定电流的恒定电流电路; 以及用于比较分流电阻器的端子电压和参考电阻器的端子电压的比较器。分流电阻由与参考电阻相同的电阻制成。

3. 发明授权

US06936465B1 Plasmid vector comprising a retroviral integrase gene and an integrase recognition region 失效
标题翻译：包含逆转录病毒整合酶基因和整合酶识别区的质粒载体
公开(公告)号：US06936465B1
公开(公告)日：2005-08-30
申请号：US09762568
申请日：2000-04-27
申请人： Atsushi Katsumata , Sumio Hoshi , Takeshi Ihara , Susumu Ueda
发明人： Atsushi Katsumata , Sumio Hoshi , Takeshi Ihara , Susumu Ueda
IPC分类号： A01K67/027 , A61K39/00 , A61K48/00 , C07K14/535 , C12N15/54 , C12N15/85 , C12N15/90 , C12N15/63
CPC分类号： A01K67/0275 , A01K2217/05 , A01K2227/30 , A61K39/00 , A61K48/00 , C07K14/535 , C12N15/85 , C12N15/90 , C12N15/907 , C12N2799/026 , C12N2840/20
摘要： A plasmid vector having components (D1), (D2), and (D3) enables the efficient integration of foreign DNA into host cells. The components are (D1) an integrase gene, (D2) a segment of DNA forming a region for controlling the expression of the integrase gene, and (D3) a segment of DNA serving as an integrase recognition region when integrase catalyzes the integration reaction.
摘要翻译：具有组分（D1），（D2）和（D3）的质粒载体能够将外源DNA有效整合入宿主细胞。组分为（D1）整合酶基因，（D2）形成用于控制整合酶基因表达的区域的DNA片段，（D3）当整合酶催化整合反应时，作为整合酶识别区域的DNA片段。

4. 发明申请

US20080187026A1 Temperature detection circuit 有权
标题翻译：温度检测电路
公开(公告)号：US20080187026A1
公开(公告)日：2008-08-07
申请号：US12010902
申请日：2008-01-31
申请人： Susumu Ueda
发明人： Susumu Ueda
IPC分类号： G01K7/16 , G05F3/22
CPC分类号： G01K7/20 , G01K7/015
摘要： A temperature detection circuit includes a bandgap reference voltage generation circuit, a detection output circuit, and an output conversion circuit. The bandgap reference voltage generation circuit generates a first reference voltage and causes a bias current to flow through a current path to produce a thermal voltage. The current path has a first resistor. The detection output circuit has a second resistor and causes a mirror current of the bias current to flow through the second resistor. The output conversion circuit uses a second reference voltage to convert a voltage drop across the second resistor to a predetermined output form to detect a temperature. The first and second resistors are substantially identical in temperature dependence. The second reference voltage is generated from the first reference voltage.
摘要翻译：温度检测电路包括带隙参考电压产生电路，检测输出电路和输出转换电路。带隙参考电压产生电路产生第一参考电压并且使偏置电流流过电流路径以产生热电压。电流路径具有第一电阻。检测输出电路具有第二电阻器，并且使偏置电流的反射镜电流流过第二电阻器。输出转换电路使用第二参考电压将跨第二电阻器的电压降转换成预定的输出形式以检测温度。第一和第二电阻器的温度依赖性基本相同。从第一参考电压产生第二参考电压。

5. 发明申请

US20070246248A1 Flexible printed circuit board 有权
标题翻译：柔性印刷电路板
公开(公告)号：US20070246248A1
公开(公告)日：2007-10-25
申请号：US11448717
申请日：2006-06-08
申请人： Susumu Ueda , Shuichi Arimura
发明人： Susumu Ueda , Shuichi Arimura
IPC分类号： H05K1/09 , H05K1/03
CPC分类号： H05K1/028 , H05K1/0313 , H05K3/28 , H05K3/281 , H05K2201/0141 , H05K2201/0394 , H05K2201/09909
摘要： A flexible printed circuit board (FPC) is disclosed which can eliminate the need for forming through holes and ensure the strength required for mounting components. The FPC has a metal foil layer formed only on one side of an insulating layer via an adhesive layer. The FPC is configured such that the insulating layer and the adhesive layer are partially removed, and the surface of the metal foil layer on the side from which the insulating layer and the adhesive layer have been removed is flattened. In a region from which the insulating layer and the adhesive layer have been removed, an overcoat layer for reinforcing the metal foil layer is provided along the metal foil layer on a surface opposite to the flattened surface. A drive IC is mounted on a first metal foil face of the metal foil layer and on a second metal foil face which is the flattened surface of the metal foil layer, and is provided with electrical conduction by the metal foil layer. To form the FPC, the insulating layer and the metal foil layer can be directly affixed to each other without using the adhesive layer.
摘要翻译：公开了一种柔性印刷电路板（FPC），其可以消除形成通孔的需要并确保安装部件所需的强度。 FPC具有通过粘合剂层仅在绝缘层的一侧形成的金属箔层。 FPC被构造为使得绝缘层和粘合剂层被部分去除，并且金属箔层在绝缘层和粘合剂层已被去除的一侧的表面变平。在去除了绝缘层和粘合剂层的区域中，沿着与扁平表面相对的表面上的金属箔层设置用于加强金属箔层的外涂层。驱动IC安装在金属箔层的第一金属箔表面上，在金属箔层的平坦表面的第二金属箔表面上，并被金属箔层导电。为了形成FPC，绝缘层和金属箔层可以直接彼此固定而不使用粘合剂层。

6. 发明授权

US5630948A Method for the fabrication of integrated conductor suspensions and product 失效
标题翻译：集成导体悬挂和产品的制造方法
公开(公告)号：US5630948A
公开(公告)日：1997-05-20
申请号：US561604
申请日：1995-11-21
申请人： Susumu Ueda , Daniel Vera
发明人： Susumu Ueda , Daniel Vera
IPC分类号： G11B5/48 , H05K1/05 , H05K3/00 , H05K3/06 , H05K3/24 , H05K3/44 , B44C1/22 , C23F1/00
CPC分类号： H05K3/244 , G11B5/484 , H05K3/44 , H05K1/056 , H05K2203/0323 , H05K2203/0554 , H05K3/002 , H05K3/0052 , H05K3/06
摘要： Integrated conductor suspensions are fabricated by progressively etching a suspension shape in a preformed laminate of copper, and stainless steel adhering to an intermediate resin layer, including defining pairs of signal lines in the copper layer having exposed sides and top, and coating these exposed sides and top with an adherent layer of gold down to the resin layer against corrosion in ambient corrosive environments.
摘要翻译：集成导体悬浮液是通过在预先形成的铜层压板中逐渐蚀刻悬浮体形状而制成的，而不锈钢附着在中间树脂层上，包括在具有暴露侧面和顶部的铜层中限定成对的信号线，并且涂覆这些暴露的侧面和顶部具有粘附层的金层，直到树脂层在环境腐蚀环境中被腐蚀。

7. 发明申请

US20070206685A1 Noise free transceiver circuit 有权
标题翻译：无噪声收发电路
公开(公告)号：US20070206685A1
公开(公告)日：2007-09-06
申请号：US11653421
申请日：2007-01-16
申请人： Masaki Mori , Tadatoshi Asada , Susumu Ueda , Hirokazu Toyoda
发明人： Masaki Mori , Tadatoshi Asada , Susumu Ueda , Hirokazu Toyoda
IPC分类号： H04L25/00
CPC分类号： H04L25/085 , H03K4/94 , H03K5/1252 , H03K17/04113 , H04L25/0286 , H04L25/10
摘要： A noise free transceiver circuit includes a communication line, a power source line, a ground line, an output transistor having output terminals connected between the communication line and the ground line for outputting a communication signal to the communication line, a first circuit for applying a trapezoidal signal to the input terminal of the output transistor to turn on in synchronism with a transmission signal and a second circuit for turning off the output transistor when the level of the transmission signal is high. The output transistor is turned off when the communication signal is outputted. Therefore, noises of the power line are shut out of the output transistor.
摘要翻译：无噪声收发电路包括通信线路，电源线路，接地线路，输出端子连接在通信线路和接地线路之间的输出晶体管，用于向通信线路输出通信信号;第一电路，梯形信号输出到输出晶体管的输入端以与传输信号同步地接通，以及第二电路，用于当传输信号的电平为高时关断输出晶体管。当输出通信信号时，输出晶体管截止。因此，输出晶体管的电源线的噪声被关闭。

8. 发明申请

US20050262017A1 Automatic transaction system 有权
标题翻译：自动交易系统
公开(公告)号：US20050262017A1
公开(公告)日：2005-11-24
申请号：US11126346
申请日：2005-05-11
申请人： Hiroyuki Kawase , Susumu Ueda
发明人： Hiroyuki Kawase , Susumu Ueda
IPC分类号： G07F19/00 , G06Q10/00 , G06Q20/10 , G06Q20/18 , G06Q20/32 , G06Q40/00 , G06Q40/02 , G06Q40/04 , G06Q50/00 , G06F17/60
CPC分类号： G06Q40/02 , G06Q20/10 , G06Q20/102 , G06Q20/18 , G06Q20/32 , G06Q20/327 , G07F19/20
摘要： An automatic transaction system has a cellular phone of a customer and an automatic teller machine (ATM) which can directly communicate with the cellular phone by infrared communication. When the customer performs a transaction by the ATM, transaction information such as transfer information registered in the cellular phone is directly inputted to the ATM and the ATM executes a transaction process by the transaction information which was directly received. When transaction data which is used in the transaction by the ATM is inputted once, transaction time in the ATM can be shortened by the simple operation.
摘要翻译：自动交易系统具有客户的蜂窝电话和可以通过红外线通信与蜂窝电话直接通信的自动柜员机（ATM）。当客户通过ATM执行交易时，诸如在蜂窝电话中登记的转移信息的交易信息被直接输入到ATM，并且ATM通过直接接收的交易信息执行交易处理。当ATM的交易中使用的交易数据被输入一次时，通过简单的操作可以缩短ATM中的交易时间。

9. 发明授权

US4409909A Process of combustion in a fluidized-bed incinerator 失效
标题翻译：流化床焚烧炉中的燃烧过程
公开(公告)号：US4409909A
公开(公告)日：1983-10-18
申请号：US244721
申请日：1981-03-17
申请人： Takekazu Tomizawa , Susumu Ueda , Toyoji Sakyo , Sumio Kawai
发明人： Takekazu Tomizawa , Susumu Ueda , Toyoji Sakyo , Sumio Kawai
IPC分类号： F23G5/04 , F23G5/30 , F23G5/00
CPC分类号： F23G5/30 , F23G5/04
摘要： An incinerator for combusting sludge or the like is supplied with combustion air which is mixed with 5-40% by weight of a high-humidity, low-oxygen-concentration gas for adjustment of the excess ratio of combustion air and control over burning of nitrogen oxides in the incinerator. The gas is supplied from a predrier for drying the sludge or comprises a gas discharged from the incinerator.
摘要翻译：供给用于燃烧污泥等的焚烧炉供给与5-40重量％的高湿低氧浓度气体混合的燃烧空气，用于调节燃烧空气的过量比例并控制氮气燃烧焚烧炉中的氧化物。气体从捕集器供应，用于干燥污泥或包括从焚烧炉排出的气体。

10. 发明授权

US07616694B2 Noise free transceiver circuit 有权
标题翻译：无噪声收发电路
公开(公告)号：US07616694B2
公开(公告)日：2009-11-10
申请号：US11653421
申请日：2007-01-16
申请人： Masaki Mori , Tadatoshi Asada , Susumu Ueda , Hirokazu Toyoda
发明人： Masaki Mori , Tadatoshi Asada , Susumu Ueda , Hirokazu Toyoda
IPC分类号： H04B3/00
CPC分类号： H04L25/085 , H03K4/94 , H03K5/1252 , H03K17/04113 , H04L25/0286 , H04L25/10
摘要： A noise free transceiver circuit includes a communication line, a power source line, a ground line, an output transistor having output terminals connected between the communication line and the ground line for outputting a communication signal to the communication line, a first circuit for applying a trapezoidal signal to the input terminal of the output transistor to turn on in synchronism with a transmission signal and a second circuit for turning off the output transistor when the level of the transmission signal is high. The output transistor is turned off when the communication signal is outputted. Therefore, noises of the power line are shut out of the output transistor.
摘要翻译：无噪声收发电路包括通信线路，电源线路，接地线路，输出端子连接在通信线路和接地线路之间的输出晶体管，用于向通信线路输出通信信号;第一电路，梯形信号输出到输出晶体管的输入端以与传输信号同步地接通，以及第二电路，用于当传输信号的电平为高时关断输出晶体管。当输出通信信号时，输出晶体管截止。因此，输出晶体管的电源线的噪声被关闭。

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