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    • 2. 发明授权
    • Integrated circuit device and electronic instrument
    • 集成电路器件和电子仪器
    • US08035662B2
    • 2011-10-11
    • US11984076
    • 2007-11-13
    • Hidehiko YajimaHiroshi Kiya
    • Hidehiko YajimaHiroshi Kiya
    • G09G5/10
    • G09G3/2096G09G3/3233G09G3/3614G09G3/3648G09G3/3655G09G3/3688G09G2300/0426G09G2310/027G09G2330/06G09G2340/02G09G2360/18
    • An integrated circuit device includes a scan driver block, a high-speed interface circuit block, and a scan driver pad arrangement region in which pads electrically connecting scan output lines of the scan driver block and scan lines are disposed. The high-speed interface circuit block includes a physical layer circuit that receives data using differential signals, and a link controller that performs a link layer process. The scan output lines of the scan driver block are provided from the scan driver block to the scan driver pad arrangement region to pass over the link controller while avoiding the physical layer circuit. A common voltage line connecting first and second common voltage pads is provided from the first common voltage pad to the second common voltage pad along a first direction, the common voltage line being provided in a second direction with respect to the physical layer circuit along the first direction in an arrangement region of the physical layer circuit.
    • 集成电路装置包括扫描驱动器块,高速接口电路块和扫描驱动器焊盘布置区域,其中布置扫描驱动器块和扫描线的扫描输出线的电连接焊盘。 高速接口电路块包括使用差分信号接收数据的物理层电路和执行链路层处理的链路控制器。 扫描驱动器块的扫描输出线从扫描驱动器块提供到扫描驱动器焊盘布置区域,以跨越链路控制器,同时避免物理层电路。 连接第一和第二公共电压焊盘的公共电压线从第一公共电压焊盘沿着第一方向提供到第二公共电压焊盘,公共电压线沿第一方向相对于物理层电路在第二方向上提供 物理层电路的布置区域中的方向。
    • 3. 发明申请
    • LIQUID CRYSTAL DISPLAY DEVICE
    • 液晶显示装置
    • US20110075063A1
    • 2011-03-31
    • US12884758
    • 2010-09-17
    • Kenichi TajiriYutaka KobashiHiroshi KiyaNobuhiko Yokoo
    • Kenichi TajiriYutaka KobashiHiroshi KiyaNobuhiko Yokoo
    • G02F1/136
    • G09G3/3258G09G3/3651G09G3/3677G09G2300/0417G09G2300/0482G09G2310/0245G09G2320/046G09G2330/04
    • Disclosed herein is a liquid crystal display device having first and second substrates disposed to face each other so as to hold a liquid crystal layer therebetween, and a gate potential creating circuit for outputting a selection potential and a non-selection potential, scanning lines, signal lines, thin film transistors formed so as to correspond to intersection portions between the scanning lines and the signal lines, respectively, pixel electrodes electrically connected to the thin film transistors, respectively, and a gate control circuit for switching the selection potential and the non-selection potential supplied from the gate potential creating circuit over to each other, thereby supplying one of the selection potential and the non-selection potential to corresponding ones of the thin film transistors through corresponding one of the scanning lines being formed on the first substrate, and a common electrode being formed either on the first substrate or the second substrate.
    • 这里公开了一种液晶显示装置,其具有彼此相对配置以彼此保持液晶层的第一和第二基板以及用于输出选择电位和非选择电位的栅极电位产生电路,扫描线,信号 分别形成为对应于扫描线和信号线之间的交点的薄膜晶体管,分别与薄膜晶体管电连接的像素电极以及用于切换选择电位和非选择电位的栅极控制电路, 从栅极电位产生电路提供的选择电位相互之间,从而通过在第一衬底上形成的相应的一条扫描线,将选择电位和非选择电位中的一个提供给对应的薄膜晶体管,以及 在第一基板或第二基板上形成公共电极。
    • 6. 发明授权
    • Liquid crystal display device
    • 液晶显示装置
    • US08625039B2
    • 2014-01-07
    • US12884758
    • 2010-09-17
    • Kenichi TajiriYutaka KobashiHiroshi KiyaNobuhiko Yokoo
    • Kenichi TajiriYutaka KobashiHiroshi KiyaNobuhiko Yokoo
    • G02F1/136G06F3/038G09G5/00
    • G09G3/3258G09G3/3651G09G3/3677G09G2300/0417G09G2300/0482G09G2310/0245G09G2320/046G09G2330/04
    • Disclosed herein is a liquid crystal display device having first and second substrates disposed to face each other so as to hold a liquid crystal layer therebetween, and a gate potential creating circuit for outputting a selection potential and a non-selection potential, scanning lines, signal lines, thin film transistors formed so as to correspond to intersection portions between the scanning lines and the signal lines, respectively, pixel electrodes electrically connected to the thin film transistors, respectively, and a gate control circuit for switching the selection potential and the non-selection potential supplied from the gate potential creating circuit over to each other, thereby supplying one of the selection potential and the non-selection potential to corresponding ones of the thin film transistors through corresponding one of the scanning lines being formed on the first substrate, and a common electrode being formed either on the first substrate or the second substrate.
    • 这里公开了一种液晶显示装置,其具有彼此相对配置以彼此保持液晶层的第一和第二基板以及用于输出选择电位和非选择电位的栅极电位产生电路,扫描线,信号 分别形成为对应于扫描线和信号线之间的交点的薄膜晶体管,分别与薄膜晶体管电连接的像素电极以及用于切换选择电位和非选择电位的栅极控制电路, 从栅极电位产生电路提供的选择电位相互之间,从而通过在第一衬底上形成的相应的一条扫描线,将选择电位和非选择电位中的一个提供给对应的薄膜晶体管,以及 在第一基板或第二基板上形成公共电极。
    • 7. 发明授权
    • Integrated circuit device and electronic instrument
    • 集成电路器件和电子仪器
    • US07590015B2
    • 2009-09-15
    • US11889286
    • 2007-08-10
    • Satoru KodairaHiroshi Kiya
    • Satoru KodairaHiroshi Kiya
    • G11C7/00
    • G11C29/816G11C29/806G11C29/81G11C2029/0401
    • An integrated circuit device includes a data driver block, a memory block, an information storage block in which an address of a defective cell of the memory block is programmed and stored as a defective address, and a switch control circuit which performs control for switching access to the defective cell to access to a redundant cell. A row address of the defective cell having the row address and a column address is stored in the information storage block as the defective address. The switch control circuit performs control for switching access to the defective cell to access to the redundant cell by comparing a row address for display panel access with the defective address during the display panel access and comparing a row address for host access using the row address and a column address with the defective address during the host access.
    • 一种集成电路装置,包括数据驱动器块,存储器块,存储块的缺陷单元的地址被编程并存储为缺陷地址的信息存储块;以及执行用于切换存取的控制的开关控制电路 到有缺陷的单元以访问冗余单元。 具有行地址和列地址的缺陷单元的行地址作为缺陷地址存储在信息存储块中。 开关控制电路通过在显示面板访问期间比较用于显示面板访问的行地址和缺陷地址来进行对存储于冗余单元的访问的控制,并且使用行地址比较用于主机访问的行地址,以及 在主机访问期间具有缺陷地址的列地址。
    • 8. 发明授权
    • Display device, integrated circuit device, and electronic instrument
    • 显示设备,集成电路设备和电子仪器
    • US08179358B2
    • 2012-05-15
    • US11998970
    • 2007-12-03
    • Hidehiko YajimaHiroshi Kiya
    • Hidehiko YajimaHiroshi Kiya
    • G09G3/36
    • G09G3/3688G09G3/006G09G2300/0426
    • A display device includes an integrated circuit device and a display panel. The display panel includes a panel test terminal that is used to test the display panel, and a driver output terminal that is electrically connected with a data driver pad of the integrated circuit device and is electrically connected with the panel test terminal. The integrated circuit device includes a data driver block and a high-speed I/F circuit block including a physical layer circuit. The physical layer circuit is disposed in the integrated circuit device so that the physical layer circuit non-overlaps a predetermined test terminal region, the predetermined test terminal region being a region in which the panel test terminal is predetermined to locate under the integrated circuit device when the integrated circuit device is mounted on the display panel.
    • 显示装置包括集成电路装置和显示面板。 显示面板包括用于测试显示面板的面板测试端子和与集成电路器件的数据驱动器焊盘电连接并与面板测试端子电连接的驱动器输出端子。 集成电路装置包括数据驱动器模块和包括物理层电路的高速I / F电路块。 物理层电路设置在集成电路器件中,使得物理层电路与预定的测试端子区域不重叠,预定的测试端子区域是面板测试端子预定位于集成电路器件下方的区域,当 集成电路器件安装在显示面板上。
    • 9. 发明申请
    • Display device, integrated circuit device, and electronic instrument
    • 显示设备,集成电路设备和电子仪器
    • US20080136847A1
    • 2008-06-12
    • US11998970
    • 2007-12-03
    • Hidehiko YajimaHiroshi Kiya
    • Hidehiko YajimaHiroshi Kiya
    • G09G5/10G09G3/34
    • G09G3/3688G09G3/006G09G2300/0426
    • A display device includes an integrated circuit device and a display panel. The display panel includes a panel test terminal that is used to test the display panel, and a driver output terminal that is electrically connected with a data driver pad of the integrated circuit device and is electrically connected with the panel test terminal. The integrated circuit device includes a data driver block and a high-speed I/F circuit block including a physical layer circuit. The physical layer circuit is disposed in the integrated circuit device so that the physical layer circuit non-overlaps a predetermined test terminal region, the predetermined test terminal region being a region in which the panel test terminal is predetermined to locate under the integrated circuit device when the integrated circuit device is mounted on the display panel.
    • 显示装置包括集成电路装置和显示面板。 显示面板包括用于测试显示面板的面板测试端子和与集成电路器件的数据驱动器焊盘电连接并与面板测试端子电连接的驱动器输出端子。 集成电路装置包括数据驱动器模块和包括物理层电路的高速I / F电路块。 物理层电路设置在集成电路器件中,使得物理层电路与预定的测试端子区域不重叠,预定的测试端子区域是面板测试端子预定位于集成电路器件下方的区域,当 集成电路器件安装在显示面板上。
    • 10. 发明申请
    • Integrated circuit device and electronic instrument
    • 集成电路器件和电子仪器
    • US20080117234A1
    • 2008-05-22
    • US11984076
    • 2007-11-13
    • Hidehiko YajimaHiroshi Kiya
    • Hidehiko YajimaHiroshi Kiya
    • G09G5/10G06F3/038
    • G09G3/2096G09G3/3233G09G3/3614G09G3/3648G09G3/3655G09G3/3688G09G2300/0426G09G2310/027G09G2330/06G09G2340/02G09G2360/18
    • An integrated circuit device includes a scan driver block, a high-speed interface circuit block, and a scan driver pad arrangement region in which pads electrically connecting scan output lines of the scan driver block and scan lines are disposed. The high-speed interface circuit block includes a physical layer circuit that receives data using differential signals, and a link controller that performs a link layer process. The scan output lines of the scan driver block are provided from the scan driver block to the scan driver pad arrangement region to pass over the link controller while avoiding the physical layer circuit. A common voltage line connecting first and second common voltage pads is provided from the first common voltage pad to the second common voltage pad along a first direction, the common voltage line being provided in a second direction with respect to the physical layer circuit along the first direction in an arrangement region of the physical layer circuit.
    • 集成电路装置包括扫描驱动器块,高速接口电路块和扫描驱动器焊盘布置区域,其中布置扫描驱动器块和扫描线的扫描输出线的电连接焊盘。 高速接口电路块包括使用差分信号接收数据的物理层电路和执行链路层处理的链路控制器。 扫描驱动器块的扫描输出线从扫描驱动器块提供到扫描驱动器焊盘布置区域,以跨越链路控制器,同时避免物理层电路。 连接第一和第二公共电压焊盘的公共电压线从第一公共电压焊盘沿着第一方向提供到第二公共电压焊盘,公共电压线沿第一方向相对于物理层电路在第二方向上提供 物理层电路的布置区域中的方向。