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    • 6. 发明授权
    • Phase difference detector with phase inversion of one input signal when
phase difference is small
    • 相位差小的相位差检测器,一个输入信号相位反相
    • US4520321A
    • 1985-05-28
    • US445643
    • 1982-11-30
    • Kenji NakatsugawaHiroshi Itaya
    • Kenji NakatsugawaHiroshi Itaya
    • G01R25/00H03D13/00H03K5/22
    • G01R25/00
    • A phase detector is disclosed in which means are provided for sensing when two AC signals being subjected to phase difference measurement become close in phase, within a predetermined range, and for inverting one of these signals in phase when such a close phase relationship is sensed. The phase difference between the phase inverted signal and the other signal is then measured, and compensation is applied to the measured results such as to compensate for the effects of the phase inversion operation. Insensitivity and "hunting" effects which occur with prior art phase detectors in the region of zero phase difference are thereby eliminated, and an output signal can be obtained which varies in a smooth and continuous manner with variations in the phase difference between the two signals under measurement, over a 360.degree. range.
    • 公开了一种相位检测器,其中提供了用于在经受相位差测量的两个AC信号在预定范围内相位接近并且当感测到这种近似相位关系时相位反转这些信号中的一个的装置。 然后测量相位反转信号和其他信号之间的相位差,并对测量结果进行补偿,以补偿相位反转操作的影响。 因此消除了在零相位差区域中与现有技术的相位检测器发生的不敏感性和“捕获”效应,并且可以获得以平滑和连续的方式变化的输出信号,其中两个信号之间的相位差的变化 测量范围超过360度。
    • 7. 发明授权
    • Multiprocessor system
    • 多处理器系统
    • US4504906A
    • 1985-03-12
    • US445611
    • 1982-11-30
    • Hiroshi ItayaKenji Nakatsugawa
    • Hiroshi ItayaKenji Nakatsugawa
    • G06F13/366G06F15/167G06F15/16
    • G06F13/366G06F15/167
    • In a multiprocessory system comprising a plurality of CPUs interconnected by a common bus, means are provided whereby the CPUs are periodically and cyclically enabled to access the bus. Data transfer from one CPU to another is performed by first storing the data into a main memory connected to the bus, then transferring the data from main memory to the destination CPU when the latter is enabled to utilize the bus and is in a condition to accept the data. Means can also be provided whereby, when data must be immediately transferred from one CPU to another, the sending CPU stores the data in main memory, generates signals whereby the destination CPU is given use of the bus, and generates an interrupt which causes transfer of the stored data into the destination CPU.
    • 在包括通过公共总线互连的多个CPU的多处理系统中,提供了使CPU周期性地且循环地使能以访问总线的装置。 通过首先将数据存储到连接到总线的主存储器中,然后将数据从主存储器传送到目的地CPU,当后者能够使用总线并处于接受状态时,从一个CPU到另一个CPU的数据传输 数据。 因此,当数据必须立即从一个CPU传送到另一个CPU时,发送CPU将数据存储在主存储器中,产生信号,从而使目标CPU被使用总线,并产生一个中断, 存储的数据进入目标CPU。
    • 9. 发明授权
    • Heterodyne type signal-measuring method and a measuring apparatus
including automatic detuning correction means
    • 异频型信号测量方法和包括自动失谐校正装置的测量装置
    • US4710702A
    • 1987-12-01
    • US2692
    • 1986-12-10
    • Hiroshi ItayaGoro Saito
    • Hiroshi ItayaGoro Saito
    • G01R17/06G01R23/173G01R25/00G01R23/14
    • G01R17/06G01R23/173
    • A signal-measuring apparatus for measuring a level of a signal to be measured includes a reference signal oscillator, a variable local signal oscillator, a heterodyne type mixer, a bandpass filter and automatic detuning correction means. In the automatic detuning correction means, there are provided a peak value memory, a tracking circuit and a detuning-correction calculating circuit. When a filter output is obtained by passing the reference signal through the bandpass filter, a peak value is acquired by varying the oscillator frequency of the local signal. This peak value is stored in the peak value memory. Then, the signal to be measured is supplied to the bandpass filter to acquire another filter output. This filter output is calculated in the detuning correction calculating circuit based upon the above-described peak value as a reference value so as to correct the error caused by the filter detuning.
    • PCT No.PCT / JP86 / 00183 Sec。 371日期1986年12月10日第 102(e)日期1986年12月10日PCT提交1986年4月14日PCT公布。 公开号WO86 / 06174 用于测量待测信号电平的信号测量装置包括参考信号振荡器,可变本地信号振荡器,外差型混频器,带通滤波器和自动失谐校正装置。 在自动失谐校正装置中,提供了峰值存储器,跟踪电路和失谐校正计算电路。 通过使参考信号通过带通滤波器获得滤波器输出时,通过改变本地信号的振荡器频率来获得峰值。 该峰值存储在峰值存储器中。 然后,将要测量的信号提供给带通滤波器以获得另一滤波器输出。 基于上述峰值作为参考值,在失谐校正计算电路中计算该滤波器输出,以便校正由滤波器失谐引起的误差。