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1. 发明申请

US20080188376A1 Oligonucleotide probes and microarray for determining genome types 审中-公开
标题翻译：用于确定基因组类型的寡核苷酸探针和微阵列
公开(公告)号：US20080188376A1
公开(公告)日：2008-08-07
申请号：US11987919
申请日：2007-12-05
申请人： Hiroshi Ikegaya , Koichi Sakurada , Koichi Hirayama , Kenji Isogai
发明人： Hiroshi Ikegaya , Koichi Sakurada , Koichi Hirayama , Kenji Isogai
IPC分类号： C40B30/04 , C07H21/00 , C40B40/08 , C12Q1/70
CPC分类号： C12Q1/701 , C07B2200/11 , C40B30/04 , C40B40/08
摘要： According to the present invention, a means of estimating the place of origin of a test subject by quickly and conveniently determining the genome type of JC virus infecting a test subject is provided. The present invention relates to a set of oligonucleotide probes for determining the genome type of JC virus infecting a test subject, such set containing: oligonucleotide probes (a-1) and (a-2); oligonucleotide probes (b-1) and (b-2); oligonucleotide probes (c-1) and (c-2); oligonucleotide probes (d-1), (d-2), (d-3), and (d-4); oligonucleotide probes (e-1), (e-2), and (e-3); oligonucleotide probes (f-1), (f-1), and (f-3); oligonucleotide probes (g-1), (g-2), and (g-3); oligonucleotide probes (h-1), (h-2), (h-3), and (h-4); oligonucleotide probes (i-1) and (i-2); oligonucleotide probes (j-1), (j-2), and (j-3); oligonucleotide probes (k-1), (k-2), and (k-3); and oligonucleotide probes (l-1) and (l-2).
摘要翻译：根据本发明，提供了通过快速方便地确定感染受试者的JC病毒的基因组类型来估计测试对象的原点的方法。本发明涉及用于测定感染受试者的JC病毒的基因组类型的一组寡核苷酸探针，该组包含：寡核苷酸探针（a-1）和（a-2）; 寡核苷酸探针（b-1）和（b-2）; 寡核苷酸探针（c-1）和（c-2）; 寡核苷酸探针（d-1），（d-2），（d-3）和（d-4）寡核苷酸探针（e-1），（e-2）和（e-3）; 寡核苷酸探针（f-1），（f-1）和（f-3）; 寡核苷酸探针（g-1），（g-2）和（g-3）; 寡核苷酸探针（h-1），（h-2），（h-3）和（h-4）; 寡核苷酸探针（i-1）和（i-2）; 寡核苷酸探针（j-1），（j-2）和（j-3）; 寡核苷酸探针（k-1），（k-2）和（k-3）; 和寡核苷酸探针（1-1）和（1-2）。

2. 发明授权

US4802084A Address translator 失效
标题翻译：地址翻译
公开(公告)号：US4802084A
公开(公告)日：1989-01-31
申请号：US827545
申请日：1986-02-10
申请人： Hiroshi Ikegaya , Hidenori Umeno , Takashige Kubo , Yoshio Ukai , Nobuyoshi Sugama
发明人： Hiroshi Ikegaya , Hidenori Umeno , Takashige Kubo , Yoshio Ukai , Nobuyoshi Sugama
IPC分类号： G06F12/10 , G06F12/06
CPC分类号： G06F12/1036
摘要： In order to carry out address translation which can reduce an overhead of the VMCP to support a virtual storage, a flag indicating a common segment in the virtual machine and a system identifier are held in a TLB, and a VM identifier is held in a segment table origin stack. For the common segment, a current VM identifier is compared with the VM identifier in the segment table origin stack to determine validity of a TLB entry, and for a non-common segment, a system identifier read from the segment table origin stack is compared with the system identifier in the TLB entry to determine validity of the TLB entry.
摘要翻译：为了执行可以减少VMCP的开销以支持虚拟存储的地址转换，在TLB中保持指示虚拟机中的公共段的标志和系统标识符，并且将VM标识符保存在段表起源栈。对于公共段，将当前VM标识符与段表原始栈中的VM标识符进行比较，以确定TLB条目的有效性，并且对于非公共段，从段表原始堆栈读取的系统标识符与 TLB条目中的系统标识符，以确定TLB条目的有效性。

3. 发明授权

US5437016A Apparatus and method for translating logical addresses for virtual machines 失效
标题翻译：用于翻译虚拟机的逻辑地址的装置和方法
公开(公告)号：US5437016A
公开(公告)日：1995-07-25
申请号：US909308
申请日：1992-07-06
申请人： Hiroshi Ikegaya , Hidenori Umeno , Tsuyoshi Watanabe
发明人： Hiroshi Ikegaya , Hidenori Umeno , Tsuyoshi Watanabe
IPC分类号： G06F12/10 , G06F12/00 , G06F12/06
CPC分类号： G06F12/1036
摘要： An absolute address translated from a logical address input by a user program by an address translation circuit and a prefix translation circuit, is compared with contents of a virtual processor prefix register. On the basis of the comparison result, a multi-processor field of a translation lookaside buffer (TLB) has a value indicating whether or not the entry corresponds to an area common among virtual processors. The MP field of the TLB is compared with contents of the multi-processor register, and a virtual processor field of the TLB is compared with contents of a virtual processor register. If the value coincides with the multi-processor field or if the value does not coincide with the multi-processor field and the value coincides with the virtual processor field, contents of an absolute address field of the TLB are input to an absolute address register. This increases the effective capacity and utilization of the TLB to avoid decreasing of performance of the virtual machines.
摘要翻译：将由地址转换电路和前缀翻译电路由用户程序输入的逻辑地址的绝对地址与虚拟处理器前缀寄存器的内容进行比较。基于比较结果，翻译后备缓冲器（TLB）的多处理器字段具有指示条目是否对应于虚拟处理器中共同的区域的值。将TLB的MP字段与多处理器寄存器的内容进行比较，并将TLB的虚拟处理器字段与虚拟处理器寄存器的内容进行比较。如果该值与多处理器字段一致，或者该值与多处理器字段不一致，并且该值与虚拟处理器字段一致，则TLB的绝对地址字段的内容被输入到绝对地址寄存器。这增加了TLB的有效容量和利用率，以避免虚拟机的性能下降。

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