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1. 发明申请

US20120139032A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20120139032A1
公开(公告)日：2012-06-07
申请号：US13372731
申请日：2012-02-14
申请人： Hiroshi AKAHORI , Wakako Takeuchi , Atsuhiro Sato
发明人： Hiroshi AKAHORI , Wakako Takeuchi , Atsuhiro Sato
IPC分类号： H01L27/088
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42336
摘要： A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.
摘要翻译：存储器件包括：半导体衬底，以行和列形成在衬底上方的存储元件，位线和字线与各个列和行中的存储元件选择性地连接，每个存储元件包括形成在衬底上的第一栅极绝缘体，形成在第一栅极绝缘体上的电荷累积层，形成在电荷累积层上的第二栅极绝缘体和形成在第二栅极绝缘体上的控制电极，其中比率r / d不小于0.5，其中r：a 上角部的曲率半径或电荷蓄积层的表面粗糙度，d：沿着与位线垂直的方向的截面中的第二栅极绝缘体的等效氧化物厚度。

2. 发明授权

US07928496B2 Semiconductor memory device and manufacturing method thereof 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07928496B2
公开(公告)日：2011-04-19
申请号：US11808147
申请日：2007-06-07
申请人： Wakako Takeuchi , Hiroshi Akahori , Atsuhiro Sato
发明人： Wakako Takeuchi , Hiroshi Akahori , Atsuhiro Sato
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/513 , H01L29/7881
摘要： A nonvolatile semiconductor memory device having high charge retention characteristics and capable of improving leakage characteristics of a dielectric film disposed between a charge storage layer and a control gate electrode, and manufacturing method thereof is disclosed. According to one aspect, there is provided a semiconductor memory device comprising a first electrode disposed on a first insulator on a semiconductor substrate, a second insulator disposed on the first electrode, a second electrode disposed on the second insulator, and diffusion layers disposed in the semiconductor substrate, wherein the second insulator including a silicon-rich silicon nitride film containing more silicon than that in a stoichiometric silicon nitride film, and a silicon oxide film formed on the silicon-rich silicon nitride film, and wherein the silicon-rich silicon nitride film has a ratio of a silicon concentration and a nitrogen concentration set to 1:0.9 to 1:1.2.
摘要翻译：公开了一种具有高电荷保持特性并且能够改善设置在电荷存储层和控制栅电极之间的电介质膜的漏电特性的非易失性半导体存储器件及其制造方法。根据一个方面，提供了一种半导体存储器件，包括设置在半导体衬底上的第一绝缘体上的第一电极，设置在第一电极上的第二绝缘体，设置在第二绝缘体上的第二电极和设置在第二绝缘体上的扩散层半导体衬底，其中包括比在化学计量的氮化硅膜中含有更多的硅的富含硅的氮化硅膜的第二绝缘体和形成在富硅氮化硅膜上的氧化硅膜，并且其中富硅氮化硅膜的硅浓度和氮浓度的比率设定为1:0.9至1:1.2。

3. 发明申请

US20070287253A1 Semiconductor memory device and manufacturing method thereof 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20070287253A1
公开(公告)日：2007-12-13
申请号：US11808147
申请日：2007-06-07
申请人： Wakako Takeuchi , Hiroshi Akahori , Atsuhiro Sato
发明人： Wakako Takeuchi , Hiroshi Akahori , Atsuhiro Sato
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/513 , H01L29/7881
摘要： A nonvolatile semiconductor memory device having high charge retention characteristics and capable of improving leakage characteristics of a dielectric film disposed between a charge storage layer and a control gate electrode, and manufacturing method thereof is disclosed. According to one aspect, there is provided a semiconductor memory device comprising a first electrode disposed on a first insulator on a semiconductor substrate, a second insulator disposed on the first electrode, a second electrode disposed on the second insulator, and diffusion layers disposed in the semiconductor substrate, wherein the second insulator including a silicon-rich silicon nitride film containing more silicon than that in a stoichiometric silicon nitride film, and a silicon oxide film formed on the silicon-rich silicon nitride film, and wherein the silicon-rich silicon nitride film has a ratio of a silicon concentration and a nitrogen concentration set to 1:0.9 to 1:1.2.
摘要翻译：公开了一种具有高电荷保持特性并且能够改善设置在电荷存储层和控制栅电极之间的电介质膜的漏电特性的非易失性半导体存储器件及其制造方法。根据一个方面，提供了一种半导体存储器件，包括设置在半导体衬底上的第一绝缘体上的第一电极，设置在第一电极上的第二绝缘体，设置在第二绝缘体上的第二电极和设置在第二绝缘体上的扩散层半导体衬底，其中包括比在化学计量的氮化硅膜中含有更多的硅的富含硅的氮化硅膜的第二绝缘体和形成在富硅氮化硅膜上的氧化硅膜，并且其中富硅氮化硅膜的硅浓度和氮浓度的比率设定为1:0.9至1:1.2。

4. 发明授权

US08133782B2 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08133782B2
公开(公告)日：2012-03-13
申请号：US13028730
申请日：2011-02-16
申请人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
发明人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
IPC分类号： H01L21/8247
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42336
摘要： A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.
摘要翻译：存储器件包括：半导体衬底，以行和列形成在衬底上方的存储元件，位线和字线与各个列和行中的存储元件选择性地连接，每个存储元件包括形成在衬底上的第一栅极绝缘体，形成在第一栅极绝缘体上的电荷累积层，形成在电荷累积层上的第二栅极绝缘体和形成在第二栅极绝缘体上的控制电极，其中比率r / d不小于0.5，其中r：a 上角部的曲率半径或电荷蓄积层的表面粗糙度，d：沿着与位线垂直的方向的截面中的第二栅极绝缘体的等效氧化物厚度。

5. 发明授权

US07906804B2 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07906804B2
公开(公告)日：2011-03-15
申请号：US11798888
申请日：2007-05-17
申请人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
发明人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
IPC分类号： H01L29/78
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42336
摘要： A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.
摘要翻译：存储器件包括：半导体衬底，以行和列形成在衬底上方的存储元件，位线和字线与各个列和行中的存储元件选择性地连接，每个存储元件包括形成在衬底上的第一栅极绝缘体，形成在第一栅极绝缘体上的电荷累积层，形成在电荷累积层上的第二栅极绝缘体和形成在第二栅极绝缘体上的控制电极，其中比率r / d不小于0.5，其中r：a 上角部的曲率半径或电荷蓄积层的表面粗糙度，d：沿着与位线垂直的方向的截面中的第二栅极绝缘体的等效氧化物厚度。

6. 发明授权

US08330206B2 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
公开(公告)号：US08330206B2
公开(公告)日：2012-12-11
申请号：US13372731
申请日：2012-02-14
申请人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
发明人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42336
摘要： A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.

7. 发明申请

US20080017911A1 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20080017911A1
公开(公告)日：2008-01-24
申请号：US11798888
申请日：2007-05-17
申请人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
发明人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42336
摘要： A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.
摘要翻译：存储器件包括：半导体衬底，以行和列形成在衬底上方的存储元件，位线和字线与各个列和行中的存储元件选择性地连接，每个存储元件包括形成在衬底上的第一栅极绝缘体，形成在第一栅极绝缘体上的电荷累积层，形成在电荷累积层上的第二栅极绝缘体和形成在第二栅极绝缘体上的控制电极，其中比率r / d不小于0.5，其中r：a 上角部的曲率半径或电荷蓄积层的表面粗糙度，d：沿着与位线垂直的方向的截面中的第二栅极绝缘体的等效氧化物厚度。

8. 发明授权

US08450787B2 Nonvolatile semiconductor memory and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US08450787B2
公开(公告)日：2013-05-28
申请号：US13277255
申请日：2011-10-20
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L29/76 , H01L29/792 , H01L23/58
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.
摘要翻译：非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜，形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

9. 发明申请

US20110020995A1 Nonvolatile semiconductor memory and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US20110020995A1
公开(公告)日：2011-01-27
申请号：US12923646
申请日：2010-09-30
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L21/22
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.
摘要翻译：非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜，形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

10. 发明授权

US07821056B2 Nonvolatile semiconductor memory device and method of manufacturing the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07821056B2
公开(公告)日：2010-10-26
申请号：US11902290
申请日：2007-09-20
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L29/76
CPC分类号： H01L21/32134 , H01L21/32115 , H01L27/115 , H01L27/11521
摘要： A nonvolatile semiconductor memory device includes an array of nonvolatile memory cell transistors, each of which is configured such that a tunnel insulation film, a floating gate electrode, a floating gate insulation film and a control gate electrode are stacked on a surface of a semiconductor substrate. A mean roughness of an interface between a polysilicon, of which the floating gate electrode is formed, and the floating gate insulation film is 1.5 nm or less.
摘要翻译：非易失性半导体存储器件包括非易失性存储单元晶体管阵列，每个非易失性存储单元晶体管被配置为使得隧道绝缘膜，浮栅电极，浮栅绝缘膜和控制栅电极堆叠在半导体衬底的表面上。形成浮栅的多晶硅与浮栅绝缘膜之间的界面的平均粗糙度为1.5nm以下。

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