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    • 1. 发明申请
    • DISPLAY DEVICE
    • 显示设备
    • US20110122173A1
    • 2011-05-26
    • US12951137
    • 2010-11-22
    • Hiroko SEHATAHajime AkimotoYoshihiro KotaniGou Yamamoto
    • Hiroko SEHATAHajime AkimotoYoshihiro KotaniGou Yamamoto
    • G09G5/10
    • G09G3/2092G09G3/2007G09G3/3208G09G2310/0275G09G2310/0297G09G2330/028
    • Provided is a display device having plural data line voltage generation circuits capable of supplying a display control voltage to display elements of a color designated as necessary. The display device includes plural display elements each displaying an image of one color; plural gradation voltage output units provided for each color to output a gradation voltage corresponding to each display gradation value of a gradation number; plural display control voltage supply units connected to each of two or more display elements to supply control voltages corresponding to display data of the display elements to each of the display elements based on the gradation voltages of the gradation number output by any one of the gradation voltage output units; and plural gradation voltage selection units provided to one or each display control voltage supply unit to select the gradation voltage output by any one of the gradation voltage output units.
    • 提供了一种具有多个数据线电压产生电路的显示装置,能够将显示控制电压提供给必要的指定颜色的显示元件。 显示装置包括多个显示单色图像的显示元件; 为每种颜色提供的多个灰度电压输出单元,以输出与渐变编号的每个显示灰度值相对应的灰度电压; 连接到两个或更多个显示元件中的每一个的多个显示控制电压供应单元,用于根据通过灰度电压中的任何一个输出的灰度数的灰度电压将对应于显示元件的显示数据的控制电压提供给每个显示元件 输出单位; 以及多个灰度电压选择单元,被提供给一个或每个显示控制电压提供单元,以选择灰度级电压输出单元中的任一个输出的灰度电压。
    • 2. 发明授权
    • Display device
    • 显示设备
    • US09024978B2
    • 2015-05-05
    • US12951137
    • 2010-11-22
    • Hiroko SehataHajime AkimotoYoshihiro KotaniGou Yamamoto
    • Hiroko SehataHajime AkimotoYoshihiro KotaniGou Yamamoto
    • G09G3/32G09G3/20
    • G09G3/2092G09G3/2007G09G3/3208G09G2310/0275G09G2310/0297G09G2330/028
    • Provided is a display device having plural data line voltage generation circuits capable of supplying a display control voltage to display elements of a color designated as necessary. The display device includes plural display elements each displaying an image of one color; plural gradation voltage output units provided for each color to output a gradation voltage corresponding to each display gradation value of a gradation number; plural display control voltage supply units connected to each of two or more display elements to supply control voltages corresponding to display data of the display elements to each of the display elements based on the gradation voltages of the gradation number output by any one of the gradation voltage output units; and plural gradation voltage selection units provided to one or each display control voltage supply unit to select the gradation voltage output by any one of the gradation voltage output units.
    • 提供了一种具有多个数据线电压产生电路的显示装置,能够将显示控制电压提供给必要的指定颜色的显示元件。 显示装置包括多个显示单色图像的显示元件; 为每种颜色提供的多个灰度电压输出单元,以输出与渐变编号的每个显示灰度值相对应的灰度电压; 连接到两个或更多个显示元件中的每一个的多个显示控制电压供应单元,用于根据通过灰度电压中的任何一个输出的灰度数的灰度电压将对应于显示元件的显示数据的控制电压提供给每个显示元件 输出单位; 以及多个灰度电压选择单元,被提供给一个或每个显示控制电压提供单元,以选择灰度级电压输出单元中的任一个输出的灰度电压。
    • 3. 发明授权
    • Display device
    • 显示设备
    • US08576214B2
    • 2013-11-05
    • US12709254
    • 2010-02-19
    • Hiroko SehataKouichi KoteraYoshihiro KotaniShuuichirou Matsumoto
    • Hiroko SehataKouichi KoteraYoshihiro KotaniShuuichirou Matsumoto
    • G06F3/038G09G3/36
    • H03F3/345G09G2310/027G09G2310/0297H03F3/45179
    • A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.
    • 提供从多个输入电压获得更精确的输出电压的电路。 双输入单输出电路包括允许预定电流流动的电流源晶体管,共源共栅晶体管部分,其包括共源共栅式连接到电流源晶体管的漏极侧并具有相同特性的两个MOS晶体管,差分 所述第一差分对具有由第一输入侧晶体管和源极线共享的第一输出侧晶体管和由第二输入侧晶体管和第二输出侧晶体管形成的第二差分对形成的第一差分对, 被共享,并且是电流镜电路部分。 级联晶体管部分的晶体管的漏极线分别连接到第一和第二差分对的源极线。
    • 4. 发明申请
    • DISPLAY DEVICE
    • 显示设备
    • US20100238153A1
    • 2010-09-23
    • US12709254
    • 2010-02-19
    • Hiroko SEHATAKouichi KoteraYoshihiro KotaniShuuichirou Matsumoto
    • Hiroko SEHATAKouichi KoteraYoshihiro KotaniShuuichirou Matsumoto
    • G06F3/038
    • H03F3/345G09G2310/027G09G2310/0297H03F3/45179
    • A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.
    • 提供从多个输入电压获得更精确的输出电压的电路。 双输入单输出电路包括允许预定电流流动的电流源晶体管,共源共栅晶体管部分,其包括共源共栅式连接到电流源晶体管的漏极侧并具有相同特性的两个MOS晶体管,差分 所述第一差分对具有由第一输入侧晶体管和源极线共享的第一输出侧晶体管和由第二输入侧晶体管和第二输出侧晶体管形成的第二差分对形成的第一差分对, 被共享,并且是电流镜电路部分。 级联晶体管部分的晶体管的漏极线分别连接到第一和第二差分对的源极线。
    • 5. 发明授权
    • Display device
    • 显示设备
    • US08477131B2
    • 2013-07-02
    • US12825596
    • 2010-06-29
    • Kenichi AkiyamaYoshihiro KotaniHiroko SehataKouichi Kotera
    • Kenichi AkiyamaYoshihiro KotaniHiroko SehataKouichi Kotera
    • G06F3/038
    • G09G3/20G02F1/13306G09G3/36
    • A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.
    • 输出基于8位数字值的电压的解码器电路包括:分别使用8位数字值的高位6位输出一个电压的第一解码器电路和第二解码器电路; 接收从第一解码器电路和第二解码器电路输出的电压并将两个电压分配给三个端子的选择电路; 以及中间电压输出电路,其基于三个电压输出作为五种值中的一种的中间电压。 第一解码器电路和第二解码器电路分别包括选择开关型解码器电路和比赛型解码器电路。 由于这样的结构,可以减小输出对应于8位数字值的电压的解码器电路的电路规模。
    • 6. 发明申请
    • DISPLAY DEVICE
    • 显示设备
    • US20100328292A1
    • 2010-12-30
    • US12825596
    • 2010-06-29
    • Kenichi AKIYAMAYoshihiro KotaniHiroko SehataKouichi Kotera
    • Kenichi AKIYAMAYoshihiro KotaniHiroko SehataKouichi Kotera
    • G06F3/038
    • G09G3/20G02F1/13306G09G3/36
    • A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.
    • 输出基于8位数字值的电压的解码器电路包括:分别使用8位数字值的高位6位输出一个电压的第一解码器电路和第二解码器电路; 接收从第一解码器电路和第二解码器电路输出的电压并将两个电压分配给三个端子的选择电路; 以及中间电压输出电路,其基于三个电压输出作为五种值中的一种的中间电压。 第一解码器电路和第二解码器电路分别包括选择开关型解码器电路和比赛型解码器电路。 由于这样的结构,可以减小输出对应于8位数字值的电压的解码器电路的电路规模。
    • 10. 发明申请
    • DISPLAY DEVICE
    • 显示设备
    • US20080218149A1
    • 2008-09-11
    • US11873017
    • 2007-10-16
    • Yoshinori AokiMitsuru GotoYoshihiro Kotani
    • Yoshinori AokiMitsuru GotoYoshihiro Kotani
    • H02M3/156
    • G09G3/3696G09G2330/08
    • The present invention is intended to minimize an amount of charge that flows from a step-up circuit into an external input voltage terminal when the power supply is turned off. A display device includes a display panel and a drive circuit that drives pixels included in the display panel. The drive circuit includes a power circuit to which a voltage Vcc is fed. The power circuit includes: a first step-up circuit that generates a voltage DDVDH which is higher than the voltage Vcc; a means 1 that when the first step-up circuit is de-energized, connects the voltage DDVDH output terminal of the first step-up circuit to a reference voltage terminal via a resistive element during a first period; and a means 2 that connects the voltage DDVDH output terminal of the first step-up circuit to an input terminal, to which the voltage Vcc is fed, during a second period succeeding the first period.
    • 本发明旨在最小化当电源关闭时从升压电路流入外部输入电压端子的电荷量。 显示装置包括显示面板和驱动显示面板中包含的像素的驱动电路。 驱动电路包括供给电压Vcc的电源电路。 电源电路包括:产生高于电压Vcc的电压DDVDH的第一升压电路; 一种装置1,当第一升压电路断电时,在第一时段期间经由电阻元件将第一升压电路的电压DDVDH输出端连接到参考电压端; 以及在第一时段之后的第二周期期间将第一升压电路的电压DDVDH输出端子连接到馈电电压Vcc的输入端子的装置2。