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    • 1. 发明授权
    • Data multiplexing system having at least one low-speed interface circuit
connected to a bus
    • 具有连接到总线的至少一个低速接口电路的数据复用系统
    • US5757806A
    • 1998-05-26
    • US846165
    • 1997-04-28
    • Hiroki KoyamaYoshihiro AshiHiroyuki FujitaMichael A. Wright
    • Hiroki KoyamaYoshihiro AshiHiroyuki FujitaMichael A. Wright
    • H04J3/08H04J3/00H04J3/04H04J3/16H04J3/22H04L5/22
    • H04J3/047H04J3/1611
    • A data multiplexing system which includes a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplxer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus. The high-speed multiplexer multiplexes the collected signals up to a predetermined signal level and sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface. The high-speed interface module converts the received secondary multiplexed signal and sends the resulting signal to the high-speed transmission line. The signal of the high-speed transmission line is processed by the high-speed interface module and the high-speed demultiplexer, and the low-speed digital signals are sent to the low-speed transmission lines.
    • 一种数据复用系统,包括多个数据复用总线,多个低速数字信号通过该数据复用总线被收集到多路复用器/多分频器中并从多路复用器/多分频器分配。 在数据复用模式中,从多个低速传输线输入的低速数字信号通过分别对应的低速接口电路进行信号格式转换,并将得到的信号在复用信号中指定的时隙中复用 在相应数据复用总线的上行总线上的主级。 高速多路复用器将收集的信号多路复用到预定的信号电平,并将得到的辅助复用信号发送到具有高速传输线接口的高速接口模块。 高速接口模块转换接收到的二次复用信号,并将结果信号发送到高速传输线。 高速传输线的信号由高速接口模块和高速解复用器进行处理,低速数字信号被发送到低速传输线。
    • 2. 发明授权
    • Data multiplexing system having at least one low-speed interface circuit
connected to a bus
    • 具有连接到总线的至少一个低速接口电路的数据复用系统
    • US5452307A
    • 1995-09-19
    • US326236
    • 1994-10-20
    • Hiroki KoyamaYoshihiro AshiHiroyuki FujitaMichael A. Wright
    • Hiroki KoyamaYoshihiro AshiHiroyuki FujitaMichael A. Wright
    • H04J3/08H04J3/00H04J3/04H04J3/16H04J3/22H04L5/22H04Q11/04
    • H04J3/047H04J3/1611
    • A data multiplexing system comprising a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplexer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus, under the controls of respectively corresponding bus control circuits. The high-speed multiplexer collects the primary multiplexed signals on the up bus lines of the plurality of data multiplexing buses, and further multiplexes the collected signals up to a predetermined signal level. Thereafter, it sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface. The high-speed interface module converts the received secondary multiplexed signal so as to match the interface of a high-speed transmission line, and sends the resulting signal to the high-speed transmission line. In a data demultiplexing mode, the signal of the high-speed transmission line is processed by the high-speed interface module and the high-speed demultiplexer, and the resulting signals are distributed through the down bus lines of the data multiplexing buses so as to send the low-speed digital signals to the low-speed transmission lines.
    • 一种数据复用系统,包括多个数据复用总线,多个低速数字信号通过多路复用总线被收集到多路复用器/解复用器中并从多路复用器/解复用器中分发。 在数据复用模式中,从多个低速传输线输入的低速数字信号通过分别对应的低速接口电路进行信号格式转换,并将得到的信号在复用信号中指定的时隙中复用 在对应数据复用总线的上行总线上的主电平,分别对应于总线控制电路的控制。 高速多路复用器在多个数据复用总线的上行总线上收集一次多路复用信号,并将收集的信号进一步多路复用到预定的信号电平。 此后,它将所得的二次复用信号发送到具有高速传输线接口的高速接口模块。 高速接口模块将接收到的二次复用信号转换为与高速传输线路的接口相匹配,并将结果信号发送到高速传输线路。 在数据解复用模式中,高速传输线的信号由高速接口模块和高速解复用器进行处理,所得到的信号通过数据复用总线的下行总线进行分配,以便 将低速数字信号发送到低速传输线。
    • 3. 发明授权
    • Configuration method of multiplex conversion unit and multiplex
conversion unit
    • 复用转换单元和多路复用转换单元的配置方法
    • US5896387A
    • 1999-04-20
    • US789116
    • 1997-01-27
    • Hiroyuki FujitaNaohisa HamaguchiYoshihiro Ashi
    • Hiroyuki FujitaNaohisa HamaguchiYoshihiro Ashi
    • H04J3/00H04J3/08H04J3/16H04J3/02
    • H04J3/085H04J3/1611
    • A multiplex conversion unit is configured with the functions required for a specific network to which it is applicable more economically. Each OC-12IF circuit pack includes a switch for performing time slot assignment (TSA) between a plurality of high-speed transmission lines accommodated in the OC-12IF circuit pack and at least a low-speed transmission line accommodated in at least a DS3IF circuit pack. An ADM circuit pack includes a switch for performing time slot interchange (TSI) between the high-speed transmission lines and the low-speed transmission line. In an application to a network requiring the TSI function, the switch of the OC-12IF circuit pack performs only the add/drop multiplex (ADM) operation between the signals input/output by the high-speed transmission lines and the ADM circuit pack, and the switch on the ADM circuit pack performs the TSI operation. In an application not requiring the TSI, on the other hand, the TSA operation is performed by the switch of the OC-12IF circuit pack using a THRU circuit pack having a wiring connecting the OC-12IF circuit pack and a DS3IF circuit pack in place of the ADM circuit pack.
    • 复用转换单元被配置为具有更经济可用的特定网络所需的功能。 每个OC-12IF电路板包括用于在容纳在OC-12IF电路板中的多个高速传输线之间执行时隙分配(TSA)的开关和至少一个容纳在至少DS3IF电路中的低速传输线 包。 ADM电路板包括用于在高速传输线和低速传输线之间执行时隙交换(TSI)的开关。 在需要TSI功能的网络的应用中,OC-12IF电路板的开关仅执行由高速传输线和ADM电路板输入/输出的信号之间的分插复用(ADM)操作, 并且ADM电路板上的开关执行TSI操作。 另一方面,在不需要TSI的应用中,通过使用具有连接OC-12IF电路板和DS3IF电路板的布线的THRU电路板来切换OC-12IF电路板来执行TSA操作 的ADM电路板。
    • 5. 发明授权
    • Switch for self-healing ring
    • 切换自愈环
    • US5475676A
    • 1995-12-12
    • US89948
    • 1993-07-12
    • Masahiro TakatoriYukio NakanoYoshihiro AshiHiroyuki Fujita
    • Masahiro TakatoriYukio NakanoYoshihiro AshiHiroyuki Fujita
    • H04J3/08H04Q11/04
    • H04J3/085
    • First stage and third stage four-input four-output space division switches are arranged before and after a second stage time division switch, and two outputs of the first stage space division switch and two inputs of the third stage space division switch are connected by bypassing the time division switch. The time division switch has n control memories. A first control memory stores connection information in a normal state of each path set in the transmission line, a second control memory stores connection information of a first alternative path when failures occur in a path, and an n-th control memory (n is any integer equal or greater than 3) stores connection information of an (n-1)th alternative path, and a control memory corresponding the a failure pattern is selected from the n control memories for each path.
    • 第一级和第三级四输入四输出空分开关布置在第二级分时开关之前和之后,第一级空分开关的两个输出和第三级空分开关的两个输入通过旁路连接 时分开关。 时分开关具有n个控制存储器。 第一控制存储器存储在传输线路中设置的每个路径的正常状态的连接信息,当路径中出现故障时,第二控制存储器存储第一替代路径的连接信息,并且第n控制存储器 整数等于或大于3)存储第(n-1)个替代路径的连接信息,并且从每个路径的n个控制存储器中选择与故障模式相对应的控制存储器。
    • 6. 发明授权
    • Multiplex conversion unit
    • 多路转换单元
    • US06876624B1
    • 2005-04-05
    • US09265373
    • 1999-03-10
    • Hiroyuki FujitaNaohisa HamaguchiYoshihiro Ashi
    • Hiroyuki FujitaNaohisa HamaguchiYoshihiro Ashi
    • H04J3/08H04J3/16G04R31/08H04L12/50
    • H04J3/1611H04J3/085
    • A multiplex conversion unit is configured with those functions required for a specific network to which it is more economically applicable. Each OC-12IF circuit pack includes a switch for performing time slot assignment (TSA) between a plurality of high-speed transmission lines and at least a low-speed transmission line. An ADM circuit pack includes a switch for performing time slot interchange (TSI) between the high-speed transmission lines and the low-speed transmission line. In an application to a network requiring the TSI function, the switch of the OC-12IF circuit pack performs only the add/drop multiplex (ADM) operation between the signals input/output by the high-speed transmission lines and the ADM circuit pack, and the switch on the ADM circuit pack performs the TSI operation. In an application not requiring the TSI, the TSA operation is performed using a THRU circuit pack.
    • 复用转换单元被配置为具有更经济适用的特定网络所需的那些功能。 每个OC-12IF电路板包括用于在多个高速传输线和至少一个低速传输线之间执行时隙分配(TSA)的开关。 ADM电路板包括用于在高速传输线和低速传输线之间执行时隙交换(TSI)的开关。 在需要TSI功能的网络的应用中,OC-12IF电路板的开关仅执行由高速传输线和ADM电路板输入/输出的信号之间的分插复用(ADM)操作, 并且ADM电路板上的开关执行TSI操作。 在不需要TSI的应用中,使用THRU电路板执行TSA操作。
    • 9. 发明授权
    • Wireless communication apparatus having wireless communication functions conforming to incompatible communication standards
    • 具有符合不兼容通信标准的无线通信功能的无线通信装置
    • US08005504B2
    • 2011-08-23
    • US11560170
    • 2006-11-15
    • Eiichi SanoHiroyuki Fujita
    • Eiichi SanoHiroyuki Fujita
    • H04M1/00
    • H04W52/42H04B7/0602H04B7/0805H04B7/0825H04M2250/02H04M2250/06
    • A wireless communication apparatus is provided. The wireless communication apparatus includes wireless communication functions conforming to incompatible first and second communication standards. The wireless communication apparatus includes a first transceiver that performs a wireless communication operation conforming to the first communication standard and includes a first transmission/reception port, a second transceiver that performs a wireless communication operation conforming to the second communication standard and includes a second transmission/reception port, a shared antenna shared by the first and the second transceivers, an antenna connecting unit that connects the shared antenna and the first and the second transmission/reception ports, and a control unit that controls the communication operations in the first and the second transceivers.
    • 提供一种无线通信装置。 无线通信装置包括符合不兼容的第一和第二通信标准的无线通信功能。 无线通信装置包括执行符合第一通信标准的无线通信操作的第一收发器,并且包括第一发送/接收端口,执行符合第二通信标准的无线通信操作的第二收发器,并且包括第二发送/ 接收端口,由第一和第二收发器共享的共享天线,连接共享天线与第一和第二发送/接收端口的天线连接单元,以及控制单元,其控制第一和第二收发器中的通信操作 收发器