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1. 发明申请

US20060164189A1 Strip line device, member to be mounted on printed wiring board, circuit board, semiconductor package, and its fabricating method 失效
标题翻译：带状线器件，安装在印刷线路板上的部件，电路板，半导体封装及其制造方法
公开(公告)号：US20060164189A1
公开(公告)日：2006-07-27
申请号：US10526673
申请日：2003-09-02
申请人： Hirokazu Tohya , Koichiro Masuda , Hideki Shimizu
发明人： Hirokazu Tohya , Koichiro Masuda , Hideki Shimizu
IPC分类号： H01P3/08
CPC分类号： H01L23/50 , H01G2/065 , H01L23/66 , H01L2223/665 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2924/01012 , H01L2924/01025 , H01L2924/01079 , H01L2924/15312 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01P3/085 , H01P3/088 , H05K1/0237 , H05K3/222 , H01L2924/00014
摘要： Electromagnetic waves leaking from a power distribution circuit provided on a printed wiring substrate or in a semiconductor package are suppressed, and degradation of the waveform of a signal generated by a high-speed digital circuit. A strip line device comprises an elongated metal plate (10) having a valve action and coated with a dielectric film (20). A conductive layer (30) is formed to cover the valve-acting metal, with the dielectric film (20) interposed therebetween. The characteristic impedance as seen from its input terminal can be low over a wide range.
摘要翻译：从设置在印刷布线基板或半导体封装中的配电电路泄漏的电磁波被抑制，并且由高速数字电路产生的信号的波形劣化。带状线装置包括具有阀作用并且涂覆有电介质膜（20）的细长金属板（10）。导电层（30）形成为覆盖阀作用金属，介电膜（20）插入其间。其输入端子的特性阻抗在宽范围内可能较低。

2. 发明授权

US07315226B2 Strip line device, printed wiring board mounting member, circuit board, semiconductor package, and method of forming same 失效
标题翻译：带状线器件，印刷线路板安装部件，电路板，半导体封装及其形成方法
公开(公告)号：US07315226B2
公开(公告)日：2008-01-01
申请号：US10526673
申请日：2003-09-02
申请人： Hirokazu Tohya , Koichiro Masuda , Hideki Shimizu
发明人： Hirokazu Tohya , Koichiro Masuda , Hideki Shimizu
IPC分类号： H03H7/00
CPC分类号： H01L23/50 , H01G2/065 , H01L23/66 , H01L2223/665 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2924/01012 , H01L2924/01025 , H01L2924/01079 , H01L2924/15312 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01P3/085 , H01P3/088 , H05K1/0237 , H05K3/222 , H01L2924/00014
摘要： Electromagnetic waves leaking from a power distribution circuit provided on a printed wiring substrate or in a semiconductor package are suppressed, and degradation of the waveform of a signal generated by a high-speed digital circuit. A strip line device comprises an elongated metal plate (10) having a valve action and coated with a dielectric film (20). A conductive layer (30) is formed to cover the valve-acting metal, with the dielectric film (20) interposed therebetween. The characteristic impedance as seen from its input terminal can be low over a wide range.
摘要翻译：从设置在印刷布线基板或半导体封装中的配电电路泄漏的电磁波被抑制，并且由高速数字电路产生的信号的波形劣化。带状线装置包括具有阀作用并且涂覆有电介质膜（20）的细长金属板（10）。导电层（30）形成为覆盖阀作用金属，介电膜（20）插入其间。其输入端子的特性阻抗在宽范围内可能较低。

3. 发明申请

US20060114076A1 Element of parallel flat plate line type, a circuit board 失效
标题翻译：平板平板线型元件，电路板
公开(公告)号：US20060114076A1
公开(公告)日：2006-06-01
申请号：US11320594
申请日：2005-12-30
申请人： Koichiro Masuda , Hirokazu Tohya
发明人： Koichiro Masuda , Hirokazu Tohya
IPC分类号： H04B3/28
CPC分类号： H05K1/0233 , H01P1/203 , H01P3/02 , H05K2201/1006
摘要： An element of parallel flat plate line type suitable for operation at a higher speed and with a higher frequency is provided. The element is characterized by including a first metallic member 1 including a flat plate section 11 and a projected section 12 in which a plurality of projections are formed to stand on one surface of the flat plate section 11 in a direction substantially vertical to the surface with gaps therebetween, a second metallic member 2 including a flat plate section 21 and a projected section 22 in which a plurality of projections are formed to stand on one surface of the flat plate section 21 in a direction substantially vertical to the surface with gaps therebetween, and a dielectric film 31 formed between the projections and the gaps of the element of parallel flat plate line type formed by inserting the projections of the first metallic member 1 in the gap of the second metallic member 2 and inserting the projections of the second metallic member 2 in the gap of the first metallic member 1, wherein a transmission line is formed between the first metallic member 1 and the second metallic member 2 along the dielectric film 31, the transmission line being formed to have transmittivity ranging from −140 dB to −20 dB for a high-frequency electromagnetic wave ranging from 100 kHz to 10 GHz supplied from one terminal.
摘要翻译：提供了适用于更高速度和更高频率操作的平行平板线型的元件。该元件的特征在于包括：第一金属构件1，其包括平板部分11和突出部分12，其中形成有多个突起，以在基板垂直于该表面的方向上在平板部分11的一个表面上竖立，间隙，第二金属构件2，其包括平板部21和突出部22，突出部22中形成有多个突起，以在平板部21的一个表面上沿与其表面间隔大致垂直的方向竖立，以及形成在突起之间的电介质膜31和通过将第一金属构件1的突起插入第二金属构件2的间隙中并且插入第二金属构件的突起而形成的平行平板线形元件的间隙 2在第一金属构件1的间隙中，其中在第一金属构件1和第二金属构件之间形成传输线 c构件2，对于从一个端子提供的从100kHz到10GHz的高频电磁波，传输线形成为具有从-140dB到-20dB的透射率。

4. 发明授权

US06873518B2 Shielded strip line device and method of manufacture thereof 失效
标题翻译：屏蔽带状线器件及其制造方法
公开(公告)号：US06873518B2
公开(公告)日：2005-03-29
申请号：US10701587
申请日：2003-11-05
申请人： Koichiro Masuda , Hirokazu Tohya , Masaharu Satoh
发明人： Koichiro Masuda , Hirokazu Tohya , Masaharu Satoh
IPC分类号： H01G9/012 , H01G9/042 , H01G9/10 , H01G9/15 , H01P3/08 , H01P11/00 , H03H1/00 , H01G9/02
CPC分类号： H01G9/012 , H01G9/042 , H01G9/10 , H01G9/15 , H01P3/088 , H01P11/003 , H03H1/0007 , H03H2001/0014 , Y10T29/417
摘要： A dielectric oxide film is formed on the surface of a valve metal plate formed of aluminum and a conductive polymer layer is provided so as to cover the valve metal plate and the dielectric oxide film. The conductive polymer layer is formed of polyaniline having para-toluenesulfonic acid as a dopant. A conductive carbon paste layer and a silver paste layer are provided at the outer side of the conductive polymer layer and a metal plate, comprising a copper foil, is overlapped onto the silver paste layer. Anode lead terminals are connected to the ends of the valve metal plate and the respective end parts of the metal plate are arranged as cathode lead terminals. A shield strip line device, which is low in impedance, especially in high-frequency ranges of 100 MHz or more, and is favorably adapted to high speed and high frequencies, mainly for use as a bypass device for a noise filter or as a decoupling device, is thus obtained.
摘要翻译：在由铝形成的阀金属板的表面上形成电介质氧化物膜，并且设置导电性聚合物层以覆盖阀金属板和电介质氧化物膜。导电聚合物层由具有对甲苯磺酸作为掺杂剂的聚苯胺形成。在导电聚合物层的外侧设置有导电性碳糊层和银膏层，并且在银膏层上重叠包含铜箔的金属板。阳极引线端子连接到阀金属板的端部，并且金属板的各个端部被布置为阴极引线端子。一种屏蔽带状线路器件，其阻抗低，特别是在100MHz或更高的高频范围内，并且有利地适用于高速和高频率，主要用作噪声滤波器的旁路装置或用作去耦装置。

5. 发明授权

US07242265B2 Element of parallel flat plate line type, a circuit board 失效
标题翻译：平板平板线型元件，电路板
公开(公告)号：US07242265B2
公开(公告)日：2007-07-10
申请号：US11320594
申请日：2005-12-30
申请人： Koichiro Masuda , Hirokazu Tohya
发明人： Koichiro Masuda , Hirokazu Tohya
IPC分类号： H01P3/08 , H04B3/28
CPC分类号： H05K1/0233 , H01P1/203 , H01P3/02 , H05K2201/1006
摘要： An element of parallel flat plate line type suitable for operation at a higher speed and with a higher frequency is provided. The element is characterized by including a first metallic member 1 including a flat plate section 11 and a projected section 12 in which a plurality of projections are formed to stand on one surface of the flat plate section 11 in a direction substantially vertical to the surface with gaps therebetween, a second metallic member 2 including a flat plate section 21 and a projected section 22 in which a plurality of projections are formed to stand on one surface of the flat plate section 21 in a direction substantially vertical to the surface with gaps therebetween, and a dielectric film 31 formed between the projections and the gaps of the element of parallel flat plate line type formed by inserting the projections of the first metallic member 1 in the gap of the second metallic member 2 and inserting the projections of the second metallic member 2 in the gap of the first metallic member 1, wherein a transmission line is formed between the first metallic member 1 and the second metallic member 2 along the dielectric film 31, the transmission line being formed to have transmittivity ranging from −140 dB to −20 dB for a high-frequency electromagnetic wave ranging from 100 kHz to 10 GHz supplied from one terminal.
摘要翻译：提供了适用于更高速度和更高频率操作的平行平板线型的元件。该元件的特征在于包括：第一金属构件1，其包括平板部分11和突出部分12，其中形成有多个突起，以在基板垂直于该表面的方向上在平板部分11的一个表面上竖立，间隙，第二金属构件2，其包括平板部21和突出部22，突出部22中形成有多个突起，以在平板部21的一个表面上沿与其表面间隔大致垂直的方向竖立，以及形成在突起之间的电介质膜31和通过将第一金属构件1的突起插入第二金属构件2的间隙中并且插入第二金属构件的突起而形成的平行平板线形元件的间隙 2在第一金属构件1的间隙中，其中在第一金属构件1和第二金属构件之间形成传输线 c构件2，对于从一个端子提供的从100kHz到10GHz的高频电磁波，传输线形成为具有从-140dB到-20dB的透射率。

6. 发明授权

US06721171B2 Shielded strip line device and method of manufacture thereof 失效
标题翻译：屏蔽带状线器件及其制造方法
公开(公告)号：US06721171B2
公开(公告)日：2004-04-13
申请号：US10247976
申请日：2002-09-20
申请人： Koichiro Masuda , Hirokazu Tohya , Masaharu Satoh
发明人： Koichiro Masuda , Hirokazu Tohya , Masaharu Satoh
IPC分类号： H01G900
CPC分类号： H01G9/012 , H01G9/042 , H01G9/10 , H01G9/15 , H01P3/088 , H01P11/003 , H03H1/0007 , H03H2001/0014 , Y10T29/417
摘要： A dielectric oxide film is formed on the surface of a valve metal plate formed of aluminum and a conductive polymer layer is provided so as to cover the valve metal plate and the dielectric oxide film. The conductive polymer layer is formed of polyaniline having para-toluenesulfonic acid as a dopant. A conductive carbon paste layer and a silver paste layer are provided at the outer side of the conductive polymer layer and a metal plate, comprising a copper foil, is overlapped onto the silver paste layer. Anode lead terminals are connected to the ends of the valve metal plate and the respective end parts of the metal plate are arranged as cathode lead terminals. A shield strip line device, which is low in impedance, especially in high-frequency ranges of 100 MHz or more, and is favorably adapted to high speed and high frequencies, mainly for use as a bypass device for a noise filter or as a decoupling device, is thus obtained.
摘要翻译：在由铝形成的阀金属板的表面上形成电介质氧化物膜，并且设置导电性聚合物层以覆盖阀金属板和电介质氧化物膜。导电聚合物层由具有对甲苯磺酸作为掺杂剂的聚苯胺形成。在导电聚合物层的外侧设置有导电性碳糊层和银膏层，并且在银膏层上重叠包含铜箔的金属板。阳极引线端子连接到阀金属板的端部，并且金属板的各个端部被布置为阴极引线端子。一种屏蔽带线设备，其阻抗低，特别是在100MHz或更高的高频范围内，并且有利地适用于高速和高频率，主要用作噪声滤波器的旁路设备或用作去耦装置。

7. 发明授权

US07750765B2 Compact via transmission line for printed circuit board and design method of the same 有权
标题翻译：紧凑型印刷电路板传输线及其设计方法相同
公开(公告)号：US07750765B2
公开(公告)日：2010-07-06
申请号：US12249273
申请日：2008-10-10
申请人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
发明人： Taras Kushta , Kaoru Narita , Takanori Saeki , Tomoyuki Kaneko , Hirokazu Tohya
IPC分类号： H03H7/38 , H01P1/04
CPC分类号： H05K1/0222 , H01P3/06 , H05K1/024 , H05K1/0251 , H05K3/429 , H05K2201/0187 , H05K2201/09063 , H05K2201/09536 , H05K2201/09618 , H05K2201/09718 , H05K2201/09809
摘要： A compact via transmission line for a printed circuit board having preferred characteristic impedance and capable of miniaturizing the printed circuit board including a multilayer printed circuit board, and extending the frequency range of a via transmission line mounted on the printed circuit board, and a design method of the same. The transmission line has a central conductor forming an inner conductor layer boundary make up a signal via hole, a plurality of via holes arranged around the central conductor form an outer conductor layer boundary, and a plurality of conductor plates formed of a printed circuit board conductor layer, is further provided with a constitutive parameter adjustment clearance hole between the inner and outer conductor layer boundaries of the compact via transmission line, and electrically isolates to prevent cross-talk of a signal propagating through a signal via hole with other signals in a high-frequency signal band.
摘要翻译：一种用于具有优选特性阻抗并能够使包括多层印刷电路板的印刷电路板小型化并且扩展安装在印刷电路板上的通孔传输线的频率范围的印刷电路板的紧凑型通路传输线，以及设计方法一样的。传输线具有形成内导体层边界的中心导体，构成信号通孔，围绕中心导体布置的多个通孔形成外导体层边界，以及由印刷电路板导体形成的多个导体板通过传输线在压缩体的内部和外部导体层边界之间进一步设置本构参数调整间隙孔，并且电隔离以防止通过信号通孔传播的信号与其他信号在高电平中的串扰频率信号频带。

8. 发明授权

US06477694B1 Method for designing a power supply decoupling circuit 失效
标题翻译：电源去耦电路设计方法
公开(公告)号：US06477694B1
公开(公告)日：2002-11-05
申请号：US09698588
申请日：2000-10-27
申请人： Hitoshi Irino , Noriaki Ando , Hiroshi Wabuka , Hirokazu Tohya
发明人： Hitoshi Irino , Noriaki Ando , Hiroshi Wabuka , Hirokazu Tohya
IPC分类号： G06F1750
CPC分类号： H05K1/0231 , G06F17/5068 , H05K1/165 , H05K3/0005 , H05K2201/10689
摘要： A design support system 100 according to the present invention comprises: an LSI library 10, in which rated characteristics of various LSIs are stored by an LSI library preparation unit 70; a decoupling capacitor library 20, in which rated characteristics of various capacitors are stored; a PCB library 30, in which the cross-sectional structures of various power wiring lines are stored; a decoupling capacitor search unit 40, for employing the LSI library 10 and the decoupling capacitor library 20; a power wiring determination unit 50, for employing the results obtained by the decoupling capacitor search unit 40, the LSI library 10 and the PCB library 30; and a design results output unit 60, for outputting the results received from the power wiring determination unit 50. Furthermore, the data in the three libraries can be updated or new data can be added.
摘要翻译：根据本发明的设计支持系统100包括：LSI库10，其中LSI库准备单元70存储各种LSI的额定特性; 去耦电容器库20，其中存储各种电容器的额定特性; PCB库30，其中存储各种电力布线的横截面结构; 去耦电容器搜索单元40，用于采用LSI库10和去耦电容器库20; 电源布线确定单元50，用于采用由去耦电容器搜索单元40，LSI库10和PCB库30获得的结果; 以及设计结果输出单元60，用于输出从电力布线确定单元50接收的结果。此外，可以更新三个库中的数据或者可以添加新的数据。

9. 发明授权

US06359237B1 Multi-layer printed board 有权
标题翻译：多层印刷板
公开(公告)号：US06359237B1
公开(公告)日：2002-03-19
申请号：US09637684
申请日：2000-08-14
申请人： Hirokazu Tohya , Shiro Yoshida
发明人： Hirokazu Tohya , Shiro Yoshida
IPC分类号： H01R909
CPC分类号： H05K1/0248 , H05K1/0218 , H05K1/0298 , H05K1/162 , H05K2201/09263 , H05K2201/09309 , H05K2201/09327 , H05K2201/10689
摘要： In order to reduce electromagnetic inductive interference due to power source current, in a multi-layer printed board on which a multiplicity of high-speed and high-frequency circuit elements are mounted, a multi-layer printed board has a construction such that on both upper and lower sides of a power source layer 1 provided with power source wiring 6, are laminated ground layers 2 via respective first insulating material layers 4, and on one or both of the upper and lower sides of these is laminated a signal layer 3 provided with signal wiring, via a second insulating material layer 5.
摘要翻译：为了减少由于电源电流引起的电磁感应干扰，在多层印刷电路板上安装有多个高速和高频电路元件的情况下，多层印刷电路板具有这样的结构：设置有电源布线6的电源层1的上侧和下侧经由各自的第一绝缘材料层4层叠接地层2，并且在它们的上侧和下侧的一侧或两侧层叠有提供的信号层3 具有信号线，经由第二绝缘材料层5。

10. 发明授权

US06252384B1 Power-supply voltage fluctuation inhibiting circuit 有权
标题翻译：电源电压波动抑制电路
公开(公告)号：US06252384B1
公开(公告)日：2001-06-26
申请号：US09544919
申请日：2000-04-07
申请人： Satoshi Arai , Hirokazu Tohya
发明人： Satoshi Arai , Hirokazu Tohya
IPC分类号： G05F156
CPC分类号： G06F1/305 , G06F1/28
摘要： Disclosed are a circuit and method for inhibiting a fluctuation in power-supply terminal voltage of a CPU caused by a change in working current of the CPU, which is connected to a DC power supply. The circuit includes a CPU controlled between a sleep state and an operating state by the value of a stop-clock signal applied thereto from a stop-clock terminal; a transistor inserted in parallel with the CPU across power-supply terminals thereof; and a control circuit for controlling the flow of current into the transistor in dependence upon a change in the power-supply current of the CPU caused by a change in the stop-clock signal, thereby inhibiting a fluctuation in voltage across the power-supply terminals of the CPU.
摘要翻译：公开了一种用于抑制由连接到直流电源的CPU的工作电流变化引起的CPU的电源端子电压波动的电路和方法。电路包括通过从停止时钟端子施加到其的停止时钟信号的值在睡眠状态和操作状态之间控制的CPU; 晶体管在其电源端子上与CPU并联插入; 以及控制电路，用于根据由停止时钟信号的变化引起的CPU的电源电流的变化来控制进入晶体管的电流流动，由此抑制电源端子的电压波动的CPU。

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