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1. 发明授权

US07855131B2 Manufacturing method of a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07855131B2
公开(公告)日：2010-12-21
申请号：US12385782
申请日：2009-04-20
申请人： Hirokazu Fujiwara , Masaki Konishi , Takeo Yamamoto , Eiichi Okuno , Yukihiko Watanbe , Takashi Katsuno
发明人： Hirokazu Fujiwara , Masaki Konishi , Takeo Yamamoto , Eiichi Okuno , Yukihiko Watanbe , Takashi Katsuno
IPC分类号： H01L21/322
CPC分类号： H01L29/47 , H01L21/046 , H01L29/1608 , H01L29/66143 , H01L29/872
摘要： A manufacturing method of a semiconductor device comprises a process of doping conductive impurities in a silicon carbide substrate, a process of forming a cap layer on a surface of the silicon carbide substrate, a process of activating the conductive impurities doped in the silicon carbide substrate, a process of oxidizing the cap layer after a first annealing process, and a process of removing the oxidized cap layer. It is preferred that the cap layer is formed from material that includes metal carbide. Since the oxidation onset temperature of metal carbide is comparatively low, the oxidization of the cap layer becomes easy if metal carbide is included in the cap layer. Specifically, it is preferred that the cap layer is formed from metal carbide that has an oxidation onset temperature of 1000 degrees Celsius or below, such as tantalum carbide.
摘要翻译：半导体器件的制造方法包括在碳化硅衬底中掺杂导电杂质的工艺，在碳化硅衬底的表面上形成覆盖层的工艺，激活掺杂在碳化硅衬底中的导电杂质的工艺，在第一退火工艺之后氧化盖层的工艺，以及去除氧化的盖层的工艺。优选的是，盖层由包括金属碳化物的材料形成。由于金属碳化物的氧化开始温度相对较低，如果在盖层中包括金属碳化物，则盖层的氧化变得容易。具体而言，优选盖层由氧化开始温度为1000℃以下的金属碳化物形成，例如碳化钽。

2. 发明授权

US08324704B2 Silicon carbide semiconductor device with Schottky barrier diode and method of manufacturing the same 有权
标题翻译：具有肖特基势垒二极管的碳化硅半导体器件及其制造方法
公开(公告)号：US08324704B2
公开(公告)日：2012-12-04
申请号：US12659853
申请日：2010-03-23
申请人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Hirokazu Fujiwara , Masaki Konishi , Takashi Katsuno , Yukihiko Watanabe
发明人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Hirokazu Fujiwara , Masaki Konishi , Takashi Katsuno , Yukihiko Watanabe
IPC分类号： H01L29/24 , H01L29/47 , H01L21/04
CPC分类号： H01L29/47 , H01L21/0465 , H01L21/0495 , H01L29/0615 , H01L29/0619 , H01L29/1608 , H01L29/6606 , H01L29/66143 , H01L29/872
摘要： A silicon carbide semiconductor device with a Schottky barrier diode includes a first conductivity type silicon carbide substrate, a first conductivity type silicon carbide drift layer on a first surface of the substrate, a Schottky electrode forming a Schottky contact with the drift layer, and an ohmic electrode on a second surface of the substrate. The Schottky electrode includes an oxide layer in direct contact with the drift layer. The oxide layer is made of an oxide of molybdenum, titanium, nickel, or an alloy of at least two of these elements.
摘要翻译：具有肖特基势垒二极管的碳化硅半导体器件包括第一导电型碳化硅衬底，在衬底的第一表面上的第一导电型碳化硅漂移层，与漂移层形成肖特基接触的肖特基电极和欧姆电极在基板的第二表面上。肖特基电极包括与漂移层直接接触的氧化物层。氧化物层由钼，钛，镍或这些元素中的至少两种的合金的氧化物制成。

3. 发明申请

US20090267082A1 Semiconductor device and manufacturing method of the same 审中-公开
标题翻译：半导体器件及其制造方法相同
公开(公告)号：US20090267082A1
公开(公告)日：2009-10-29
申请号：US12385594
申请日：2009-04-14
申请人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Masaki Konishi , Hirokazu Fujiwara
发明人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Masaki Konishi , Hirokazu Fujiwara
IPC分类号： H01L29/872 , H01L29/24 , H01L21/329
CPC分类号： H01L29/861 , H01L21/0495 , H01L29/0657 , H01L29/1608 , H01L29/6606 , H01L29/7395 , H01L29/872
摘要： A semiconductor device includes: a semiconductor element having a first surface and a second surface; a first electrode disposed on the first surface of the element; a second electrode disposed on the second surface of the element; and an insulation film covers a part of the first electrode, the first surface of the element and a part of a sidewall of the element. The above semiconductor device has small dimensions and a high breakdown voltage.
摘要翻译：半导体器件包括：具有第一表面和第二表面的半导体元件; 设置在所述元件的第一表面上的第一电极; 设置在所述元件的第二表面上的第二电极; 并且绝缘膜覆盖第一电极的一部分，元件的第一表面和元件的侧壁的一部分。上述半导体器件具有小的尺寸和高的击穿电压。

4. 发明申请

US20090160008A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090160008A1
公开(公告)日：2009-06-25
申请号：US12343714
申请日：2008-12-24
申请人： Hirokazu Fujiwara , Masaki Konishi , Eiichi Okuno
发明人： Hirokazu Fujiwara , Masaki Konishi , Eiichi Okuno
IPC分类号： H01L29/47 , H01L21/441
CPC分类号： H01L29/872 , H01L29/861
摘要： A semiconductor device that includes an n-type semiconductor substrate and an upper electrode formed on an upper face of the semiconductor substrate and a method of manufacturing the semiconductor device are provided. A p-type semiconductor region is repeatedly formed in the semiconductor substrate in at least one direction parallel to the substrate plane so as to be exposed on an upper face of the semiconductor substrate. The upper electrode includes a metal electrode portion; and a semiconductor electrode portion made of a semiconductor material whose band gap is narrower than that of the semiconductor substrate. The semiconductor electrode portion is provided on each p-type semiconductor region exposed on the upper face of the semiconductor substrate. The metal electrode portion is in Schottky contact with an n-type semiconductor region exposed on the upper face of the semiconductor substrate, and is in ohmic contact with the semiconductor electrode portion.
摘要翻译：提供一种半导体器件，其包括形成在半导体衬底的上表面上的n型半导体衬底和上电极以及制造半导体器件的方法。在半导体衬底中以平行于衬底平面的至少一个方向重复地形成p型半导体区域，以便露出在半导体衬底的上表面上。上部电极包括金属电极部分; 以及由半导体材料制成的半导体电极部分，该半导体材料的带隙比半导体衬底窄。半导体电极部分设置在暴露在半导体衬底的上表面上的每个p型半导体区域上。金属电极部分与暴露在半导体衬底的上表面上的n型半导体区域肖特基接触，并与半导体电极部分欧姆接触。

5. 发明授权

US08168485B2 Semiconductor device making method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US08168485B2
公开(公告)日：2012-05-01
申请号：US12461205
申请日：2009-08-04
申请人： Takeshi Endo , Eiichi Okuno , Takeo Yamamoto , Hirokazu Fujiwara , Masaki Konishi , Yukihiko Watanabe , Takashi Katsuno
发明人： Takeshi Endo , Eiichi Okuno , Takeo Yamamoto , Hirokazu Fujiwara , Masaki Konishi , Yukihiko Watanabe , Takashi Katsuno
IPC分类号： H01L29/812 , H01L21/338
CPC分类号： H01L29/872 , H01L29/456 , H01L29/47 , H01L29/66136 , H01L29/66143 , H01L29/861
摘要： A method of making a semiconductor device includes forming a p-type semiconductor region to an n-type semiconductor substrate in such a manner that the p-type semiconductor region is partially exposed to a top surface of the semiconductor substrate, forming a Schottky electrode of a first material in such a manner that the Schottky electrode is in Schottky contact with an n-type semiconductor region exposed to the top surface of the semiconductor substrate, and forming an ohmic electrode of a second material different from the first material in such a manner that the ohmic electrode is in ohmic contact with the exposed p-type semiconductor region. The Schottky electrode is formed earlier than the ohmic electrode.
摘要翻译：制造半导体器件的方法包括：以p型半导体区域部分地暴露于半导体衬底的顶表面，形成p型半导体区域到n型半导体衬底，形成肖特基电极以使肖特基电极与暴露于半导体衬底的顶表面的n型半导体区域肖特基接触的方式形成第一材料，并且以这种方式形成不同于第一材料的第二材料的欧姆电极欧姆电极与暴露的p型半导体区域欧姆接触。肖特基电极比欧姆电极早。

6. 发明申请

US20100032730A1 Semiconductor device and method of making the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100032730A1
公开(公告)日：2010-02-11
申请号：US12461205
申请日：2009-08-04
申请人： Takeshi Endo , Eiichi Okuno , Takeo Yamamoto , Hirokazu Fujiwara , Masaki Konishi , Yukihiko Watanabe , Takashi Katsuno
发明人： Takeshi Endo , Eiichi Okuno , Takeo Yamamoto , Hirokazu Fujiwara , Masaki Konishi , Yukihiko Watanabe , Takashi Katsuno
IPC分类号： H01L29/812 , H01L21/338
CPC分类号： H01L29/872 , H01L29/456 , H01L29/47 , H01L29/66136 , H01L29/66143 , H01L29/861
摘要： A method of making a semiconductor device includes forming a p-type semiconductor region to an n-type semiconductor substrate in such a manner that the p-type semiconductor region is partially exposed to a top surface of the semiconductor substrate, forming a Schottky electrode of a first material in such a manner that the Schottky electrode is in Schottky contact with an n-type semiconductor region exposed to the top surface of the semiconductor substrate, and forming an ohmic electrode of a second material different from the first material in such a manner that the ohmic electrode is in ohmic contact with the exposed p-type semiconductor region. The Schottky electrode is formed earlier than the ohmic electrode.
摘要翻译：制造半导体器件的方法包括：以p型半导体区域部分地暴露于半导体衬底的顶表面，形成p型半导体区域到n型半导体衬底，形成肖特基电极以使肖特基电极与暴露于半导体衬底的顶表面的n型半导体区域肖特基接触的方式形成第一材料，并且以这种方式形成不同于第一材料的第二材料的欧姆电极欧姆电极与暴露的p型半导体区域欧姆接触。肖特基电极比欧姆电极早。

7. 发明申请

US20090269908A1 Manufacturing method of a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20090269908A1
公开(公告)日：2009-10-29
申请号：US12385782
申请日：2009-04-20
申请人： Hirokazu Fujiwara , Masaki Konishi , Takeo Yamamoto , Eiichi Okuno , Yukihiko Watanabe , Takashi Katsuno
发明人： Hirokazu Fujiwara , Masaki Konishi , Takeo Yamamoto , Eiichi Okuno , Yukihiko Watanabe , Takashi Katsuno
IPC分类号： H01L21/04
CPC分类号： H01L29/47 , H01L21/046 , H01L29/1608 , H01L29/66143 , H01L29/872
摘要： A manufacturing method of a semiconductor device comprises a process of doping conductive impurities in a silicon carbide substrate, a process of forming a cap layer on a surface of the silicon carbide substrate, a process of activating the conductive impurities doped in the silicon carbide substrate, a process of oxidizing the cap layer after a first annealing process, and a process of removing the oxidized cap layer. It is preferred that the cap layer is formed from material that includes metal carbide. Since the oxidation onset temperature of metal carbide is comparatively low, the oxidization of the cap layer becomes easy if metal carbide is included in the cap layer. Specifically, it is preferred that the cap layer is formed from metal carbide that has an oxidation onset temperature of 1000 degrees Celsius or below, such as tantalum carbide.
摘要翻译：半导体器件的制造方法包括在碳化硅衬底中掺杂导电杂质的工艺，在碳化硅衬底的表面上形成覆盖层的工艺，激活掺杂在碳化硅衬底中的导电杂质的工艺，在第一退火工艺之后氧化盖层的工艺，以及去除氧化的盖层的工艺。优选的是，盖层由包括金属碳化物的材料形成。由于金属碳化物的氧化开始温度相对较低，如果在盖层中包括金属碳化物，则盖层的氧化变得容易。具体而言，优选由碳化钽等氧化开始温度为1000℃以下的金属碳化物形成盖层。

8. 发明申请

US20100244049A1 Silicon carbide semiconductor device with schottky barrier diode and method of manufacturing the same 有权
标题翻译：具有肖特基势垒二极管的碳化硅半导体器件及其制造方法
公开(公告)号：US20100244049A1
公开(公告)日：2010-09-30
申请号：US12659853
申请日：2010-03-23
申请人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Hirokazu Fujiwara , Masaki Konishi , Takashi Katsuno , Yukihiko Watanabe
发明人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Hirokazu Fujiwara , Masaki Konishi , Takashi Katsuno , Yukihiko Watanabe
IPC分类号： H01L29/47 , H01L29/24 , H01L21/04
CPC分类号： H01L29/47 , H01L21/0465 , H01L21/0495 , H01L29/0615 , H01L29/0619 , H01L29/1608 , H01L29/6606 , H01L29/66143 , H01L29/872
摘要： A silicon carbide semiconductor device with a Schottky barrier diode includes a first conductivity type silicon carbide substrate, a first conductivity type silicon carbide drift layer on a first surface of the substrate, a Schottky electrode forming a Schottky contact with the drift layer, and an ohmic electrode on a second surface of the substrate. The Schottky electrode includes an oxide layer in direct contact with the drift layer. The oxide layer is made of an oxide of molybdenum, titanium, nickel, or an alloy of at least two of these elements.
摘要翻译：具有肖特基势垒二极管的碳化硅半导体器件包括第一导电型碳化硅衬底，在衬底的第一表面上的第一导电型碳化硅漂移层，与漂移层形成肖特基接触的肖特基电极和欧姆电极在基板的第二表面上。肖特基电极包括与漂移层直接接触的氧化物层。氧化物层由钼，钛，镍或这些元素中的至少两种的合金的氧化物制成。

9. 发明授权

US08164100B2 Semiconductor device and method of manufacturing thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08164100B2
公开(公告)日：2012-04-24
申请号：US12338151
申请日：2008-12-18
申请人： Hirokazu Fujiwara , Masaki Konishi , Eiichi Okuno
发明人： Hirokazu Fujiwara , Masaki Konishi , Eiichi Okuno
IPC分类号： H01L29/72
CPC分类号： H01L29/7813 , H01L29/04 , H01L29/1608 , H01L29/66068 , H01L29/872
摘要： A semiconductor device is provided in which the contact resistance of the interface between an electrode and the semiconductor substrate is reduced. The semiconductor device includes a 4H polytype SiC substrate, and an electrode formed on a surface of the substrate. A 3C polytype layer, which extends obliquely relative to the surface of the substrate and whose end portion at the substrate surface is in contact with the electrode, is formed at the surface of the substrate. The 3C polytype layer has a lower bandgap than 4H polytype. Hence, electrons present in the 4H polytype region pass through the 3C polytype layer and reach the electrode. More precisely, the width of the passageway of the electrons is determined by the thickness of the 3C polytype layer. Consequently, with this semiconductor device, in which the passageway of the electrons is narrow, the electrons are able to reach the electrode at a speed close to the theoretical value, by the quantum wire effect. In this way, the contact resistance can be reduced in the semiconductor device.
摘要翻译：提供一种半导体器件，其中电极和半导体衬底之间的界面的接触电阻降低。半导体器件包括4H多型SiC衬底和形成在衬底的表面上的电极。形成在基板表面上相对于基板的表面倾斜地延伸并且其基板表面的端部与电极接触的3C多型层。 3C多型层具有比4H多型更低的带隙。因此，存在于4H多型区域中的电子通过3C多型层并到达电极。更准确地说，电子通道的宽度由3C多型层的厚度决定。因此，通过电子通道窄的这种半导体器件，电子能够以接近理论值的速度通过量子线效应到达电极。以这种方式，可以在半导体器件中降低接触电阻。

10. 发明申请

US20090159898A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090159898A1
公开(公告)日：2009-06-25
申请号：US12338151
申请日：2008-12-18
申请人： Hirokazu FUJIWARA , Masaki Konishi , Eiichi Okuno
发明人： Hirokazu FUJIWARA , Masaki Konishi , Eiichi Okuno
IPC分类号： H01L29/24 , H01L21/265
CPC分类号： H01L29/7813 , H01L29/04 , H01L29/1608 , H01L29/66068 , H01L29/872
摘要： A semiconductor device is provided in which the contact resistance of the interface between an electrode and the semiconductor substrate is reduced. The semiconductor device includes a 4H polytype SiC substrate, and an electrode formed on a surface of the substrate. A 3C polytype layer, which extends obliquely relative to the surface of the substrate and whose end portion at the substrate surface is in contact with the electrode, is formed at the surface of the substrate. The 3C polytype layer has a lower bandgap than 4H polytype. Hence, electrons present in the 4H polytype region pass through the 3C polytype layer and reach the electrode. More precisely, the width of the passageway of the electrons is determined by the thickness of the 3C polytype layer. Consequently, with this semiconductor device, in which the passageway of the electrons is narrow, the electrons are able to reach the electrode at a speed close to the theoretical value, by the quantum wire effect. In this way, the contact resistance can be reduced in the semiconductor device.
摘要翻译：提供一种半导体器件，其中电极和半导体衬底之间的界面的接触电阻降低。半导体器件包括4H多型SiC衬底和形成在衬底的表面上的电极。形成在基板表面上相对于基板的表面倾斜地延伸并且其基板表面的端部与电极接触的3C多型层。 3C多型层具有比4H多型更低的带隙。因此，存在于4H多型区域中的电子通过3C多型层并到达电极。更准确地说，电子通道的宽度由3C多型层的厚度决定。因此，通过电子通道窄的这种半导体器件，电子能够以接近理论值的速度通过量子线效应到达电极。以这种方式，可以在半导体器件中降低接触电阻。

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