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1. 发明授权

US06982914B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US06982914B2
公开(公告)日：2006-01-03
申请号：US10754747
申请日：2004-01-08
申请人： Hirohisa Ohtsuki , Toshikazu Suzuki
发明人： Hirohisa Ohtsuki , Toshikazu Suzuki
IPC分类号： G11C7/02
CPC分类号： G11C7/227 , G11C7/1045 , G11C7/22 , G11C2207/2281
摘要： A semiconductor memory device includes a replica circuit including a plurality of replica cells (RMC) having the same elements as those of memory cells in a memory array and outputting signals with levels in the stage number to a common replica bit line, and a sense amplifier control circuit for receiving a signal of the replica bit line to control a timing of a signal SAE for starting a sense amplifier circuit. The replica circuit includes a switching circuit (SW) for switching the stage number of the replica cells to be activated among the plurality of replica cells in a programmable manner.
摘要翻译：半导体存储器件包括复制电路，该复制电路包括具有与存储器阵列中的存储器单元相同的元件的多个复制单元（RMC），并将具有级数的信号输出到公共复制位线，以及读出放大器控制电路，用于接收复制位线的信号，以控制用于启动读出放大器电路的信号SAE的定时。复制电路包括用于以可编程方式在多个复制单元之间切换待激活的复制单元的级数的开关电路（SW）。

2. 发明授权

US08068158B2 Solid state imaging device capable of parallel reading of data from a plurality of pixel cells 有权
标题翻译：能够并行读取多个像素单元的数据的固态成像装置
公开(公告)号：US08068158B2
公开(公告)日：2011-11-29
申请号：US12429768
申请日：2009-04-24
申请人： Hirohisa Ohtsuki
发明人： Hirohisa Ohtsuki
IPC分类号： H04N3/14
CPC分类号： H04N5/3745 , H01L27/14603 , H01L27/14636 , H04N5/357
摘要： A solid state imaging device has a pixel region composed of a matrix of pixel cells each including a photodiode and a charge storage portion. First and second output signal lines are in parallel and adjacent to both the charge storage portions of a first pixel cell and a second pixel cells that are adjacent on a same column. A signal voltage of a signal charge in the charge storage portion of the first pixel cell is output to the first output signal line, whereas a signal voltage of a signal charge in the charge storage portion of the second pixel cell is output to the second output signal line. The respective outputs to the first and second output signal lines are processed in parallel. A conductive layer is disposed between the charge storage portion of the first pixel cell and the second output signal line to suppress capacitive coupling.
摘要翻译：固态成像装置具有由像素单元的矩阵构成的像素区域，每个像素单元包括光电二极管和电荷存储部分。第一和第二输出信号线与第一像素单元的电荷存储部分和在同一列上相邻的第二像素单元并联并相邻。第一像素单元的电荷存储部分中的信号电荷的信号电压被输出到第一输出信号线，而第二像素单元的电荷存储部分中的信号电荷的信号电压被输出到第二输出信号线。对第一和第二输出信号线的相应输出被并行处理。导电层设置在第一像素单元的电荷存储部分和第二输出信号线之间以抑制电容耦合。

3. 发明申请

US20070210398A1 Solid-state imaging device and method for driving the same 有权
标题翻译：固态成像装置及其驱动方法
公开(公告)号：US20070210398A1
公开(公告)日：2007-09-13
申请号：US11716743
申请日：2007-03-12
申请人： Hirohisa Ohtsuki , Motonari Katsuno , Ryohei Miyagawa
发明人： Hirohisa Ohtsuki , Motonari Katsuno , Ryohei Miyagawa
IPC分类号： H01L27/14
CPC分类号： H01L27/14603 , H01L27/14636
摘要： A pixel array is provided in which cells are arranged in a matrix. Each cell includes a photodiode, an FD, a transfer transistor, a reset transistor, an amplifying transistor having a gate electrode connected to the FD, a drain connected to a power supply line, and a source connected to a vertical signal line, and an FD wire. The FD wire is provided in a first wiring line, and the vertical signal line is provided in a second wiring line positioned over the first wiring layer. Since the potential of the FD wire follows the potential of the vertical signal line, it is possible to suppress a variation in capacitance occurring in the FD when a position of the vertical signal is shifted, depending on a position of the cell.
摘要翻译：提供了像素阵列，其中单元被布置成矩阵。每个单元包括光电二极管，FD，传输晶体管，复位晶体管，具有连接到FD的栅电极的放大晶体管，连接到电源线的漏极和连接到垂直信号线的源，以及 FD线。 FD线设置在第一布线中，垂直信号线设置在位于第一布线层上的第二布线中。由于FD线的电位跟随垂直信号线的电位，所以根据单元的位置，当垂直信号的位置偏移时，有可能抑制在FD中发生的电容的变化。

4. 发明申请

US20060050586A1 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US20060050586A1
公开(公告)日：2006-03-09
申请号：US11218601
申请日：2005-09-06
申请人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
发明人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
IPC分类号： G11C7/02
CPC分类号： G11C7/065 , G11C7/08 , G11C7/14 , G11C7/227 , G11C11/419 , H01L27/1104
摘要： A memory array, a sense amplifier circuit, a replica circuit and a dummy cell are disposed. The replica circuit has the same elements as memory cells, and includes plural replica cells which output a signal whose level corresponds to the number of stages provided to a common replica bit line. The dummy cell is connected as a load with the common replica bit line. The source of a drive transistor of the dummy cell is connected with a power source which is at the High level. This suppresses a leak current flowing from a replica bit line to the dummy cell.
摘要翻译：存储器阵列，读出放大器电路，复制电路和虚设单元。复制电路具有与存储单元相同的元件，并且包括输出其电平对应于提供给公共复制位线的级数的信号的多个复制单元。虚拟单元作为负载与公共副本位线连接。虚拟单元的驱动晶体管的源极与处于高电平的电源连接。这抑制了从复制位线流向虚拟电池的泄漏电流。

5. 发明授权

US07248523B2 Static random access memory (SRAM) with replica cells and a dummy cell 有权
标题翻译：具有复制单元和虚拟单元的静态随机存取存储器（SRAM）
公开(公告)号：US07248523B2
公开(公告)日：2007-07-24
申请号：US11218601
申请日：2005-09-06
申请人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
发明人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
IPC分类号： G11C7/14 , G11C11/41 , G11C11/413 , G11C29/24 , G11C7/08
CPC分类号： G11C7/065 , G11C7/08 , G11C7/14 , G11C7/227 , G11C11/419 , H01L27/1104
摘要： A static random access memory (SRAM) includes a memory array, a sense amplifier circuit, a replica circuit and a dummy cell. The replica circuit has the same elements as memory cells, and includes plural replica cells which output a signal whose level corresponds to the number of stages provided to a common replica bit line. The dummy cell is connected as a load with the common replica bit line. The source of a drive transistor of the dummy cell is connected with a power source which is at the High level. This suppresses a leak current flowing from a replica bit line to the dummy cell.
摘要翻译：静态随机存取存储器（SRAM）包括存储器阵列，读出放大器电路，复制电路和虚拟单元。复制电路具有与存储单元相同的元件，并且包括输出其电平对应于提供给公共复制位线的级数的信号的多个复制单元。虚拟单元作为负载与公共副本位线连接。虚拟单元的驱动晶体管的源极与处于高电平的电源连接。这抑制了从复制位线流向虚拟电池的泄漏电流。

6. 发明申请

US20130001650A1 SOLID-STATE IMAGING DEVICE 有权
标题翻译：固态成像装置
公开(公告)号：US20130001650A1
公开(公告)日：2013-01-03
申请号：US13611953
申请日：2012-09-12
申请人： Hirohisa Ohtsuki
发明人： Hirohisa Ohtsuki
IPC分类号： H01L27/148
CPC分类号： H01L27/14603 , H01L27/14636 , H01L27/14643
摘要： The present invention provides a solid-state imaging device in which high S/N is achieved. A solid-state imaging device includes a photodiode, a transfer transistor, a floating diffusion, a floating diffusion wiring, an amplifying transistor, a power line, and first output signal lines, in which the first output signal lines are formed one on each side of the floating diffusion wiring in a layer having the floating diffusion wiring formed on a semiconductor substrate, and the power line is formed above the floating diffusion wiring.
摘要翻译：本发明提供了一种实现高S / N的固态成像装置。固态成像装置包括光电二极管，传输晶体管，浮动扩散，浮动扩散布线，放大晶体管，电源线和第一输出信号线，其中第一输出信号线在每一侧形成的浮动扩散布线形成在半导体衬底上形成有浮动扩散布线的层中，并且电源线形成在浮置扩散布线的上方。

7. 发明申请

US20110001207A1 SOLID STATE IMAGE SENSOR AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：固态图像传感器及其制造方法
公开(公告)号：US20110001207A1
公开(公告)日：2011-01-06
申请号：US12820655
申请日：2010-06-22
申请人： Masayuki TAKASE , Hirohisa Ohtsuki , Hiroyuki Doi , Motonari Katsuno
发明人： Masayuki TAKASE , Hirohisa Ohtsuki , Hiroyuki Doi , Motonari Katsuno
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L27/1464 , H01L27/14621 , H01L27/14641
摘要： A solid state image sensor includes: a first pixel and a second pixel, each including a light receiving portion; a first color filter formed in an upper part of the first pixel on a first main surface side of a semiconductor substrate; a second color filter formed in an upper part of the second pixel on the first main surface side of the semiconductor substrate; a metal interconnect layer formed on a second main surface side of the semiconductor substrate; and a substrate contact connected to the second main surface of the semiconductor substrate, and provided between the metal interconnect layer and the second main surface. The first color filter mainly transmits first light therethrough, and the second color filter mainly transmits second light therethrough. The second light has a shorter wavelength than that of the first light. The substrate contact is not provided in the first pixel.
摘要翻译：固态图像传感器包括：第一像素和第二像素，每个包括光接收部分; 形成在半导体衬底的第一主表面侧的第一像素的上部的第一滤色器; 第二滤色器，形成在所述半导体衬底的所述第一主表面侧上的所述第二像素的上部; 形成在所述半导体衬底的第二主表面侧上的金属互连层; 以及与半导体基板的第二主表面连接并设置在金属互连层和第二主表面之间的基板接触。第一滤色器主要透射第一光，第二滤色器主要透射第二光。第二光的波长比第一光的波长短。在第一像素中没有提供衬底接触。

8. 发明授权

US07863661B2 Solid-state imaging device and camera having the same 有权
标题翻译：固态成像装置和具有相同功能的相机
公开(公告)号：US07863661B2
公开(公告)日：2011-01-04
申请号：US12054038
申请日：2008-03-24
申请人： Motonari Katsuno , Ryohei Miyagawa , Hirohisa Ohtsuki
发明人： Motonari Katsuno , Ryohei Miyagawa , Hirohisa Ohtsuki
IPC分类号： H01L29/72
CPC分类号： H01L27/14603 , H01L27/14609
摘要： Provided is a solid-state imaging device including unit pixels, wherein the unit pixels include two kinds of unit pixels including a first unit pixel and a second unit pixel that are formed on a common well on a semiconductor substrate. The first unit pixel includes: at least one photoelectric conversion region which converts light into a signal charge; the first semiconductor region that is formed on the common well and has a conductivity type identical to that of the common well; and the first contact electrically connected to the first semiconductor region. The second unit pixel includes: at least one photoelectric conversion region; the second semiconductor region that is formed on the common well and has a conductivity type opposite to that of the common well; and the second contact electrically connected to the second semiconductor region.
摘要翻译：提供了一种包括单位像素的固态成像装置，其中单位像素包括形成在半导体衬底上的公共阱上的包括第一单位像素和第二单位像素的两种单位像素。第一单位像素包括：将光转换成信号电荷的至少一个光电转换区域; 所述第一半导体区域形成在所述共同阱上并且具有与所述公用阱的导电类型相同的导电类型; 并且所述第一触点电连接到所述第一半导体区域。第二单位像素包括：至少一个光电转换区域; 所述第二半导体区域形成在所述公井上，并且具有与所述公共井的导电类型相反的导电类型; 并且所述第二触点电连接到所述第二半导体区域。

9. 发明授权

US07136318B2 Semiconductor memory device and circuit layout of dummy cell 有权
标题翻译：半导体存储器件和虚拟电池的电路布局
公开(公告)号：US07136318B2
公开(公告)日：2006-11-14
申请号：US11156706
申请日：2005-06-21
申请人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
发明人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
IPC分类号： G11C7/02
CPC分类号： G11C7/08 , G11C7/12 , G11C7/227 , G11C11/413
摘要： A dummy cell includes two series-connected OFF-state transistors, one end of the series circuit which is formed by these two transistors is connected with a constant voltage source, and the other end of the series circuit is connected with a replica bit line. This suppresses a leak current flowing from the replica bit line to the dummy cell and therefore gives optimal start-up timing to a sense amplifier circuit.
摘要翻译：虚拟单元包括两个串联的截止状态晶体管，由这两个晶体管形成的串联电路的一端与恒定电压源连接，串联电路的另一端与复制位线连接。这抑制了从复制位线流向虚拟单元的泄漏电流，从而给读出放大器电路提供了最佳的启动时序。

10. 发明申请

US20050286323A1 Semiconductor memory device and circuit layout of dummy cell 有权
标题翻译：半导体存储器件和虚拟电池的电路布局
公开(公告)号：US20050286323A1
公开(公告)日：2005-12-29
申请号：US11156706
申请日：2005-06-21
申请人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
发明人： Hirohisa Ohtsuki , Kazuo Itoh , Katsuji Satomi , Hironori Akamatsu
IPC分类号： G11C7/08 , G11C7/12 , G11C11/413 , G11C29/00
CPC分类号： G11C7/08 , G11C7/12 , G11C7/227 , G11C11/413
摘要： A dummy cell includes two series-connected OFF-state transistors, one end of the series circuit which is formed by these two transistors is connected with a constant voltage source, and the other end of the series circuit is connected with a replica bit line. This suppresses a leak current flowing from the replica bit line to the dummy cell and therefore gives optimal start-up timing to a sense amplifier circuit.
摘要翻译：虚拟单元包括两个串联的截止状态晶体管，由这两个晶体管形成的串联电路的一端与恒定电压源连接，串联电路的另一端与复制位线连接。这抑制了从复制位线流向虚拟单元的泄漏电流，从而给读出放大器电路提供了最佳的启动时序。

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