专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08383487B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US08383487B2
公开(公告)日：2013-02-26
申请号：US13198171
申请日：2011-08-04
申请人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
发明人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
IPC分类号： H01L21/76
CPC分类号： H01L21/76254
摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.
摘要翻译：在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层，通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层，所述支撑基板对残留在所述单晶半导体层上的所述易碎区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理，具有激光的晶体半导体层。

2. 发明授权

US08436403B2 Semiconductor device including transistor provided with sidewall and electronic appliance 有权
标题翻译：包括设置有侧壁和电子设备的晶体管的半导体器件
公开(公告)号：US08436403B2
公开(公告)日：2013-05-07
申请号：US13014081
申请日：2011-01-26
申请人： Shunpei Yamazaki , Hiromichi Godo , Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata , Mayumi Mikami
发明人： Shunpei Yamazaki , Hiromichi Godo , Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata , Mayumi Mikami
IPC分类号： H01L21/84
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/45 , H01L29/66969 , Y10T428/24421
摘要： One object is to provide a semiconductor device that includes an oxide semiconductor and is reduced in size with favorable characteristics maintained. The semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The source electrode or the drain electrode includes a first conductive layer and a second conductive layer having a region extended in a channel length direction from an end face of the first conductive layer. The sidewall insulating layer has a length of a bottom surface in the channel length direction smaller than a length in the channel length direction of the extended region of the second conductive layer and is provided over the extended region.
摘要翻译：一个目的是提供一种包括氧化物半导体的半导体器件，并且尺寸减小，并保持良好的特性。半导体器件包括与氧化物半导体层接触的氧化物半导体层，源电极和漏电极，与氧化物半导体层重叠的栅电极; 以及在氧化物半导体层和栅电极之间的栅极绝缘层。源电极或漏极包括第一导电层和具有从第一导电层的端面在沟道长度方向上延伸的区域的第二导电层。侧壁绝缘层的沟道长度方向的底面的长度小于第二导电层的延伸区域的沟道长度方向的长度，并且设置在延伸区域上。

3. 发明授权

US08593603B2 Display device and electronic device 有权
标题翻译：显示设备和电子设备
公开(公告)号：US08593603B2
公开(公告)日：2013-11-26
申请号：US11806256
申请日：2007-05-30
申请人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
发明人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
IPC分类号： G02F1/1335 , G02B27/00
CPC分类号： G02B1/118 , C09K11/06 , C09K2211/1011 , C09K2211/1029 , C09K2211/185 , G02F1/133502 , G02F2201/38 , H01L27/3244 , H01L51/5281 , H05B33/22
摘要： A display device includes an anti-reflection film having a plurality of projections over a display screen surface. An angle made by a base and a slope of each of the plurality of projections is equal to or greater than 84° and less than 90°.
摘要翻译：显示装置包括在显示屏表面上具有多个突起的防反射膜。由基座形成的角度和多个突起中的每一个的倾斜度等于或大于84°且小于90°。

4. 发明申请

US20080042926A1 Display device 有权
标题翻译：显示设备
公开(公告)号：US20080042926A1
公开(公告)日：2008-02-21
申请号：US11806071
申请日：2007-05-29
申请人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
发明人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
IPC分类号： G09G3/34
CPC分类号： G02B1/118 , C09K11/06 , C09K2211/1011 , C09K2211/1029 , C09K2211/185 , G02B1/14 , G02F1/133502 , H01J2211/442 , H01L27/3244 , H01L51/5281 , H05B33/22 , Y10T428/10
摘要： The display device includes an anti-reflection film having a plurality of projections over a display screen surface and a protective layer filling a space between the projections. The number of times of incidence of external light entering the display device on the anti-reflection film is increased; therefore, the amount of external light transmitted through the anti-reflection film is increased. Thus, the amount of external light reflected to a viewer side is reduced, and the cause of a reduction in visibility such as reflection can be eliminated. Further, since the plurality of projections is covered with a protective layer, entry of dust can be prevented, and physical strength of the anti-reflection film can be increased.
摘要翻译：显示装置包括在显示屏表面上具有多个突起的防反射膜和填充突起之间的空间的保护层。在抗反射膜上进入显示装置的外部光的入射次数增加; 因此，透过防反射膜的外部光量增加。因此，反射到观察者侧的外部光量减少，并且可以消除诸如反射等可见性的降低的原因。此外，由于多个突起被保护层覆盖，因此可以防止灰尘进入，并且可以提高抗反射膜的物理强度。

5. 发明申请

US20070284991A1 Display device and electronic device 有权
标题翻译：显示设备和电子设备
公开(公告)号：US20070284991A1
公开(公告)日：2007-12-13
申请号：US11806256
申请日：2007-05-30
申请人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
发明人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
IPC分类号： H01J29/88
CPC分类号： G02B1/118 , C09K11/06 , C09K2211/1011 , C09K2211/1029 , C09K2211/185 , G02F1/133502 , G02F2201/38 , H01L27/3244 , H01L51/5281 , H05B33/22
摘要： A display device includes an anti-reflection film having a plurality of projections over a display screen surface. An angle made by a base and a slope of each of the plurality of projections is equal to or greater than 84° and less than 90°.
摘要翻译：显示装置包括在显示屏表面上具有多个突起的防反射膜。由基座形成的角度和多个突起中的每一个的倾斜度等于或大于84°且小于90°。

6. 发明授权

US08723768B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08723768B2
公开(公告)日：2014-05-13
申请号：US11806071
申请日：2007-05-29
申请人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
发明人： Yuji Egi , Takeshi Nishi , Kiyofumi Ogino , Shinya Sasagawa , Motomu Kurata , Hideomi Suzawa
IPC分类号： G09G3/34 , G09G3/00 , C09K19/00 , G03B21/60
CPC分类号： G02B1/118 , C09K11/06 , C09K2211/1011 , C09K2211/1029 , C09K2211/185 , G02B1/14 , G02F1/133502 , H01J2211/442 , H01L27/3244 , H01L51/5281 , H05B33/22 , Y10T428/10
摘要： The display device includes an anti-reflection film having a plurality of projections over a display screen surface and a protective layer filling a space between the projections. The number of times of incidence of external light entering the display device on the anti-reflection film is increased; therefore, the amount of external light transmitted through the anti-reflection film is increased. Thus, the amount of external light reflected to a viewer side is reduced, and the cause of a reduction in visibility such as reflection can be eliminated. Further, since the plurality of projections is covered with a protective layer, entry of dust can be prevented, and physical strength of the anti-reflection film can be increased.
摘要翻译：显示装置包括在显示屏表面上具有多个突起的防反射膜和填充突起之间的空间的保护层。在抗反射膜上进入显示装置的外部光的入射次数增加; 因此，透过防反射膜的外部光量增加。因此，反射到观察者侧的外部光量减少，并且可以消除诸如反射等可见性的降低的原因。此外，由于多个突起被保护层覆盖，因此可以防止灰尘进入，并且可以提高抗反射膜的物理强度。

7. 发明授权

US08653513B2 Semiconductor device with sidewall insulating layer 有权
标题翻译：具有侧壁绝缘层的半导体器件
公开(公告)号：US08653513B2
公开(公告)日：2014-02-18
申请号：US13029146
申请日：2011-02-17
申请人： Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata
发明人： Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata
IPC分类号： H01L29/78
CPC分类号： H01L29/7869 , G11C16/0408 , G11C16/0483 , H01L27/11521 , H01L27/1156 , H01L29/41733 , H01L29/45 , H01L29/66969
摘要： A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode, in which the source electrode or the drain electrode comprises a first conductive layer and a second conductive layer having a region which extends beyond an end portion of the first conductive layer in a channel length direction and which overlaps with part of the gate electrode, in which a sidewall insulating layer is provided over the extended region of the second conductive layer, and in which the sidewall insulating layer comprises a stack of a plurality of different material layers.
摘要翻译：半导体器件包括与氧化物半导体层接触的氧化物半导体层，源电极和漏电极，与氧化物半导体层重叠的栅电极，以及在氧化物半导体层和栅电极之间的栅极绝缘层，源电极或漏电极包括第一导电层和第二导电层，第二导电层具有在沟道长度方向上延伸超出第一导电层的端部并且与栅电极的一部分重叠的区域，其中侧壁绝缘层设置在第二导电层的延伸区域上，并且其中侧壁绝缘层包括多个不同材料层的堆叠。

8. 发明授权

US08003483B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US08003483B2
公开(公告)日：2011-08-23
申请号：US12399047
申请日：2009-03-06
申请人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
发明人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
IPC分类号： H01L21/76
CPC分类号： H01L21/76254
摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.
摘要翻译：在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层，通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层，所述支撑基板对残留在所述单晶半导体层上的所述脆性区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理，具有激光的晶体半导体层。

9. 发明授权

US08624400B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08624400B2
公开(公告)日：2014-01-07
申请号：US12840442
申请日：2010-07-21
申请人： Shunpei Yamazaki , Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata
发明人： Shunpei Yamazaki , Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata
IPC分类号： H01L23/52 , H01L29/786
CPC分类号： H01L29/41733 , H01L21/76804 , H01L21/76805 , H01L23/485 , H01L27/124 , H01L2924/0002 , H01L2924/00
摘要： A technique of manufacturing a semiconductor device in which etching in formation of a contact hole can be easily controlled is proposed. A semiconductor device includes at least a semiconductor layer formed over an insulating surface; a first insulating layer formed over the semiconductor layer; a gate electrode formed over the first insulating layer; a second insulating layer formed over the gate electrode; and a conductive layer formed over the second insulating layer connected to the semiconductor layer via an opening which is formed at least in the semiconductor layer and the second insulating layer and partially exposes the insulating surface. The conductive layer is electrically connected to the semiconductor layer at the side surface of the opening which is formed in the semiconductor layer.
摘要翻译：提出了可以容易地控制形成接触孔的蚀刻的半导体器件的制造技术。半导体器件至少包括形成在绝缘表面上的半导体层; 形成在所述半导体层上的第一绝缘层; 形成在所述第一绝缘层上的栅电极; 形成在所述栅电极上的第二绝缘层; 以及形成在所述第二绝缘层之上的导电层，所述导电层经由至少在所述半导体层和所述第二绝缘层中形成并且部分地暴露所述绝缘表面的开口连接到所述半导体层。导电层在形成于半导体层的开口的侧面与半导体层电连接。

10. 发明授权

US08492840B2 Semiconductor device having an oxide semiconductor layer 有权
标题翻译：具有氧化物半导体层的半导体器件
公开(公告)号：US08492840B2
公开(公告)日：2013-07-23
申请号：US13008285
申请日：2011-01-18
申请人： Shunpei Yamazaki , Hiromichi Godo , Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata , Mayumi Mikami
发明人： Shunpei Yamazaki , Hiromichi Godo , Hideomi Suzawa , Shinya Sasagawa , Motomu Kurata , Mayumi Mikami
IPC分类号： H01L27/12
CPC分类号： H01L29/7869
摘要： An object is to provide a semiconductor device including an oxide semiconductor, which maintains favorable characteristics and achieves miniaturization. The semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, and a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, in which the source electrode and the drain electrode each include a first conductive layer, and a second conductive layer having a region which extends in a channel length direction from an end portion of the first conductive layer.
摘要翻译：本发明的目的是提供一种包含氧化物半导体的半导体器件，其保持有利的特性并实现小型化。半导体器件包括与氧化物半导体层接触的氧化物半导体层，源极和漏电极，与氧化物半导体层重叠的栅电极，以及设置在氧化物半导体层和栅电极之间的栅极绝缘层，其中源电极和漏极各自包括第一导电层，以及具有从第一导电层的端部在沟道长度方向上延伸的区域的第二导电层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式