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1. 发明授权

US06337258B1 Method of dividing a wafer 有权
标题翻译：分割晶片的方法
公开(公告)号：US06337258B1
公开(公告)日：2002-01-08
申请号：US09620709
申请日：2000-07-20
申请人： Hideo Nakayoshi , Shinya Takyu , Keisuke Tokubuchi , Tetsuya Kurosawa
发明人： Hideo Nakayoshi , Shinya Takyu , Keisuke Tokubuchi , Tetsuya Kurosawa
IPC分类号： H01L2146
CPC分类号： H01L21/3043 , H01L21/78 , H01L2224/32245 , H01L2224/48465 , H01L2224/73215 , H01L2224/73265 , H01L2224/83194 , H01L2924/01079 , H01L2924/01322
摘要： Grooves are formed in an element formation surface of a wafer along dicing lines or chip dividing lines. The grooves are deeper than a thickness of a finished chip. A holding member is attached on the element formation surface of the wafer. A bottom surface of the wafer is lapped and polished to the thickness of the finished chip, thereby dividing the wafer into chips. The chips are transferred while being held by porous adsorption.
摘要翻译：沟槽沿着切割线或芯片分割线形成在晶片的元件形成表面中。凹槽比成品芯片的厚度更深。保持构件附接在晶片的元件形成表面上。将晶片的底表面研磨并抛光至成品芯片的厚度，从而将晶片分成芯片。在通过多孔吸附保持时转移芯片。

2. 发明授权

US06184109B2 Method of dividing a wafer and method of manufacturing a semiconductor device 有权
标题翻译：分割晶片的方法和制造半导体器件的方法
公开(公告)号：US06184109B2
公开(公告)日：2001-02-06
申请号：US09234505
申请日：1999-01-21
申请人： Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima , Hideo Nakayoshi
发明人： Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima , Hideo Nakayoshi
IPC分类号： H01L21301
CPC分类号： H01L21/6835 , H01L21/3043 , H01L21/6836 , H01L21/78 , H01L24/73 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2224/73265 , H01L2224/83 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10329 , H01L2924/181 , H01L2924/19041 , Y10S438/928 , Y10S438/977 , H01L2924/00014 , H01L2924/00012 , H01L2924/01031 , H01L2924/00 , H01L2924/3512
摘要： Grooves are formed in a surface of a wafer, on which surface semiconductor elements are formed, along dicing lines on the wafer by means of a dicing blade. The grooves are deeper than a thickness of a finished chip. Alternatively, grooves are formed in a surface of a wafer, on which surface semiconductor elements are formed, along chip parting lines on the wafer by etching. Like the grooves described above, the grooves are deeper than a thickness of a finished chip. A holding member is attached on the surface of the wafer on which the semiconductor elements are formed. The bottom surface of the wafer is lapped and polished to the thickness of the finished chip, thereby dividing the wafer into chips. When the wafer is divided into the chips, the lapping and polishing is continued until the thickness of the wafer becomes equal to the thickness of the finished chip, even after the wafer has been divided into the chips by the lapping and polishing.
摘要翻译：通过切割刀片，在晶片的切割线上，在其上形成表面半导体元件的晶片的表面上形成沟槽。凹槽比成品芯片的厚度更深。或者，通过蚀刻在晶片上沿芯片分割线在其上形成有表面半导体元件的晶片的表面中形成凹槽。与上述凹槽一样，凹槽比成品芯片的厚度更深。保持构件安装在其上形成有半导体元件的晶片的表面上。将晶片的底表面研磨并抛光至成品芯片的厚度，从而将晶片分成芯片。当晶片被分成芯片时，即使在通过研磨和抛光将晶片分割成芯片之后，研磨和抛光仍然持续到晶片的厚度等于成品芯片的厚度。

3. 发明授权

US06294439B1 Method of dividing a wafer and method of manufacturing a semiconductor device 有权
标题翻译：分割晶片的方法和制造半导体器件的方法
公开(公告)号：US06294439B1
公开(公告)日：2001-09-25
申请号：US09499466
申请日：2000-02-07
申请人： Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima , Hideo Nakayoshi
发明人： Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima , Hideo Nakayoshi
IPC分类号： H01L2146
CPC分类号： H01L21/6835 , B23K26/364 , B23K26/40 , B23K2103/172 , B23K2103/50 , H01L21/3043 , H01L21/6836 , H01L21/78 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73215 , H01L2224/73265 , H01L2224/83 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10329 , H01L2924/181 , H01L2924/19041 , Y10S438/928 , Y10S438/977 , H01L2924/00014 , H01L2924/00 , H01L2924/01031 , H01L2924/3512 , H01L2924/00012
摘要： Grooves are formed in a surface of a wafer, on which semiconductor elements are formed, along dicing lines or chip parting lines on the wafer. The grooves are deeper than the thickness of a finished chip, and each of them has a curved bottom surface. A holding sheet is attached on the surface of the wafer on which the semiconductor elements are formed. Subsequently, the rear surface of the wafer is lapped and polished to the thickness of the finished chip, thereby dividing the wafer into chips. Even after the wafer is divided into the chips, the lapping and polishing is continued until the thickness of the wafer becomes equal to the thickness of the finished chip. The lapping and polishing amount required to attain the thickness of the finished chip after the lapped face of the wafer reaches the bottom surface of the groove, and a depth of a region of the curved bottom surface of the groove define a ratio of not less than 0.3.
摘要翻译：在晶片的切割线或芯片分型线上形成有半导体元件的晶片的表面上形成槽。凹槽比成品芯片的厚度更深，并且每个凹槽具有弯曲的底面。保持片附着在其上形成有半导体元件的晶片的表面上。随后，将晶片的后表面研磨成最终芯片的厚度，从而将晶片分成芯片。即使在将晶片分成芯片之后，研磨和研磨仍在继续，直到晶圆厚度等于成品芯片的厚度。在晶片的研磨面到达凹槽的底面之后获得成品芯片的厚度所需的研磨和研磨量，凹槽的弯曲底面的区域的深度定义为不小于 0.3。

4. 发明授权

US5888883A Method of dividing a wafer and method of manufacturing a semiconductor device 失效
标题翻译：分割晶片的方法和制造半导体器件的方法
公开(公告)号：US5888883A
公开(公告)日：1999-03-30
申请号：US65626
申请日：1998-04-24
申请人： Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima
发明人： Shigeo Sasaki , Shinya Takyu , Keisuke Tokubuchi , Koichi Yazima
IPC分类号： H01L21/301 , H01L21/304 , H01L21/68 , H01L21/78
CPC分类号： H01L21/6835 , H01L21/3043 , H01L21/6836 , H01L21/78 , H01L2221/68327 , H01L2221/6834 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2224/73265 , H01L24/73 , H01L2924/01079 , H01L2924/0132 , H01L2924/01322 , H01L2924/181 , H01L2924/19041
摘要： Grooves are formed in a surface of a wafer, on which surface semiconductor elements are formed, along dicing lines. The grooves are deeper than a thickness of a finished chip. A holding member is attached on the surface of the wafer on which the semiconductor elements are formed. A bottom surface of the wafer is lapped and polished to the thickness of the finished chip, thereby dividing the wafer into chips. When the wafer is divided into the chips, the lapping and polishing is continued until the thickness of the wafer becomes equal to the thickness of the finished chip, even after the wafer has been divided into the chips by the lapping and polishing.
摘要翻译：沟槽沿着切割线形成在其上形成有表面半导体元件的晶片的表面中。凹槽比成品芯片的厚度更深。保持构件安装在其上形成有半导体元件的晶片的表面上。将晶片的底表面研磨并抛光至成品芯片的厚度，从而将晶片分成芯片。当晶片被分成芯片时，即使在通过研磨和抛光将晶片分割成芯片之后，研磨和抛光仍然持续到晶片的厚度等于成品芯片的厚度。

5. 发明授权

US06352073B1 Semiconductor manufacturing equipment 失效
标题翻译：半导体制造设备
公开(公告)号：US06352073B1
公开(公告)日：2002-03-05
申请号：US09404595
申请日：1999-09-24
申请人： Tetsuya Kurosawa , Hideo Numata , Keisuke Tokubuchi
发明人： Tetsuya Kurosawa , Hideo Numata , Keisuke Tokubuchi
IPC分类号： B28D704
CPC分类号： H01L21/67092 , B28D5/0094 , H01L21/6838 , H01L21/78 , Y10T279/11 , Y10T279/1249
摘要： By preventing warping of chips when detaching individual chips from a dicing sheet, improvement in quality without cracks and in productivity is realized. A collet (115) used in a step of detaching chips (110) discretely divided as bonded to a dicing sheet (109) from the dicing sheet has a flat attraction surface made of a porous material of a size equal to or larger than the chip size. Alternatively, the collet may have a chip attraction groove containing poles, balls or hemispheres, for example, to prevent warping of chips. In the step of detaching each chip from the dicing sheet, a means for reducing the bonding force of the dicing sheet, such as heating device or cooling device, may be provided. Thus, warping or cracking can be prevented in a process of thinned semiconductor substrate. Additionally, since the means for reducing the bonding force of the dicing sheet is provided in a semiconductor manufacturing equipment, breakage or cracking of chips can be prevented more reliably.
摘要翻译：通过防止从切割片上分离各个芯片时芯片的翘曲，可以实现质量的提高，无裂纹和生产率。在从切割片离散分离的切片（110）分离的步骤中使用的夹头（115）具有由等于或大于芯片的尺寸的多孔材料制成的平坦的吸引表面尺寸。或者，夹头可以具有例如包含杆，球或半球的芯片吸引槽，以防止芯片翘曲。在从切割片分离每个芯片的步骤中，可以提供用于降低切割片（例如加热装置或冷却装置）的结合力的装置。因此，在减薄的半导体衬底的工艺中可以防止翘曲或破裂。此外，由于在半导体制造装置中设置了用于降低切割片的接合力的装置，因此可以更可靠地防止切屑的断裂或破裂。

6. 发明授权

US06739326B2 Semiconductor manufacturing equipment 失效
标题翻译：半导体制造设备
公开(公告)号：US06739326B2
公开(公告)日：2004-05-25
申请号：US09986798
申请日：2001-11-13
申请人： Tetsuya Kurosawa , Hideo Numata , Keisuke Tokubuchi
发明人： Tetsuya Kurosawa , Hideo Numata , Keisuke Tokubuchi
IPC分类号： B28D704
CPC分类号： H01L21/67092 , B28D5/0094 , H01L21/6838 , H01L21/78 , Y10T279/11 , Y10T279/1249
摘要： By preventing warping of chips when detaching individual chips from a dicing sheet, improvement in quality without cracks and in productivity is realized. A collet (115) used in a step of detaching chips (110) discretely divided as bonded to a dicing sheet (109) from the dicing sheet has a flat attraction surface made of a porous material of a size equal to or larger than the chip size. Alternatively, the collet may have a chip attraction groove containing poles, balls or hemispheres, for example, to prevent warping of chips. In the step of detaching each chip from the dicing sheet, a means for reducing the bonding force of the dicing sheet, such as heating device or cooling device, may be provided. Thus, warping or cracking can be prevented in a process of thinned semiconductor substrate. Additionally, since the means for reducing the bonding force of the dicing sheet is provided in a semiconductor manufacturing equipment, breakage or cracking of chips can be prevented more reliably.
摘要翻译：通过防止从切割片上分离各个芯片时芯片的翘曲，可以实现质量的提高，无裂纹和生产率。在从切割片离散分离的切片（110）分离的步骤中使用的夹头（115）具有由等于或大于芯片的尺寸的多孔材料制成的平坦的吸引表面尺寸。或者，夹头可以具有例如包含杆，球或半球的芯片吸引槽，以防止芯片翘曲。在从切割片分离每个芯片的步骤中，可以提供用于降低切割片（例如加热装置或冷却装置）的结合力的装置。因此，在减薄的半导体衬底的工艺中可以防止翘曲或破裂。此外，由于在半导体制造装置中设置了用于降低切割片的接合力的装置，因此可以更可靠地防止切屑的断裂或破裂。

7. 发明授权

US06238515B1 Wafer transfer apparatus 有权
标题翻译：晶圆传送装置
公开(公告)号：US06238515B1
公开(公告)日：2001-05-29
申请号：US09376996
申请日：1999-08-18
申请人： Masaki Tsujimoto , Kenji Kobayashi , Hideo Numata , Keisuke Tokubuchi
发明人： Masaki Tsujimoto , Kenji Kobayashi , Hideo Numata , Keisuke Tokubuchi
IPC分类号： H01L2178
CPC分类号： H01L21/67132 , H01L21/68 , H01L2221/6839 , Y10S414/137 , Y10S414/141 , Y10T156/1705 , Y10T156/1983
摘要： A wafer transfer apparatus for sticking a wafer, which is divided into a multiplicity of chips and which has its surface stuck with a protective tape, to a ring frame by a transfer tape, includes: a positioning unit capable of disposing the protective tape stuck wafer on a positioning table and capable of performing a position adjustment of the wafer in longitudinal, lateral and rotational directions, so that the wafer is located in a reference position; a transfer tape mount unit capable of disposing the protective tape stuck wafer, which has been located in the reference position by the positioning unit, on a transfer tape mount table, and capable of sticking a transfer tape to both a ring frame disposed round periphery of the wafer and back of the wafer, so that the wafer and the ring frame are stuck to each other and integrated; and a protective tape peeling unit capable of disposing the wafer, which has its back covered with the transfer tape and which has been integrated with the ring frame by the transfer tape mount unit, on a protective tape peeling table, and capable of bonding an end of a peeling tape to an end of the protective tape stuck to the wafer surface, and capable of pulling the peeling tape so that the protective tape is peeled from the wafer surface.
摘要翻译：将通过转印带将被分割为多个芯片并且其表面粘贴有保护带的晶片的晶片传送装置包括：能够将保护带粘贴的晶片并且能够在纵向，横向和旋转方向上执行晶片的位置调整，使得晶片位于参考位置; 一种转印带安装单元，其能够将位于参考位置的定位单元的保护带粘贴的晶片放置在转印带安装台上，并且能够将转印带粘附到设置在圆周周围的环形框架晶片和晶片的背面，使得晶片和环形框架彼此粘合并集成; 以及保护带剥离单元，其能够将其后面被转印带覆盖并且通过转印带安装单元与环形框架一体化的晶片设置在保护带剥离台上，并且能够将端部剥离胶带粘附到保护胶带的端部，粘贴在晶片表面上，并且能够拉动剥离带使得保护带从晶片表面剥离。

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