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1. 发明授权

US6141729A Data transfer system which divides data among transfer units having different transfer speed characteristics 失效
标题翻译：数据传输系统，其在具有不同传送速度特性的传送单元之间划分数据
公开(公告)号：US6141729A
公开(公告)日：2000-10-31
申请号：US723872
申请日：1996-09-23
申请人： Hideo Ishida , Toshiyuki Ochiai , Yutaka Tanaka , Teruto Hirota , Akihiko Wada , Eiichi Toyonaga , Kunihiko Sakoda
发明人： Hideo Ishida , Toshiyuki Ochiai , Yutaka Tanaka , Teruto Hirota , Akihiko Wada , Eiichi Toyonaga , Kunihiko Sakoda
IPC分类号： G06F12/00 , G06F13/00 , G06F13/38 , G06F15/173 , G06F12/02
CPC分类号： G06F13/387
摘要： A data transfer system comprises a plurality of terminals; a plurality of high-speed data transfer units connected to the terminals through a network, each data transfer unit comprising a plurality of storage devices and a storage device group control device or unit for controlling readout of data from the storage devices, and dividing and storing data requested by the terminals; a virtual storage device group controlling device or unit for controlling readout of data from virtual storage device groups, each virtual storage device group being constructed by selecting a storage device from each high-speed data transfer unit; and an instruction conversion unit or device for receiving a data readout instruction on the basis of data requests output from the terminals, which instruction is given to the virtual storage device groups, from the virtual storage device group control unit or device, and converting the instruction into a data readout instruction to the storage devices from the storage device group control unit or device. In this data transfer system, the load for the data transfer processing is equally distributed among the high-speed data transfer units even when data transfer requests are output from plural terminals.
摘要翻译：数据传输系统包括多个终端; 通过网络连接到终端的多个高速数据传送单元，每个数据传送单元包括多个存储设备和用于控制来自存储设备的数据读出的存储设备组控制设备或单元，以及分配和存储终端请求的数据; 虚拟存储设备组控制设备或单元，用于控制来自虚拟存储设备组的数据读取，每个虚拟存储设备组通过从每个高速数据传送单元中选择一个存储设备来构造; 以及指令转换单元或装置，用于基于从虚拟存储设备组控制单元或设备向虚拟存储设备组发送指令，从终端输出的数据请求接收数据读出指令，并将指令转换从存储设备组控制单元或设备到存储设备的数据读取指令。在该数据传送系统中，即使当从多个终端输出数据传送请求时，数据传送处理的负载也均匀地分配在高速数据传送单元中。

2. 发明授权

US6029189A Data transfer system 失效
标题翻译：数据传输系统
公开(公告)号：US6029189A
公开(公告)日：2000-02-22
申请号：US986785
申请日：1997-12-08
申请人： Hideo Ishida , Yutaka Tanaka
发明人： Hideo Ishida , Yutaka Tanaka
IPC分类号： G06F3/06 , H04N7/173 , G06F13/00
CPC分类号： G06F3/061 , G06F3/0635 , G06F3/0689 , H04N7/17336
摘要： In a data transfer system in which when a first to fourth terminals require reading data, the data are read out of a first to fourth storages to be stored in a first and second buffer memories while a first and second virtual groups of storages are alternately switched every constant cycle, and thereafter a first and second data sending units send the data stored in the first and second buffer memories to the terminals; on the other hand, when the first to fourth terminals require writing data, received data is divided in a way to distribute the process loads of data read and data write of the divided data equally into a first and second data transfer units. At the same time, the data are stored in the first and second buffer memories of the first and second data transfer units, and thereafter the data are written into the first to fourth storages while switching the first and second virtual groups of storages alternately. As a result, the load of transferring data to the terminals is not concentrated on a particular data transfer unit in the data transfer system, even when the rate of request-to-reads from the terminals changes or differs from those of others.
摘要翻译：在第一至第四终端需要读取数据的数据传输系统中，从第一至第四存储器中读出数据以存储在第一和第二缓冲存储器中，同时第一和第二虚拟存储组交替地切换每个恒定周期，然后第一和第二数据发送单元将存储在第一和第二缓冲存储器中的数据发送到终端; 另一方面，当第一至第四终端需要写入数据时，以将分割数据的数据读取和数据写入的处理负载均等地分配到第一和第二数据传送单元的方式分割接收数据。同时，将数据存储在第一和第二数据传送单元的第一和第二缓冲存储器中，然后数据被写入第一至第四存储器，同时交替地切换第一和第二虚拟存储组。结果，即使当从终端请求读取的速率变化或与其他的不同时，向终端传送数据的负载也不集中在数据传送系统中的特定数据传送单元上。

3. 发明授权

US06070201A Alternate selection of virtual data buffer pathways 失效
标题翻译：虚拟数据缓冲通路的替代选择
公开(公告)号：US06070201A
公开(公告)日：2000-05-30
申请号：US937798
申请日：1997-09-25
申请人： Yutaka Tanaka , Keiji Okamoto , Hideo Ishida
发明人： Yutaka Tanaka , Keiji Okamoto , Hideo Ishida
IPC分类号： G06F3/06 , G06F13/368
CPC分类号： G06F3/0626 , G06F3/0656 , G06F3/0689
摘要： A memory control device having a plurality of data transfer paths including a storage device group comprising a plurality of storage devices for storing data and a buffer memory group comprising multiple buffer memories for storing transferred data, dividing files into multiple blocks for storing blocks in multiple storage devices on different data transfer paths, and executing control to read data from the storage device to be output with a request from a connected terminal to the buffer memory wherein storage devices on different paths create multiple virtual storage device groups, and buffer memories create virtual buffer memory groups. The memory control device comprises a data output control for executing control in a first cycle, the data being temporarily dividedly stored in a prescribed virtual storage device group. In a second cycle the device outputs data stored in the virtual buffer memory group and by alternately repeating first and second cycles, data read from the plural virtual buffer memories group is switched.
摘要翻译：一种具有多个数据传输路径的存储器控制装置，包括包括用于存储数据的多个存储装置的存储装置组和包括用于存储传送数据的多个缓冲存储器的缓冲存储器组，将文件划分成用于存储多个存储块的多个块设备在不同的数据传输路径上，并且执行控制以从存储设备读取数据，以便从连接的终端到缓冲存储器的请求输出，其中不同路径上的存储设备创建多个虚拟存储设备组，并且缓冲存储器创建虚拟缓冲器记忆组。存储器控制装置包括用于在第一周期中执行控制的数据输出控制，数据被暂时地分割存储在规定的虚拟存储装置组中。在第二周期中，设备输出存储在虚拟缓冲存储器组中的数据，并且通过交替重复第一和第二周期，切换从多个虚拟缓冲存储器组读取的数据。

4. 发明授权

US06307858B1 ATM cell transmission system 有权
标题翻译： ATM信元传输系统
公开(公告)号：US06307858B1
公开(公告)日：2001-10-23
申请号：US09209697
申请日：1998-12-11
申请人： Nobuyuki Mizukoshi , Hideo Ishida , Noboru Sato
发明人： Nobuyuki Mizukoshi , Hideo Ishida , Noboru Sato
IPC分类号： H04L1228
CPC分类号： H04Q11/0478 , H04L2012/5616 , H04L2012/5672 , H04L2012/5681
摘要： In an ATM cell transmission system having an ATM layer device (1), a data path interface (3) and a plurality of normal PHY (Physical) layer devices (2-0 to 2-M) according to Utopia Level 2 specification, the ATM layer device (1) comprises: a cell buffer (4); FIFO memories (5-0 to 5-M) each corresponding to each of the normal PHY layer devices (2-0 to 2-M); an output controller (5′) for controlling the cell buffer (4) to output an ATM cell to be transmitted through one of the normal PHY layer devices (2-0 to 2-M) into corresponding one of the FIFO memories (5-0 to 5-M) on condition that the ATM cell is stored in the cell buffer (4) and the corresponding one of the FIFO memories (5-0 to 5-M) is not full; and a cell transmission controller (10) for performing polling of the normal PHY layer devices (2-0 to 2-M), designating a selected PHY layer device among the normal PHY layer devices (2-0 to 2-M) which have returned the HIGH level of the cell transmission allowance signal (TxClav) to the polling and whereof corresponding FIFO memories (5-0 to 5-M) are not empty, selecting one of the FIFO memories (5-0 to 5-M) corresponding to the selected PHY layer device as a next sender of cell data to be transmitted through the data path interface (3), and designating the selected PHY layer device at an end of the current transmission cycle as a next receiver of the cell data.
摘要翻译：在具有根据乌托邦二级规范的ATM层设备（1），数据路径接口（3）和多个正常PHY（物理）层设备（2-0至2-M）的ATM信元传输系统中， ATM层设备（1）包括：单元缓冲器（4）; 每个对应于每个正常PHY层设备（2-0至2-M）的FIFO存储器（5-0至5-M）; 输出控制器（5'），用于控制单元缓冲器（4）输出要通过其中一个正常PHY层设备（2-0至2-M）传输的ATM信元到相应的一个FIFO存储器（5- 0至5-M），条件是ATM信元存储在信元缓冲器（4）中，并且相应的一个FIFO存储器（5-0至5-M）未满; 以及用于执行普通PHY层设备（2-0至2-M）的轮询的小区传输控制器（10），指定具有将小区传输允许信号（TxClav）的高电平返回到轮询，并且对应的FIFO存储器（5-0至5-M）不为空，选择对应的FIFO存储器（5-0至5-M）中的一个到所选择的PHY层设备作为要通过数据路径接口（3）发送的小区数据的下一发送者，并且在当前传输周期结束时指定所选择的PHY层设备作为小区数据的下一个接收者。

5. 发明授权

US5355071A Power source apparatus for vehicles 失效
标题翻译：车辆电源设备
公开(公告)号：US5355071A
公开(公告)日：1994-10-11
申请号：US871230
申请日：1992-04-20
申请人： Hideo Ishida , Toshitaka Tanahashi , Keiichiro Banzai
发明人： Hideo Ishida , Toshitaka Tanahashi , Keiichiro Banzai
IPC分类号： H02J7/14 , H02J7/16
CPC分类号： H02J7/1423
摘要： A power source apparatus for vehicles comprises first and second switch means respectively for controlling charging currents flowing from a rectifier of a generator to first and second batteries having equal open terminal voltages, and third switch means for controlling a current flowing through a field winding of the generator. The third switch means is controlled to be turned on/off in response to whichever of the voltages generated respectively by the first and second batteries is lower. The first and second switch means are controlled to be turned on/off on the basis of a duty factor set based on a voltage difference between the first and second batteries. When the voltage of the first battery becomes equal to or less than a predetermined voltage, that voltage being the lowest voltage that a starter motor needs to satisfactorily start an engine, the duty factor of the first switch means is made larger to charge the first battery with priority irrespective of whether the voltage of the first battery is larger than the voltage of the second battery or not.
摘要翻译：一种用于车辆的电源设备包括分别用于控制从发电机的整流器流向具有相等的开路端电压的第一和第二电池的充电电流的第一和第二开关装置，以及用于控制流过所述发电机的励磁绕组的电流的第三开关装置发电机。第三开关装置被控制为响应于分别由第一和第二电池产生的电压中的任一个较低而导通/截止。第一和第二开关装置根据基于第一和第二电池之间的电压差设定的占空比被控制为接通/断开。当第一电池的电压变得等于或小于预定电压时，作为起动电动机需要令人满意地启动发动机的最低电压的电压，使得第一开关装置的占空因数更大以对第一电池充电无论第一电池的电压是否大于第二电池的电压，均优先。

6. 发明授权

US4736986A Seat recliner assembly 失效
标题翻译：座椅斜倚器总成
公开(公告)号：US4736986A
公开(公告)日：1988-04-12
申请号：US915849
申请日：1986-10-06
申请人： Yukio Kato , Kazuo Horiuchi , Hideo Ishida
发明人： Yukio Kato , Kazuo Horiuchi , Hideo Ishida
IPC分类号： B60N2/235 , B60N1/06
CPC分类号： B60N2/2352
摘要： A cam plate is pivotably installed to the base plate by means of the pin, the base plate being to be secured to the lateral side of the seat cushion. The base plate has the toothed member pivotable installed thereon, and the toothed member has formed at the free end thereof a cam striker, concavity formed directed from the cam striker toward the base thereof and a projecting release hook contiguous to the end of the concavity. There is also formed on the cam plate a lock cam which supports the cam striker and also slides into the concavity, and a cut is formed in a portion adjoining the toothed member of the lock cam. There is installed to the toothed member a reverse spring which normally forces the lower teeth in such a direction as to engage the upper teeth. When the cam plate is pivoted in one direction, the opposite walls of the cut depresses the release hook. These walls will retain the release hook when the cam plate pivots in the opposite direction.
摘要翻译：凸轮板通过销可枢转地安装到基板上，基板被固定到座垫的侧面。底板具有可枢转地安装在其上的齿形构件，并且齿形构件在其自由端处形成有凸轮冲头，凸轮冲头从凸轮冲头朝向其底部形成并且与凹部的端部相邻的突出释放钩。还在凸轮板上形成一个锁定凸轮，该锁定凸轮支撑凸轮冲头并且还滑入凹部，并且在与锁定凸轮的齿形构件相邻的部分中形成切口。在齿形构件上安装有反向弹簧，该反向弹簧通常沿着与上齿接合的方向迫使下齿。当凸轮板在一个方向上枢转时，切口的相对壁压下释放钩。当凸轮板沿相反方向枢转时，这些壁将保持释放钩。

7. 发明授权

US4388215A Wood preservative composition 失效
标题翻译：木材防腐剂组成
公开(公告)号：US4388215A
公开(公告)日：1983-06-14
申请号：US328503
申请日：1981-12-08
申请人： Hideo Ishida , Masashi Kitada , Keisaku Ihara
发明人： Hideo Ishida , Masashi Kitada , Keisaku Ihara
IPC分类号： A01N43/78 , B27K3/50 , B27K3/40 , C09K15/14
CPC分类号： A01N43/78 , B27K3/343 , B27K3/38 , B27K3/40 , B27K3/50 , Y10S428/907 , Y10T428/662
摘要： A wood preservative composition comprising 2-mercaptobenzothiazole or its salt and 2,5-dichloro-4-bromophenol or its salt exerts an unexpected synergistic wood preservative effect against wood destroying fungi and termites.
摘要翻译：包含2-巯基苯并噻唑或其盐和2,5-二氯-4-溴苯酚或其盐的木材防腐剂组合物对木材破坏真菌和白蚁产生意想不到的协同木材防腐效果。

8. 发明授权

US07165307B2 Method and machine for forming protective film on sprayed coating of large-sized product 失效
标题翻译：用于在大尺寸产品的喷涂上形成保护膜的方法和机器
公开(公告)号：US07165307B2
公开(公告)日：2007-01-23
申请号：US08627270
申请日：1996-04-04
申请人： Hideaki Tojo , Hideo Ishida , Hisashi Kurota , Takao Arasawa , Nobuyuki Okita
发明人： Hideaki Tojo , Hideo Ishida , Hisashi Kurota , Takao Arasawa , Nobuyuki Okita
IPC分类号： B23P25/00
CPC分类号： B05D5/00 , B05D1/32 , B05D1/325 , B05D3/0209 , B05D3/0254 , Y10T29/49812 , Y10T29/49885
摘要： There are disclosed a method and apparatus for applying a strippable paint to a large-sized product finished with a sprayed coating, such as an automobile, to form a protective film on the surface of the coating. The product is conventionally kept in stock for a period of time before it is shipped. Contaminations such as dust are washed away from the surface of the product. Then, the strippable paint is applied, preliminarily dried, and non-preliminarily dried to form the protective film out of the strippable paint on the surface of the coating. This protective film is formed easily, appropriately, and reliably. The obtained protective film has a uniform and sufficient thickness. Even if the surface contains unapplied regions to which the paint should not be applied, the paint can be applied to the whole surface of the coating while avoiding the unapplied regions according to the invention. The application can be performed easily and reliably without leaving unapplied portions around the unapplied regions.
摘要翻译：公开了一种将可剥离涂料施加到用喷涂涂层如汽车完成的大型产品上以在涂层的表面上形成保护膜的方法和装置。产品通常在发货前保存一段时间。诸如灰尘的污染物从产品的表面洗掉。然后，将可剥离涂料进行预干燥，并进行非预先干燥，从涂膜表面的可剥离涂料中形成保护膜。该保护膜容易，适当且可靠地形成。所获得的保护膜具有均匀且足够的厚度。即使表面含有不应用涂料的未涂覆区域，也可以将涂料施加到涂层的整个表面，同时避免根据本发明的未涂覆区域。可以容易且可靠地执行应用，而不会在未应用的区域周围留下未应用的部分。

9. 发明授权

US5553257A Address generating circuit of a two-dimensional coding table 失效
标题翻译：地址生成电路二维编码表
公开(公告)号：US5553257A
公开(公告)日：1996-09-03
申请号：US189680
申请日：1994-02-01
申请人： Hideo Ishida , Yasushi Ooi
发明人： Hideo Ishida , Yasushi Ooi
IPC分类号： H03M7/42 , H04N7/26 , H04N7/30 , G06F12/00
CPC分类号： H03M7/42 , H04N19/13 , H04N19/60 , H04N19/91
摘要： An address generating circuit having a two-dimensional coding table which has respective coded words corresponding to a combination of x and y where the value of event A is determined as x and the value of event B as y (x and y are positive integers) between two events A and B, and stores the coded words in an address corresponding to each combination of x and y; coincidence detectors which input the values x and y of the events A and B and detect whether these values coincide with the integer of 1 to S (S is the maximum number among the integers satisfying S+log.sub.2 S
摘要翻译：具有二维编码表的地址生成电路，其具有对应于事件A的值被确定为x的事件A的值和事件B的值对应于x和y的组合的各个编码字，y（x和y是正整数）在两个事件A和B之间，并且将编码的字存储在与x和y的每个组合相对应的地址中; 输入事件A和B的值x和y并检测这些值是否与1到S的整数一致的符合检测器（S是满足S + log2S

10. 发明授权

US5455908A Address formation circuit and method for continuously performing an address-based memory access into a rectangular area 失效
标题翻译：地址形成电路和方法，用于连续执行基于地址的存储器访问到矩形区域
公开(公告)号：US5455908A
公开(公告)日：1995-10-03
申请号：US83474
申请日：1993-06-30
申请人： Hideo Ishida
发明人： Hideo Ishida
IPC分类号： G06F12/00 , G06F9/345 , G06T1/60 , G06T9/00 , H04N7/26 , H04N7/30 , H04N7/50 , G06F12/06
CPC分类号： G06F9/345 , H04N19/433 , H04N19/51 , H04N19/61 , H04N19/98
摘要： In an address formation circuit for an image processing, an address formation is separately processed in parallel like a pipeline by first and second address calculation means. The first address calculation means controllable by a program calculates a head address of a macroblock, and the second address calculation means calculates addresses of pixels within the macroblock on the basis of the head address calculated by the first address calculation means. An instruction memory stores the program and a data memory and a data file memory store address moving amounts required the calculations. A sequence controller controls an exclusive hardware. Hence, a high speed memory access like a real time image processing in the address formation can be possible and, when a complicated address pattern is required, an overhead of the address formation time in the instruction processing can be prevented.
摘要翻译：在用于图像处理的地址形成电路中，通过第一和第二地址计算装置，像流水线一样并行处理地址形成。由程序控制的第一地址计算装置计算宏块的头地址，第二地址计算装置基于由第一地址计算装置计算的头地址来计算宏块内的像素的地址。指令存储器存储程序和数据存储器以及数据文件存储器存储地址移动量所需的计算。序列控制器控制专用硬件。因此，像地址形成中的实时图像处理那样的高速存储器访问是可能的，并且当需要复杂的地址模式时，可以防止指令处理中的地址形成时间的开销。

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