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    • 2. 发明授权
    • Electronic part having communication means
    • 电子部件具有通讯装置
    • US5978203A
    • 1999-11-02
    • US831966
    • 1997-04-02
    • Yoshihiro KiyomuraHiroshi OishiKatsutoshi NakamatsuMitsuhiro Yamamoto
    • Yoshihiro KiyomuraHiroshi OishiKatsutoshi NakamatsuMitsuhiro Yamamoto
    • H01G4/224H01G9/12H01G4/00H01G2/12
    • H01G4/224H01G9/12
    • An electronic part such as a ceramic capacitor and a resistor used in various kinds of electric appliances has an apprehension that an electronic part element might be red-heated to be burnt when an abnormal current flows in spite of dielectric covering member, and therefore it has been impossible to supply a nonflammable electronic part having a stabilized performance. In the present invention, an electronic part is constructed such that since an electronic part element 8 such as a condenser or a resistor is put in a case 5 which in turn is nearly sealed to cut off the supply of oxygen, the electronic part is prevented from catching fire even if it generates heat, and since an opening 6 is formed in a portion of the case 5 or a sealing member 7 so as to allow the gas to be let out, when the electronic part generates heat to increase the pressure, the case 5 can be prevented from being ruptured. Accordingly, it is possible to provide a nonflammable electronic part having stabilized characteristics.
    • 担心在各种电器中使用的诸如陶瓷电容器和电阻器的电子部件担心尽管电介质覆盖部件异常电流流动时电子部件可能被红色加热而被烧焦,因此它具有 不可能提供具有稳定性能的不可燃电子部件。 在本发明中,电子部件被构造为使得诸如电容器或电阻器的电子部件元件8被放入壳体5中,壳体5又被几乎密封以切断供氧,所以防止了电子部件 即使产生热量也能够起火,并且由于在壳体5的一部分或密封部件7中形成开口6以允许气体被排出,所以当电子部件产生热量以增加压力时, 可以防止壳体5破裂。 因此,可以提供具有稳定特性的不可燃电子部件。
    • 4. 发明授权
    • Inspection substrate for display device
    • 显示装置用检查基板
    • US07391053B2
    • 2008-06-24
    • US11121982
    • 2005-05-05
    • Tetsuya IizukaMitsuhiro YamamotoHiroshi Tabatake
    • Tetsuya IizukaMitsuhiro YamamotoHiroshi Tabatake
    • H01L29/04H01L29/15
    • H01L27/0203H01L22/34H01L27/12H01L2924/0002H01L2924/00
    • In order to make it possible to easily detect an electrical defect by using an array tester, the present inspection substrate includes: plural scan lines and plural signal lines; plural storage capacitor lines arranged in parallel to the scan lines; storage capacitor elements, each of which uses a part of the storage capacitor line as one of electrodes thereof; storage capacitor upper electrodes formed of the same layer as that for the signal lines and electrically connected to the storage capacitor elements; switching elements arranged on intersection points of the signal lines and the scan lines and electrically connected to the storage capacitor elements; and dummy wiring lines formed by use of at least one of two types of metals constituting electrodes of the switching elements, and electrically connected to any of the scan lines, the signal lines, the storage capacitor lines and the storage capacitor upper electrodes.
    • 为了能够通过使用阵列测试仪容易地检测电气缺陷,本检查基板包括:多条扫描线和多条信号线; 与扫描线并联布置的多个保持电容配线; 存储电容器元件,其各自使用一部分存储电容线作为其电极之一; 存储电容器上电极由与信号线相同的层形成并电连接到存储电容器元件; 布置在信号线和扫描线的交点上并电连接到存储电容器元件的开关元件; 以及通过使用构成开关元件的电极的两种金属中的至少一种形成的虚拟布线,并且电连接到扫描线,信号线,辅助电容线和存储电容器上电极。
    • 5. 发明申请
    • Substrate inspecting method
    • 基板检查方法
    • US20060103416A1
    • 2006-05-18
    • US11294549
    • 2005-12-06
    • Masaki MiyatakeMitsuhiro Yamamoto
    • Masaki MiyatakeMitsuhiro Yamamoto
    • G01R31/00
    • G09G3/006G01N23/2251G02F1/1309G02F2001/136254
    • A method of inspecting a substrate comprising forming the common terminal that is connected to a part of wirings formed in the first array region and a part of wirings formed in the second array region on the substrate, supplying an electric signal from the common terminal to both of the part of the wirings formed in the first array region and the part of the wirings formed in the second array region, thereby charging the pixel electrodes in the first and second array regions, and irradiating an electron beam to the charged pixel electrodes, and inspecting whether or not the pixel electrodes properly hold the electrical charge based on a data of a secondary electron emitted from the pixel electrodes.
    • 一种检查基板的方法,包括形成连接到形成在第一阵列区域中的布线的一部分的公共端子和形成在基板上的第二阵列区域中的布线的一部分,从公共端子向两者提供电信号 形成在第一阵列区域中的布线部分和形成在第二阵列区域中的布线部分,从而对第一和第二阵列区域中的像素电极充电,并向电荷像素电极照射电子束,以及 基于从像素电极发射的二次电子的数据,检查像素电极是否适当地保持电荷。
    • 6. 发明申请
    • Inspection substrate for display device
    • 显示装置用检查基板
    • US20050263810A1
    • 2005-12-01
    • US11121982
    • 2005-05-05
    • Tetsuya IizukaMitsuhiro YamamotoHiroshi Tabatake
    • Tetsuya IizukaMitsuhiro YamamotoHiroshi Tabatake
    • H01L23/544H01L27/02H01L27/108H01L27/12
    • H01L27/0203H01L22/34H01L27/12H01L2924/0002H01L2924/00
    • In order to make it possible to easily detect an electrical defect by using an array tester, the present inspection substrate includes: plural scan lines and plural signal lines; plural storage capacitor lines arranged in parallel to the scan lines; storage capacitor elements, each of which uses a part of the storage capacitor line as one of electrodes thereof; storage capacitor upper electrodes formed of the same layer as that for the signal lines and electrically connected to the storage capacitor elements; switching elements arranged on intersection points of the signal lines and the scan lines and electrically connected to the storage capacitor elements; and dummy wiring lines formed by use of at least one of two types of metals constituting electrodes of the switching elements, and electrically connected to any of the scan lines, the signal lines, the storage capacitor lines and the storage capacitor upper electrodes.
    • 为了能够通过使用阵列测试仪容易地检测电气缺陷,本检查基板包括:多条扫描线和多条信号线; 与扫描线并联布置的多个保持电容配线; 存储电容器元件,其各自使用一部分存储电容线作为其电极之一; 存储电容器上电极由与信号线相同的层形成并电连接到存储电容器元件; 布置在信号线和扫描线的交点上并电连接到存储电容器元件的开关元件; 以及通过使用构成开关元件的电极的两种金属中的至少一种形成的虚拟布线,并且电连接到扫描线,信号线,辅助电容线和存储电容器上电极。
    • 9. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US07902856B2
    • 2011-03-08
    • US12656667
    • 2010-02-12
    • Mitsuhiro Yamamoto
    • Mitsuhiro Yamamoto
    • H03K19/003G01R31/28
    • G01R31/31858G01R31/31725
    • An exemplary aspect of the invention is to conduct delay tests under actual operating conditions for a semiconductor integrated circuit including multiple logic circuits operating based on clocks of different frequencies, without causing any inconveniences when a test clock is set to a high-frequency side or a low-frequency side. The semiconductor integrated circuit includes: a first logic block that operates based on a first clock; a second logic block that operates based on a second clock having a frequency different from that of the first clock; and a test circuit connected between the first logic block and the second logic block. The test circuit outputs an output of the first logic block set as a test target, without passing through the second logic block, and transmits an input value received without being passed through the first logic circuit, to the second logic circuit set as a test target.
    • 本发明的示例性方面是在实际操作条件下进行包括基于不同频率的时钟操作的多个逻辑电路的半导体集成电路的延迟测试,而不会在将测试时钟设置为高频侧或 低频侧。 半导体集成电路包括:基于第一时钟操作的第一逻辑块; 基于具有与第一时钟的频率不同的频率的第二时钟来操作的第二逻辑块; 以及连接在第一逻辑块和第二逻辑块之间的测试电路。 测试电路输出作为测试目标的第一逻辑块的输出,而不通过第二逻辑块,并将接收的输入值传送到不经第一逻辑电路的第二逻辑电路,作为测试目标 。