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1. 发明申请

US20060162956A1 Connection substrate, multi-layer wiring board using the connection substrate, substrate for semiconductor package, and methods for manufacturing them 审中-公开
标题翻译：连接基板，使用连接基板的多层布线板，半导体封装用基板及其制造方法
公开(公告)号：US20060162956A1
公开(公告)日：2006-07-27
申请号：US10500119
申请日：2002-12-24
申请人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsduya Enomoto , Norio Moriike , Kousuke Hiroki
发明人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsduya Enomoto , Norio Moriike , Kousuke Hiroki
IPC分类号： H05K1/03 , H05K1/09 , H05K1/11
CPC分类号： H05K3/4617 , H01L21/4857 , H01L21/486 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H05K3/0097 , H05K3/06 , H05K3/244 , H05K3/4038 , H05K3/4623 , H05K3/4632 , H05K3/4647 , H05K2201/0141 , H05K2201/0195 , H05K2201/0355 , H05K2201/0361 , H05K2201/096 , H05K2201/10378 , H05K2203/0152 , H05K2203/0156 , H05K2203/0384 , H05K2203/0733 , H05K2203/1536 , Y10T29/49126 , Y10T29/4913 , Y10T29/49147 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The present invention provides a connection board that is formed by an insulating resin composition layer made of one layer or two or more layers and a connection conductor that is formed so as to pass through the insulating resin composition layer in its thickness direction at a position where a conductor circuit is connected, and a multi-layer wiring board, a substrate for semiconductor package and a semiconductor package using the connection board, and methods for manufacturing them.
摘要翻译：本发明提供一种由一层或两层以上的绝缘树脂组合物层形成的连接板，以及形成为在其绝缘树脂组合物层的厚度方向上形成的连接导体，连接导体电路，并且使用多层布线板，半导体封装用基板和使用该连接基板的半导体封装，以及其制造方法。

2. 发明授权

US08028402B2 Connection board, and multi-layer wiring board, substrate for semiconductor package and semiconductor package using connection board, and manufacturing method thereof 有权
标题翻译：连接板和多层布线板，半导体封装用基板和使用连接板的半导体封装及其制造方法
公开(公告)号：US08028402B2
公开(公告)日：2011-10-04
申请号：US11775294
申请日：2007-07-10
申请人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
发明人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
IPC分类号： H05K3/36 , H01R9/00 , H01K3/10
CPC分类号： H05K3/4617 , H01L21/4857 , H01L21/486 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H05K3/0097 , H05K3/06 , H05K3/244 , H05K3/4038 , H05K3/4623 , H05K3/4632 , H05K3/4647 , H05K2201/0141 , H05K2201/0195 , H05K2201/0355 , H05K2201/0361 , H05K2201/096 , H05K2201/10378 , H05K2203/0152 , H05K2203/0156 , H05K2203/0384 , H05K2203/0733 , H05K2203/1536 , Y10T29/49126 , Y10T29/4913 , Y10T29/49147 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Disclosed is a manufacturing method of a multi-layer wiring board, which method includes: preparing connection boards, the connection boards having respectively an insulating resin composition layer, a connection conductor formed so as to pass through the insulating resin composition layer and a conductor circuit formed on the insulating resin composition layer and connected to the connection conductor; aligning the connection boards; and laminating the aligned connection boards by heating and pressing, so that the connection conductors, or the connection conductor and the conductor circuit, are conductively connected with each other, and the connection boards are mechanically connected with each other by the insulating resin composition layer. The connection boards are formed by specified processing, including use of a three-layer composite metallic layer.
摘要翻译：公开了一种多层布线板的制造方法，该方法包括：准备连接板，连接板分别具有绝缘树脂组合物层，形成为穿过绝缘树脂组合物层的连接导体和导体电路形成在绝缘树脂组合物层上并连接到连接导体; 对准连接板; 并且通过加热和压制层叠对准的连接板，使得连接导体或连接导体和导体电路彼此导电连接，并且连接板通过绝缘树脂组合物层彼此机械连接。连接板通过特定的加工形成，包括使用三层复合金属层。

3. 发明申请

US20080289868A1 CONNECTION BOARD, AND MULTI-LAYER WIRING BOARD, SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE USING CONNECTION BOARD, AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20080289868A1
公开(公告)日：2008-11-27
申请号：US12182908
申请日：2008-07-30
申请人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
发明人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
IPC分类号： H05K1/11 , H05K1/16
CPC分类号： H05K3/4617 , H01L21/4857 , H01L21/486 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H05K3/0097 , H05K3/06 , H05K3/244 , H05K3/4038 , H05K3/4623 , H05K3/4632 , H05K3/4647 , H05K2201/0141 , H05K2201/0195 , H05K2201/0355 , H05K2201/0361 , H05K2201/096 , H05K2201/10378 , H05K2203/0152 , H05K2203/0156 , H05K2203/0384 , H05K2203/0733 , H05K2203/1536 , Y10T29/49126 , Y10T29/4913 , Y10T29/49147 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The present invention provides a connection board that is formed by an insulating resin composition layer made of one layer or two or more layers and a connection conductor that is formed so as to pass through the insulating resin composition layer in its thickness direction at a position where a conductor circuit is connected, and a multi-layer wiring board, a substrate for semiconductor package and a semiconductor package using the connection board, and methods for manufacturing them.

4. 发明申请

US20090008141A1 Connection board, and multi-layer wiring board, substrate for semiconductor package and semiconductor package using connection board, and manufacturing method thereof 审中-公开
标题翻译：连接板和多层布线板，半导体封装用基板和使用连接板的半导体封装及其制造方法
公开(公告)号：US20090008141A1
公开(公告)日：2009-01-08
申请号：US12230564
申请日：2008-09-02
申请人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
发明人： Hidehiro Nakamura , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
IPC分类号： H05K1/11 , H05K1/16
CPC分类号： H05K3/4617 , H01L21/4857 , H01L21/486 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H05K3/0097 , H05K3/06 , H05K3/244 , H05K3/4038 , H05K3/4623 , H05K3/4632 , H05K3/4647 , H05K2201/0141 , H05K2201/0195 , H05K2201/0355 , H05K2201/0361 , H05K2201/096 , H05K2201/10378 , H05K2203/0152 , H05K2203/0156 , H05K2203/0384 , H05K2203/0733 , H05K2203/1536 , Y10T29/49126 , Y10T29/4913 , Y10T29/49147 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The present invention provides a connection board that is formed by an insulating resin composition layer made of one layer or two or more layers and a connection conductor that is formed so as to pass through the insulating resin composition layer in its thickness direction at a position where a conductor circuit is connected, and a multi-layer wiring board, a substrate for semiconductor package and a semiconductor package using the connection board, and methods for manufacturing them.
摘要翻译：本发明提供一种由一层或两层以上的绝缘树脂组合物层形成的连接板，以及形成为在其绝缘树脂组合物层的厚度方向上形成的连接导体，连接导体电路，并且使用多层布线板，半导体封装用基板和使用该连接基板的半导体封装，以及其制造方法。

5. 发明授权

US06236108B1 Substrate for holding a chip of semi-conductor package, semi-conductor package, and fabrication process of semi-conductor package 失效
标题翻译：用于保持半导体封装芯片，半导体封装和半导体封装的制造工艺的衬底
公开(公告)号：US06236108B1
公开(公告)日：2001-05-22
申请号：US09541041
申请日：2000-03-31
申请人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
发明人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
IPC分类号： H01L23495
CPC分类号： H01L23/4985 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/83192 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07802 , H01L2924/12042 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2224/83 , H01L2224/85 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/05599
摘要： A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.
摘要翻译：本发明的半导体封装芯片支撑基板包括绝缘支撑基板，设置在基板上的布线和设置在布线上的绝缘膜。布线各自具有i）连接到半导体芯片电极的内部连接，以及ii）半导体芯片安装区域。在绝缘支撑基板的一部分上还设置有开口，其中每个布线形成在绝缘支撑基板上，绝缘支撑基板是设置有内部连接的外部连接的部分。绝缘膜形成在安装有半导体芯片的部分，覆盖布线的半导体芯片安装区域。

6. 发明授权

US6064111A Substrate for holding a chip of semi-conductor package, semi-conductor package, and fabrication process of semi-conductor package 失效
标题翻译：用于保持半导体封装芯片，半导体封装和半导体封装的制造工艺的衬底
公开(公告)号：US6064111A
公开(公告)日：2000-05-16
申请号：US903996
申请日：1997-07-31
申请人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
发明人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
IPC分类号： H01L23/02 , H01L23/498 , H01L23/495 , H01L21/44
CPC分类号： H01L23/4985 , H01L24/97 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/83192 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07802 , H01L2924/12042 , H01L2924/15183 , H01L2924/15311 , H01L2924/181
摘要： A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting a substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.
摘要翻译：本发明的半导体封装芯片支撑基板包括绝缘支撑基板，设置在基板上的布线和设置在布线上的绝缘膜。布线各自具有i）连接到半导体芯片电极的内部连接，以及ii）半导体芯片安装区域。在绝缘支撑基板上的绝缘性支撑基板上形成有各自的配线的绝缘物的绝缘体上设置开口部，绝缘性支撑基板是设置有内部连接部的外部连接部的部分。绝缘膜形成在安装有半导体芯片的部分，覆盖布线的半导体芯片安装区域。

7. 发明申请

US20100253361A1 SENSOR, SENSOR SYSTEM, PORTABLE SENSOR SYSTEM, METHOD OF ANALYZING METAL IONS, MOUNTING SUBSTRATE, METHOD OF ANALYZING PLATING PREVENTING CHEMICAL SPECIES, METHOD OF ANALYZING PRODUCED COMPOUND, AND METHOD OF ANALYZING MONOVALENT COPPER CHEMICAL SPECIES 有权
标题翻译：传感器，传感器系统，便携式传感器系统，分析金属离子的方法，安装基板，分析预防化学物质的方法，分析生产的化合物的方法和分析单价铜化合物的方法
公开(公告)号：US20100253361A1
公开(公告)日：2010-10-07
申请号：US12680447
申请日：2008-09-26
申请人： Hidehiro Nakamura , Tooru Nakamura , Yutaka Hayashi , Yuji Kawanishi
发明人： Hidehiro Nakamura , Tooru Nakamura , Yutaka Hayashi , Yuji Kawanishi
IPC分类号： G01N27/62
CPC分类号： G01N27/423 , G01N27/42
摘要： This invention provides a sensor having such a structure that the area in which a sensor electrode comes into contact with a liquid, a mist or a gas containing an analyte has been previously specified. The sensor comprises at least an electroconductive first electrode, an electroconductive second electrode, electroconductive first and second wirings connected to the first and second electrodes, and an insulating part for insulating the first and second wirings from each other and from a liquid, a mist or a gas containing the analyte. The insulating part is formed of an organic material. In the first and second electrodes, at least the surface, which comes into contact with a liquid, a mist or a gas containing the analyte, is formed of a material which is insoluble in a liquid or a mist containing the analyte, or is not attacked by a gas containing the analyte.
摘要翻译：本发明提供了一种传感器，其具有以下结构：传感器电极与液体，雾或包含分析物的气体接触的区域已被预先规定。传感器包括至少导电的第一电极，导电的第二电极，连接到第一和第二电极的导电的第一和第二布线，以及绝缘部分，用于将第一和第二布线彼此隔离，并与液体，雾或含有分析物的气体。绝缘部分由有机材料形成。在第一和第二电极中，至少与液体接触的表面，雾或含有分析物的气体由不溶于液体或含有分析物的雾的材料形成，或不是被含有分析物的气体攻击。

8. 发明授权

US07704799B2 Method of manufacturing wiring substrate 失效
标题翻译：制造布线基板的方法
公开(公告)号：US07704799B2
公开(公告)日：2010-04-27
申请号：US11683714
申请日：2007-03-08
申请人： Hidehiro Nakamura , Tetsuya Enomoto , Toshio Yamazaki , Hiroshi Kawazoe
发明人： Hidehiro Nakamura , Tetsuya Enomoto , Toshio Yamazaki , Hiroshi Kawazoe
IPC分类号： H01L21/50
CPC分类号： H01L21/568 , H01L21/4846 , H01L21/486 , H01L21/6835 , H01L23/3121 , H01L23/498 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L24/48 , H01L25/0657 , H01L2224/05599 , H01L2224/16225 , H01L2224/16238 , H01L2224/32225 , H01L2224/48091 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/06572 , H01L2924/00014 , H01L2924/01019 , H01L2924/01057 , H01L2924/01067 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/07802 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H05K3/4007 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A wiring substrate (1) comprises an insulating base (10) with connection holes (11), buried conductors (12) provided in the connection holes (11) without reaching a rear surface of the insulating base (10), and wiring layers 14 connected to the buried conductors (12). The buried conductors (12) thicken the wiring layers (14), and can form aligning parts (110) on the rear surface of the connection holes (11) to be used for three-dimensional mounting structure. Each wiring layer (14) includes thin terminals (14A), wirings (14B) and thick electrodes (14C). Not only the terminals (14A) and wirings (14B) but also the buried conductors (12) are raised by the same manufacturing process. A semiconductor element (2) is attached to the electrodes (14C) of the wiring substrate (1).
摘要翻译：布线基板（1）包括具有连接孔（11）的绝缘基座（10），设置在连接孔（11）中的埋入导体（12），而不到达绝缘基座（10）的后表面，并且布线层14 连接到埋地导体（12）。掩埋导体（12）使布线层（14）变厚，并且可以在用于三维安装结构的连接孔（11）的后表面上形成对准部分（110）。每个布线层（14）包括薄端子（14A），布线（14B）和厚电极（14C）。不仅端子（14A）和配线（14B）以及埋地导体（12）都通过相同的制造工艺升高。半导体元件（2）附着到布线基板（1）的电极（14C）上。

9. 发明授权

US5735042A Method of fabricating connector pin contact 失效
标题翻译：连接器针脚接触的制造方法
公开(公告)号：US5735042A
公开(公告)日：1998-04-07
申请号：US740282
申请日：1996-10-25
申请人： Yasunari Takano , Hidehiro Nakamura , Shin Yoshida , Akito Miura , Koichi Takahashi , Kazuki Satou
发明人： Yasunari Takano , Hidehiro Nakamura , Shin Yoshida , Akito Miura , Koichi Takahashi , Kazuki Satou
IPC分类号： H01R13/04 , H01R12/71 , H01R13/40 , H01R13/428 , H01R43/16 , H01R43/20
CPC分类号： H01R43/16 , H01R12/57 , H01R12/721 , H01R13/40 , Y10T29/49204 , Y10T29/49218 , Y10T29/49222
摘要： A pin contact of a connector and a method of fabricating the pin contact which enables a substantial decrease of manufacturing cost, and smooth installation of the pin connector without a change in the pitch of arrangement at the time of press-fitting into a pin housing. A flat metal sheet undergoes blanking and pressing to form a narrow piece including a strip portion of decreased area of a fracture. Then an approximately L-shaped connecting portion is bent at right angles to raise the narrow piece sideways. Thereafter the strip portion of the narrow piece is pressed along the direction of rising, to thereby form an approximately cylindrical contact section. A raised piece at the rear of the contact section is provided with a locking section which faces approximately at right angles with the direction of arrangement.
摘要翻译：连接器的销触点和制造销触头的方法，其能够显着降低制造成本，并且平滑地安装销连接器，而不会在压配合到销壳体中时布置的间距变化。平板金属板经受冲压和压制以形成包括断裂面积减小的带状部分的窄件。然后将大致L形的连接部弯曲成直角，使窄片横向升高。此后，窄片的条带部分沿着上升方向被按压，从而形成大致圆筒形的接触部分。在接触部分的后部处的凸起部件设置有与安排方向大致成直角的锁定部。

10. 发明申请

US20140213116A1 MEMORY CARD CONNECTOR 有权
标题翻译：内存卡连接器
公开(公告)号：US20140213116A1
公开(公告)日：2014-07-31
申请号：US14162143
申请日：2014-01-23
申请人： Kazuta Yoshida , Yoshifumi Okabe , Hidehiro Nakamura
发明人： Kazuta Yoshida , Yoshifumi Okabe , Hidehiro Nakamura
IPC分类号： H01R12/72
CPC分类号： H01R12/714 , G06K7/0021 , H01R25/006
摘要： A memory card connector includes first and second connectors including first and second housings having first and second storage sections, respectively, and first and second contacts which connect with terminals of first and second memory cards removably-inserted into the first and second storage sections, respectively. The first and second connectors are superposed on each other in a direction of thickness thereof. Each first contact includes a first tail which is mountable to a circuit board and positioned on an outer peripheral side of a first side surface of the first housing. The second housing includes a second side surface located at a different position from the first side surface as viewed in the thickness direction. Each second contact includes a second tail which is mountable to the circuit board and positioned on an outer peripheral side of the second side surface.
摘要翻译：存储卡连接器包括分别具有第一和第二存储部分的第一和第二壳体的第一和第二连接器，以及分别与可拆卸地插入到第一和第二存储部分中的第一和第二存储卡的端子连接的第一和第二触点。第一和第二连接器在其厚度方向上彼此叠置。每个第一触点包括可安装到电路板并位于第一壳体的第一侧表面的外周侧上的第一尾部。第二壳体包括位于距厚度方向观察时与第一侧面不同位置的第二侧面。每个第二触点包括可安装到电路板并位于第二侧表面的外周侧上的第二尾部。

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