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热词
    • 2. 发明授权
    • Latch for storing a data bit and a store incorporating said latch
    • 用于存储数据位的锁存器和包含所述锁存器的存储器
    • US4592023A
    • 1986-05-27
    • US623052
    • 1984-06-21
    • Herve BerangerArmand BruninJean-Paul Rousseau
    • Herve BerangerArmand BruninJean-Paul Rousseau
    • H04B14/04G11C11/411H03K3/288G11C7/00
    • H03K3/288G11C11/4113
    • A latch that can serve as a bit storage cell in a random-access store. The latch includes an AND gate (diodes D1 and D2) the input IN of which receives the bit to be stored and the other input of which is connected to a write control line WRL. When no write operation is being performed, transistor T1 is turned off and the state of transistor T2 is dependent on output potential OUT. To perform a write operation, line WRL is activated (goes high) and the state of transistor T3 will depend on the value of the bit applied to input IN. Read operations are performed by means of another AND gate (diodes D4 and D5) and an emitter follower (transistor T4) connected via a bit line BL to an output circuit 2. By adding input transistors and emitter followers to the latch, a multi-port storage can be realized, several rows of which can be simultaneously written into and/or read out.
    • 可以作为随机存取存储区中的位存储单元的锁存器。 锁存器包括与门(二极管D1和D2),其输入端IN接收待存储的位,其另一个输入端连接到写控制线WRL。 当不执行写入操作时,晶体管T1截止,晶体管T2的状态取决于输出电位OUT。 为了执行写操作,线WRL被激活(变高),晶体管T3的状态将取决于施加到输入IN的位的值。 通过另一个与门(二极管D4和D5)和经由位线BL连接到输出电路2的射极跟随器(晶体管T4)执行读取操作。通过将输入晶体管和发射极跟随器添加到锁存器, 可以实现端口存储,其中几行可以被同时写入和/或读出。