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1. 发明授权

US06466147B1 Method and apparatus for randomized dynamic element matching DAC 失效
标题翻译：随机动态元件匹配DAC的方法和装置
公开(公告)号：US06466147B1
公开(公告)日：2002-10-15
申请号：US09427195
申请日：1999-10-25
申请人： Henrik T. Jensen , Joseph F. Jensen
发明人： Henrik T. Jensen , Joseph F. Jensen
IPC分类号： H03M166
CPC分类号： H03M1/0673 , H03M1/74
摘要： A method and apparatus for digital-to-analog conversion utilizing randomized dynamic element matching for the attenuation of harmonic distortion during the conversion process due to non-ideal circuit behavior is presented. The present invention introduces a new DEM approach that results in a simplified DAC architecture relative to previous DACs, while preserving optimal spurious-free dynamic range (SFDR). The particular topology utilized involves the use of a bank of DAC-elements, preferably 1-bit DAC elements, the outputs of which are summed to yield a single multiple-level DAC. During each conversion cycle, random selection is used to determine the addresses of the DAC-elements used in order to “scramble” the DAC noise arising from each individual 1-bit DAC.
摘要翻译：提出了一种使用随机动态元件匹配的数模转换方法和装置，用于由于非理想电路特性而导致的转换过程中的谐波失真衰减。本发明引入了一种新的DEM方法，其相对于先前的DAC产生简化的DAC架构，同时保持了最佳的无杂散动态范围（SFDR）。所使用的特定拓扑包括使用一组DAC元件，优选地是1位DAC元件，其输出相加以产生单个多电平DAC。在每个转换周期期间，随机选择用于确定所使用的DAC元件的地址，以便“扰乱”每个单独1位DAC产生的DAC噪声。

2. 发明授权

US08073044B2 Polar transmitter with digital and analog filtering of envelope 失效
标题翻译：极地发射器具有数字和模拟滤波的信封
公开(公告)号：US08073044B2
公开(公告)日：2011-12-06
申请号：US11968221
申请日：2008-01-02
申请人： Alireza Zolfaghari , Hooman Darabi , Henrik T. Jensen
发明人： Alireza Zolfaghari , Hooman Darabi , Henrik T. Jensen
IPC分类号： H03H7/30 , H04L7/12 , H04L25/03
CPC分类号： H04L27/361 , H03F1/3241 , H04B1/0483 , H04B2001/0425 , H04L25/03343
摘要： A calibration circuit measures the variation in a filter resistor within the analog domain of the envelope path of a polar transmitter and produces a digital value representative of that variation. A digital processor determines a digital control signal from the digital value that is used to compensate, in the digital domain of the envelope path, for the variation in the filter resistor in the analog domain.
摘要翻译：校准电路测量极性发射器的包络路径的模拟域内的滤波电阻的变化，并产生代表该变化的数字值。数字处理器根据数字值确定数字控制信号，该数字值用于在包络路径的数字域中补偿模拟域中的滤波电阻的变化。

3. 发明授权

US07961812B2 Digital compensation for nonlinearities in a polar transmitter 有权
标题翻译：极地发射机的非线性数字补偿
公开(公告)号：US07961812B2
公开(公告)日：2011-06-14
申请号：US12842963
申请日：2010-07-23
申请人： Henrik T. Jensen , Hooman Darabi , Alireza Zolfaghari
发明人： Henrik T. Jensen , Hooman Darabi , Alireza Zolfaghari
IPC分类号： H04L25/03
CPC分类号： H04B1/0475 , H03C5/00 , H03F1/0222 , H03F1/3241
摘要： A polar transmitter includes a digital processor coupled to receive a complex modulated digital signal and a feedback signal produced from the complex modulated digital signal and that is operable to compare the complex modulated digital signal to the feedback signal to determine an error signal indicative of a difference between the complex modulated digital signal and the feedback signal. The digital processor is further operable to produce a correction signal from the error signal and to add the correction signal to the complex modulated digital signal to produce a corrected complex modulated digital signal.
摘要翻译：极性发射器包括耦合以接收复调制数字信号的数字处理器和从复调制数字信号产生的反馈信号，其可操作以将复调制数字信号与反馈信号进行比较，以确定指示差分的误差信号在复调制数字信号与反馈信号之间。数字处理器还可操作以从误差信号产生校正信号，并将校正信号添加到复调制数字信号以产生经校正的复数调制数字信号。

4. 发明授权

US07826564B2 Complex digital phase locked loop for use in a demodulator and method of optimal coefficient selection 有权
标题翻译：用于解调器的复数数字锁相环和最佳系数选择方法
公开(公告)号：US07826564B2
公开(公告)日：2010-11-02
申请号：US12234343
申请日：2008-09-19
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： H03D3/18 , H03D3/24
CPC分类号： H03D3/24 , H03D2200/0082
摘要： A complex digital phase locked loop for use in a digital demodulator includes a phase detector for producing a phase error indicative of a difference in phase between a complex digital input signal and a complex digital feedback signal. The phase error is input to a controller, which multiplies the phase error by a gain factor selected to stabilize and optimize the phase locked loop and produces an output signal for use in extracting a frequency deviation present in the complex digital input signal. The output signal is also input to a numerically controlled oscillator that tracks the phase of the complex digital input signal based on the output signal and produces the complex digital feedback signal.
摘要翻译：用于数字解调器的复数数字锁相环包括相位检测器，用于产生指示复数数字输入信号和复数数字反馈信号之间的相位差的相位误差。将相位误差输入到控制器，该控制器将相位误差乘以所选择的增益因子，以稳定和优化锁相环，并产生用于提取复数字输入信号中存在的频率偏差的输出信号。输出信号也输入到数控振荡器，该振荡器基于输出信号跟踪复数数字输入信号的相位，并产生复数数字反馈信号。

5. 发明授权

US07515652B2 Digital modulator for a GSM/GPRS/EDGE wireless polar RF transmitter 失效
标题翻译：用于GSM / GPRS / EDGE无线极性射频发射机的数字调制器
公开(公告)号：US07515652B2
公开(公告)日：2009-04-07
申请号：US10944552
申请日：2004-09-17
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： H04L25/00
CPC分类号： H04L27/2003 , H04L27/2017
摘要： A digital modulator in a radio transmitter includes circuitry for switching between Gaussian Minimum Shift Keying (GMSK) and Phase-Shift Keying (PSK) while maintaining spectral mask requirements. The digital modulator of the present invention includes both GMSK and PSK symbol mappers that produce PSK in-phase and quadrature symbols and GMSK symbols, respectively, to a pulse shaping block. Based on opposite phases of a modulation control signal, the symbol mappers produce either modulated data or a steam of logic zeros to the pulse shaping block. The pulse shaping block filters the received data and multiplexes the data so that each modulated data stream receives non-zero data during a guard time to avoid abrupt changes in the modulated signal that would violate the spectral mask requirements.
摘要翻译：无线电发射机中的数字调制器包括用于在保持频谱掩模要求的同时在高斯最小移频键控（GMSK）和相移键控（PSK）之间切换的电路。本发明的数字调制器包括分别产生PSK同相和正交符号和GMSK符号的GMSK和PSK符号映射器到脉冲整形块。基于调制控制信号的相反相位，符号映射器产生调制数据或逻辑零的蒸汽到脉冲整形块。脉冲整形块对接收到的数据进行滤波并复用数据，使得每个调制数据流在保护时间期间接收非零数据，以避免将会违反频谱掩模要求的调制信号的突然变化。

6. 发明授权

US07403962B2 Interpolation filter design and application 失效
标题翻译：插值滤波器的设计与应用
公开(公告)号：US07403962B2
公开(公告)日：2008-07-22
申请号：US10856024
申请日：2004-05-28
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： G06F17/17
CPC分类号： H03H17/0671 , H03H17/0225
摘要： A method for designing an interpolation filter begins by partitioning interpolation filtering into a plurality of interpolation filtering stages that are cascaded together. Each of the plurality of interpolation filtering stages includes an up sampling stage and a filtering stage. The method continues by manipulating a first one of the interpolation filtering stages based on a first digital signal processing identity to produce a first equivalent interpolation filtering stage. The method continues by manipulating a second one of the interpolation filtering stages based on the first digital signal processing identity to produce a second equivalent interpolation filtering stage. The method continues by simplifying the first and second equivalent interpolation filtering stages to produce at least a simplified portion of the interpolation filter.
摘要翻译：用于设计内插滤波器的方法通过将内插滤波分割成级联在一起的多个内插滤波级开始。多个插值滤波级中的每一个包括上采样级和滤波级。该方法通过基于第一数字信号处理标识来操纵内插滤波级中的第一个，以产生第一等效插值滤波级来继续。该方法通过基于第一数字信号处理标识来操纵内插滤波级中的第二个，以产生第二等效内插滤波级来继续。该方法通过简化第一和第二等效插值滤波级来产生至少简化的内插滤波器部分而继续。

7. 发明授权

US07394869B2 RF transmitter architecture for continuous switching between modulation modes 失效
标题翻译： RF发射机架构，用于在调制模式之间连续切换
公开(公告)号：US07394869B2
公开(公告)日：2008-07-01
申请号：US10816731
申请日：2004-04-02
申请人： Henrik T. Jensen , Brima B. Ibrahim
发明人： Henrik T. Jensen , Brima B. Ibrahim
IPC分类号： H03C3/00
CPC分类号： H04L27/0008 , H04L1/0003 , H04L1/0025
摘要： The present invention provides a radio transmitter having a digital modulator that further includes logic for continuous amplitude and continuous phase modulation switching in an RF transmitter intended to support both frequency shift keying (FSK) and phase shift keying (PSK) modulation techniques in a smooth and continuous manner that does not violate spectral mask requirements. The invention supports continuous modulation switching both ways, i.e., from FSK to PSK and from PSK to FSK. In operation, the radio transmitter initially operates in a first communication mode, transmitting communication signals to a remote agent according to a first modulation technique at a first data rate and then transitions to the second modulation type at a second data rate without spectral mask violation.
摘要翻译：本发明提供了一种具有数字调制器的无线电发射机，该数字调制器还包括用于RF发射机中的连续振幅和连续相位调制切换的逻辑，其旨在支持频移键控（FSK）和相移键控（PSK）调制技术，连续的方式，不违反光谱掩模要求。本发明支持连续调制方式两种方式，即从FSK到PSK，从PSK到FSK。在操作中，无线电发射机最初以第一通信模式操作，根据第一数据速率的第一调制技术向远程代理发送通信信号，然后以没有频谱掩模违例的第二数据速率转换到第二调制类型。

8. 发明申请

US20080153437A1 Digital compensation for nonlinearities in a phase-locked loop of a polar transmitter 失效
标题翻译：极性发射机锁相环非线性的数字补偿
公开(公告)号：US20080153437A1
公开(公告)日：2008-06-26
申请号：US11643166
申请日：2006-12-21
申请人： Henrik T. Jensen , Hooman Darabi , Alireza Zolfaghari
发明人： Henrik T. Jensen , Hooman Darabi , Alireza Zolfaghari
IPC分类号： H03C3/00
CPC分类号： H03C5/00 , H03C3/0925 , H03C3/0933 , H03C3/0991
摘要： A polar transmitter includes a digital processor for producing a phase correction signal and a complex modulated digital signal including a digital phase-modulated signal. The phase correction signal is added to the digital phase-modulated signal to produce a corrected digital phase signal. The corrected digital phase signal is input to a phase-locked loop (PLL) to produce an RF phase signal that tracks the phase of the digital phase-modulated signal based on the corrected digital phase signal.
摘要翻译：极性发射机包括用于产生相位校正信号的数字处理器和包括数字相位调制信号的复数调制数字信号。将相位校正信号加到数字相位调制信号上以产生校正的数字相位信号。校正的数字相位信号被输入到锁相环（PLL）以产生基于经校正的数字相位信号跟踪数字相位调制信号的相位的RF相位信号。

9. 发明授权

US07158064B2 Continuous-time delta-sigma ADC with programmable input range 有权
标题翻译：具有可编程输入范围的连续时间Δ-ΣADC
公开(公告)号：US07158064B2
公开(公告)日：2007-01-02
申请号：US11301513
申请日：2005-12-13
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： H03M3/00
CPC分类号： H03M3/478
摘要： A scaled input current is produced that substantially matches the full scale input of a CTΔΣADC that substantially cancels an offset bias current component of the input current. A variable bias resistance value is coupled between the integrator input and one of a supply voltage and a circuit common. The method further includes integrating the input current to produce an integrated signal representing a time averaged value of the input current to substantially remove noise from a frequency band of interest. The integrated signal is produced to a quantizer to produce a feedback current that substantially cancels a quantization noise component in the digital representation of the scaled analog signal by coupling the digital representation of the scaled analog signal to a programmable digital switch wherein the programmable digital switch either sinks current from or sources current to the integrator input.
摘要翻译：产生缩放的输入电流，其基本上匹配基本上抵消输入电流的偏移偏置电流分量的CTDeltaSigmaADC的满量程输入。可变偏置电阻值耦合在积分器输入和电源电压和电路公共之一之间。该方法还包括积分输入电流以产生表示输入电流的时间平均值的积分信号，以从感兴趣的频带基本上去除噪声。将积分信号产生到量化器，以产生反馈电流，该反馈电流通过将经缩放的模拟信号的数字表示耦合到可编程数字开关，其中可编程数字开关或者是可编程数字开关，基本上消除了缩放的模拟信号的数字表示中的量化噪声分量从当前流向积分器输入的电流。

10. 发明授权

US06975259B1 Continuous-time delta-sigma ADC with programmable input range 失效
标题翻译：具有可编程输入范围的连续时间Δ-ΣADC
公开(公告)号：US06975259B1
公开(公告)日：2005-12-13
申请号：US10922532
申请日：2004-08-20
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： H03M3/00 , H03M3/04 , H03M7/12
CPC分类号： H03M3/478
摘要： A scaled input current is produced that substantially matches the full scale input of a CTΔτADC that substantially cancels an offset bias current component of the input current. A variable bias resistance value is coupled between the integrator input and one of a supply voltage and a circuit common. The method further includes integrating the input current to produce an integrated signal representing a time averaged value of the input current to substantially remove noise from a frequency band of interest. The integrated signal is produced to a quantizer to produce a feedback current that substantially cancels a quantization noise component in the digital representation of the scaled analog signal by coupling the digital representation of the scaled analog signal to a programmable digital switch wherein the programmable digital switch either sinks current from or sources current to the integrator input.
摘要翻译：产生缩放的输入电流，其基本上匹配基本上抵消输入电流的偏移偏置电流分量的CTDeltatauADC的满量程输入。可变偏置电阻值耦合在积分器输入和电源电压和电路公共之一之间。该方法还包括积分输入电流以产生表示输入电流的时间平均值的积分信号，以从感兴趣的频带基本上去除噪声。将积分信号产生到量化器，以产生反馈电流，该反馈电流通过将经缩放的模拟信号的数字表示耦合到可编程数字开关，其中可编程数字开关或者是可编程数字开关，基本上消除了缩放的模拟信号的数字表示中的量化噪声分量从当前流向积分器输入的电流。

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