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1. 发明申请

US20050029229A1 Selective etch process of a sacrificial light absorbing material (SLAM) over a dielectric material 失效
标题翻译：在介电材料上的牺牲光吸收材料（SLAM）的选择性蚀刻工艺
公开(公告)号：US20050029229A1
公开(公告)日：2005-02-10
申请号：US10706902
申请日：2003-11-12
申请人： Hee Chae , Jeremiah Pender , Gerardo Delgadino , Xiaoye Zhao , Yan Ye
发明人： Hee Chae , Jeremiah Pender , Gerardo Delgadino , Xiaoye Zhao , Yan Ye
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , H01L21/311 , H01L21/768
CPC分类号： H01L21/76808 , H01L21/31116
摘要： A process of selectively etching a sacrificial light absorbing material (SLAM) over a dielectric material, such as carbon doped oxide, on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a hydrofluorocarbon gas, an optional hydrogen-containing gas, an optional fluorine-rich fluorocargon gas, a nitrogen gas, an oxygen gas, and an inert gas. The process could provide a SLAM to a dielectric material etching selectivity ratio greater than 10:1.
摘要翻译：使用等离子体蚀刻室中的气体混合物的等离子体在衬底上在介电材料（例如碳掺杂氧化物）上选择性地蚀刻牺牲光吸收材料（SLAM）的工艺。气体混合物包括氢氟烃气体，任选的含氢气体，任选的富含氟的氟碳酸气体，氮气，氧气和惰性气体。该方法可以提供大于10:1的介电材料蚀刻选择比的SLAM。

2. 发明申请

US20070020944A1 SELECTIVE ETCH PROCESS OF A SACRIFICIAL LIGHT ABSORBING MATERIAL (SLAM) OVER A DIELECTRIC MATERIAL 失效
标题翻译：绝缘材料（SLAM）的选择性蚀刻工艺
公开(公告)号：US20070020944A1
公开(公告)日：2007-01-25
申请号：US11535551
申请日：2006-09-27
申请人： Hee Yeop Chae , Jeremiah Pender , Gerardo Delgadino , Xiaoye Zhao , Yan Ye
发明人： Hee Yeop Chae , Jeremiah Pender , Gerardo Delgadino , Xiaoye Zhao , Yan Ye
IPC分类号： C23F1/00 , H01L21/302 , H01L21/461
CPC分类号： H01L21/76808 , H01L21/31116
摘要： A process of selectively etching a sacrificial light absorbing material (SLAM) over a dielectric material, such as carbon doped oxide, on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a hydrofluorocarbon gas, an optional hydrogen-containing gas, an optional fluorine-rich fluorocarbon gas, a nitrogen gas, an oxygen gas, and an inert gas. The process could provide a SLAM to a dielectric material etching selectivity ratio greater than 10:1.
摘要翻译：使用等离子体蚀刻室中的气体混合物的等离子体在衬底上在介电材料（例如碳掺杂氧化物）上选择性地蚀刻牺牲光吸收材料（SLAM）的工艺。气体混合物包括氢氟烃气体，任选的含氢气体，任选的富氟碳氟化合物气体，氮气，氧气和惰性气体。该方法可以提供大于10:1的介电材料蚀刻选择比的SLAM。

3. 发明授权

US08143138B2 Method for fabricating interconnect structures for semiconductor devices 失效
标题翻译：制造用于半导体器件的互连结构的方法
公开(公告)号：US08143138B2
公开(公告)日：2012-03-27
申请号：US12240061
申请日：2008-09-29
申请人： Ryan James Patz , Igor Peidous , Jeremiah Pender , Michael D. Armacost
发明人： Ryan James Patz , Igor Peidous , Jeremiah Pender , Michael D. Armacost
IPC分类号： H01L21/76
CPC分类号： H01L21/76807 , H01L21/67253 , H01L21/76844 , H01L21/76846 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Described herein are methods for fabricating dual-damascene interconnect structures. In one embodiment, the interconnect structures are fabricated with a dual-damascene method having trenches then vias formed. The method includes novel liner depositions after the trench and via etches. The method includes etching trenches in a dielectric layer. Next, the method includes depositing a first liner layer on the dielectric layer. Next, the method includes etching vias in the dielectric layer and an etch stop layer. Next, the method includes depositing a second liner layer on the first liner layer. The second liner layer is deposited on the exposed surfaces of the first liner layer, dielectric layer, etch stop layer, and the first metal layer. Then, a second metal layer is deposited on the second liner layer.
摘要翻译：这里描述了制造双镶嵌互连结构的方法。在一个实施例中，使用具有沟槽然后形成通孔的双镶嵌法制造互连结构。该方法包括在沟槽和经过蚀刻之后的新型衬垫沉积。该方法包括蚀刻电介质层中的沟槽。接下来，该方法包括在介电层上沉积第一衬里层。接下来，该方法包括蚀刻介电层中的通孔和蚀刻停止层。接下来，该方法包括在第一衬里层上沉积第二衬里层。第二衬里层沉积在第一衬里层，电介质层，蚀刻停止层和第一金属层的暴露表面上。然后，第二金属层沉积在第二衬垫层上。

4. 发明申请

US20100078825A1 METHOD FOR FABRICATING INTERCONNECT STRUCTURES FOR SEMICONDUCTOR DEVICES 失效
标题翻译：用于制造半导体器件的互连结构的方法
公开(公告)号：US20100078825A1
公开(公告)日：2010-04-01
申请号：US12240061
申请日：2008-09-29
申请人： Ryan James Patz , Igor Peidous , Jeremiah Pender , Michael D. Armacost
发明人： Ryan James Patz , Igor Peidous , Jeremiah Pender , Michael D. Armacost
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L21/76807 , H01L21/67253 , H01L21/76844 , H01L21/76846 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Described herein are methods for fabricating dual-damascene interconnect structures. In one embodiment, the interconnect structures are fabricated with a dual-damascene method having trenches then vias formed. The method includes novel liner depositions after the trench and via etches. The method includes etching trenches in a dielectric layer. Next, the method includes depositing a first liner layer on the dielectric layer. Next, the method includes etching vias in the dielectric layer and an etch stop layer. Next, the method includes depositing a second liner layer on the first liner layer. The second liner layer is deposited on the exposed surfaces of the first liner layer, dielectric layer, etch stop layer, and the first metal layer. Then, a second metal layer is deposited on the second liner layer.
摘要翻译：这里描述了制造双镶嵌互连结构的方法。在一个实施例中，使用具有沟槽然后形成通孔的双镶嵌法制造互连结构。该方法包括在沟槽和经过蚀刻之后的新型衬垫沉积。该方法包括蚀刻电介质层中的沟槽。接下来，该方法包括在介电层上沉积第一衬里层。接下来，该方法包括蚀刻介电层中的通孔和蚀刻停止层。接下来，该方法包括在第一衬里层上沉积第二衬里层。第二衬里层沉积在第一衬里层，电介质层，蚀刻停止层和第一金属层的暴露表面上。然后，第二金属层沉积在第二衬垫层上。

5. 发明申请

US20100022091A1 METHOD FOR PLASMA ETCHING POROUS LOW-K DIELECTRIC LAYERS 审中-公开
标题翻译：等离子体蚀刻多孔低K介质层的方法
公开(公告)号：US20100022091A1
公开(公告)日：2010-01-28
申请号：US12180367
申请日：2008-07-25
申请人： SIYI LI , Qingjun Zhou , Ryan Patz , Yifeng Zhou , Jeremiah Pender , Michael D. Armacost
发明人： SIYI LI , Qingjun Zhou , Ryan Patz , Yifeng Zhou , Jeremiah Pender , Michael D. Armacost
IPC分类号： H01L21/306
CPC分类号： H01L21/31116 , H01J37/3244 , H01J37/32449 , H01J2237/334 , H01L21/31138 , H01L21/76808 , H01L21/76813
摘要： Described herein are methods and apparatuses for etching low-k dielectric layers to form various interconnect structures. In one embodiment, the method includes forming an opening in a resist layer. The method further includes etching a porous low-k dielectric layer with a process gas mixture that includes a fluorocarbon gas and a carbon dioxide (CO2) gas to form vias. The fluorocarbon gas may be C4F6 gas. A ratio of a flow rate of the C4F6 gas to a flow rate of the CO2 gas can vary from approximately 1:2 to 1:10. In another embodiment, the porous low-k dielectric layer is etched with a process gas mixture that includes a fluorocarbon gas and an argon gas with no CHF3 gas to form trenches aligned with the vias in an integrated dual-damascene structure. The fluorocarbon gas may be CF4 gas.
摘要翻译：这里描述了用于蚀刻低k电介质层以形成各种互连结构的方法和装置。在一个实施例中，该方法包括在抗蚀剂层中形成开口。该方法还包括用包括碳氟化合物气体和二氧化碳（CO 2）气体的工艺气体混合物蚀刻多孔低k电介质层以形成通孔。碳氟化合物气体可以是C 4 F 6气体。 C4F6气体的流量与CO 2气体的流量的比率可以在约1:2至1:10之间变化。在另一个实施例中，多孔低k电介质层被包括碳氟化合物气体和没有CHF 3气体的氩气的工艺气体混合物进行蚀刻，以形成与整个双镶嵌结构中的通路对准的沟槽。碳氟化合物气体可以是CF 4气体。

6. 发明申请

US20100043821A1 METHOD OF PHOTORESIST REMOVAL IN THE PRESENCE OF A LOW-K DIELECTRIC LAYER 审中-公开
标题翻译：在低K介质层存在下除去光电离元件的方法
公开(公告)号：US20100043821A1
公开(公告)日：2010-02-25
申请号：US12193964
申请日：2008-08-19
申请人： Siyi Li , Ryan Patz , Qingjun Zhou , Jeremiah Pender , Michael D. Armacost
发明人： Siyi Li , Ryan Patz , Qingjun Zhou , Jeremiah Pender , Michael D. Armacost
IPC分类号： B08B6/00
CPC分类号： H01L21/31138 , G03F7/427 , H01L21/76808
摘要： Described herein are methods and apparatus for removing photoresist in the presence of low-k dielectric layers. In one embodiment, the method includes exciting a first mixture of gases having a ratio of a flow rate of reducing process gas to a flow rate of an oxygen-containing process gas that is between 1:1 and 100:1 to generate a first reactive gas mixture. Next, the method includes exposing the photoresist layer that overlays the low-k dielectric layer on a substrate to the first reactive gas mixture to selectively remove the photoresist layer from the dielectric layer. Next, the method includes exposing the photoresist layer to a second reactive gas mixture to selectively remove the photoresist layer from the dielectric layer. The first and second reactive gas mixtures contain substantially no ions when the substrate is exposed to these mixtures in order to minimize damage to the low-k dielectric layer.
摘要翻译：这里描述了在低k电介质层的存在下去除光致抗蚀剂的方法和装置。在一个实施方案中，该方法包括激发第一混合气体，其中还原过程气体的流量与含氧处理气体的流量之比在1:1至100:1之间以产生第一反应性气体混合物接下来，该方法包括将衬底上的低k电介质层覆盖的光致抗蚀剂层暴露于第一反应气体混合物，以从电介质层选择性地除去光致抗蚀剂层。接下来，该方法包括将光致抗蚀剂层暴露于第二反应气体混合物以从介质层选择性地除去光致抗蚀剂层。当基板暴露于这些混合物时，第一和第二反应气体混合物基本上不含离子，以便最小化对低k电介质层的损伤。

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