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1. 发明申请

US20050197064A1 Method and system for using PSK sync word for fine tuning frequency adjustment 有权
标题翻译：使用PSK同步字进行微调频率调整的方法和系统
公开(公告)号：US20050197064A1
公开(公告)日：2005-09-08
申请号：US11101961
申请日：2005-04-08
申请人： Brima Ibrahim , Hea Kim , Henrik Jensen , Siukai Mak
发明人： Brima Ibrahim , Hea Kim , Henrik Jensen , Siukai Mak
IPC分类号： H04L25/06 , H04B7/00 , H04B1/00 , H04B15/00
CPC分类号： H04L25/063 , H04L27/22 , H04L2027/003 , H04L2027/0057 , H04L2027/0095
摘要： In RF transceivers, a method and system for using phase shift key (PSK) sync word for fine tuning frequency adjustment are provided. One aspect of the invention provides for adjusting a local oscillator frequency in a radio frequency (RF) receiver when a residual DC offset remains after a coarse frequency offset adjustment if performed. The fine adjustment may be necessary because of the synchronization required with a PSK-based modulated portion of a Bluetooth packet. A residual phase shift detected in a sync sequence portion of the Bluetooth packet may be utilized to determine a residual or fine frequency adjustment. This approach may allow an RF receiver to operate, in some instances, without the need for an equalizer. In this regard, the power consumed by the RF receiver may be minimized and/or the overall cost of the RF receiver may be reduced.
摘要翻译：在RF收发器中，提供了一种使用相移键（PSK）同步字进行微调频率调整的方法和系统。本发明的一个方面提供了当在执行粗频率偏移调整之后剩余DC偏移保留时，调整射频（RF）接收机中的本地振荡器频率。由于蓝牙分组的基于PSK的调制部分所需的同步，因此可能需要进行微调。在蓝牙分组的同步序列部分中检测到的残余相移可用于确定残差或精细频率调整。这种方法可以允许RF接收机在某些情况下操作，而不需要均衡器。在这方面，RF接收机消耗的功率可以被最小化，和/或可以降低RF接收机的总体成本。

2. 发明申请

US20060093081A1 Method and system for packet synchronization 有权
公开(公告)号：US20060093081A1
公开(公告)日：2006-05-04
申请号：US11101990
申请日：2005-04-08
申请人： Brima Ibrahim , Hea Kim , Henrik Jensen
发明人： Brima Ibrahim , Hea Kim , Henrik Jensen
IPC分类号： H04L7/00
CPC分类号： H04L7/08
摘要： A method and system for packet synchronization may comprise receiving a plurality of bits from an incoming sample of data. The received plurality of bits may be sliced at a first sampling rate. A logic level of at least one of the received plurality of bits may be determined based on the slicing of the received plurality of bits. The received plurality of bits may be synchronized with a channel access code based on determining the logic level of at least one of the received plurality of bits. The channel access code may be sampled at a higher frequency, to increase the probability of detecting whether the incoming bit is LOGIC 1 or LOGIC 0.

3. 发明申请

US20060093079A1 Method and system for adjusting DC offset slice point in an RF receiver 有权
标题翻译：用于调整RF接收机中DC偏移片段的方法和系统
公开(公告)号：US20060093079A1
公开(公告)日：2006-05-04
申请号：US11102157
申请日：2005-04-08
申请人： Hea Kim , Brima Ibrahim , Henrik Jensen
发明人： Hea Kim , Brima Ibrahim , Henrik Jensen
IPC分类号： H04L27/06 , H04L27/14
CPC分类号： H04L27/142 , H04L25/062
摘要： A method for adjusting a DC offset slice point in an RF receiver is provided and may comprise estimating DC offset using a combination of fast tracking of an input signal and slow tracking of an input signal. If both are used, the fast tracking may be executed prior to executing the slow tracking. The fast tracking may acquire synchronizing signals transmitted before a payload. Additionally, noise tolerance may be increased in the fast tracking and the slow tracking by using tracking envelopes. The fast tracking may average acquisition envelopes and tracking envelopes using a fast tracking weighting factor to a sum of the acquisition envelopes and a slow tracking weighting factor to a sum of the tracking envelopes. Additionally, the slow tracking may average the tracking envelopes.
摘要翻译：提供了一种用于调整RF接收机中的DC偏移切片点的方法，并且可以包括使用输入信号的快速跟踪和输入信号的慢跟踪的组合来估计DC偏移。如果使用两者，则可以在执行慢速跟踪之前执行快速跟踪。快速跟踪可以获取在有效载荷之前传输的同步信号。此外，通过使用跟踪包络，快速跟踪和慢速跟踪可能会增加噪声容限。快速跟踪可以使用快速跟踪加权因子将采集包络和跟踪包络平均为采集包络和缓慢跟踪加权因子之和到跟踪包络的总和。此外，慢速跟踪可以平均跟踪包络。

4. 发明申请

US20060093070A1 Method and system for reuse of CORDIC in an RF transceiver by reconfiguration in real time 有权
标题翻译： CORDIC在RF收发器中实时重配置的方法和系统
公开(公告)号：US20060093070A1
公开(公告)日：2006-05-04
申请号：US10989536
申请日：2004-11-16
申请人： Brima Ibrahim , Hea Kim , Henrik Jensen , Paul Lettieri , Siukai Mak
发明人： Brima Ibrahim , Hea Kim , Henrik Jensen , Paul Lettieri , Siukai Mak
IPC分类号： H04L27/22
CPC分类号： H03D3/006
摘要： Methods and systems for processing an RF signal are disclosed herein. Aspects of the method may comprise utilizing a single input CORDIC and a single output CORDIC for synchronizing and demodulating a received signal, wherein the received signal may comprise one or more bit rates. The received signal may comprise a one megabit per second (Mbps) signal. The single input CORDIC may be configured to operate in a rotating mode and the single output CORDIC may be configured to operate in a rotating mode and/or an arctangent (ARCTAN) mode. A rotated output of the single input CORDIC may be correlated with a phase shift keying (PSK) synchronization (sync) word and a portion of the correlated rotated output of the single input CORDIC may be buffered.
摘要翻译：本文公开了用于处理RF信号的方法和系统。该方法的方面可以包括利用单个输入CORDIC和单个输出CORDIC来同步和解调所接收的信号，其中所接收的信号可以包括一个或多个比特率。所接收的信号可以包括一兆兆比特每秒（Mbps）信号。单输入CORDIC可以被配置为以旋转模式操作，并且单输出CORDIC可以被配置为在旋转模式和/或反正切（ARCTAN）模式下操作。单输入CORDIC的旋转输出可以与相移键控（PSK）同步（sync）字相关，并且单个输入CORDIC的相关旋转输出的一部分可以被缓冲。

5. 发明申请

US20050181729A1 Method and system for frequency feedback adjustment in digital receivers 有权
标题翻译：数字接收机频率反馈调整方法及系统
公开(公告)号：US20050181729A1
公开(公告)日：2005-08-18
申请号：US11102123
申请日：2005-04-08
申请人： Brima Ibrahim , Hea Kim , Henrik Jensen
发明人： Brima Ibrahim , Hea Kim , Henrik Jensen
IPC分类号： H04L25/06 , H04B7/00 , H04B17/00 , H04M1/00
CPC分类号： H03J7/02 , H03J2200/02 , H04L25/063 , H04L27/142 , H04L2027/0057 , H04L2027/0065
摘要： In RF transceivers, a method and a system for a frequency feedback adjustment in digital receivers are provided. A DC offset may result from the difference in frequencies between an RF transmitter and an RF receiver. An adjustment of the receiver's frequency may be implemented after synchronization occurs and may be performed by utilizing the Forward Error Correction (FEC) repetition rate in a header of a Bluetooth packet. The adjustment may be performed when the frequency difference exceeds a threshold value. In another aspect, adjusting the frequency of the RF receiver may be performed by modifying and/or changing a phase locked loop (PLL) trimmer register. This approach may allow an RF receiver to operate, in some instances, without the need for an equalizer. In this regard, the power consumed by the RF receiver may be minimized and/or the overall cost of the RF receiver may be reduced.
摘要翻译：在RF收发器中，提供了用于数字接收机中的频率反馈调整的方法和系统。 DC偏移可能由RF发射机和RF接收机之间的频率差引起。可以在同步发生之后实现接收机频率的调整，并且可以通过利用蓝牙分组的报头中的前向纠错（FEC）重复率来执行。当频率差超过阈值时，可以进行调整。在另一方面，可以通过修改和/或改变锁相环（PLL）微调寄存器来调整RF接收机的频率。这种方法可以允许RF接收机在某些情况下操作，而不需要均衡器。在这方面，RF接收机消耗的功率可以被最小化，和/或可以降低RF接收机的总体成本。

6. 发明申请

US20050220218A1 RF transmitter architecture for continuous switching between modulations modes 失效
标题翻译： RF发射机架构，用于在调制模式之间连续切换
公开(公告)号：US20050220218A1
公开(公告)日：2005-10-06
申请号：US10816731
申请日：2004-04-02
申请人： Henrik Jensen , Brima Ibrahim
发明人： Henrik Jensen , Brima Ibrahim
IPC分类号： H04B1/69 , H04L1/00 , H04L27/00
CPC分类号： H04L27/0008 , H04L1/0003 , H04L1/0025
摘要： The present invention provides a radio transmitter having a digital modulator that further includes logic for continuous amplitude and continuous phase modulation switching in an RF transmitter intended to support both frequency shift keying (FSK) and phase shift keying (PSK) modulation techniques in a smooth and continuous manner that does not violate spectral mask requirements. The invention supports continuous modulation switching both ways, i.e., from FSK to PSK and from PSK to FSK. In operation, the radio transmitter initially operates in a first communication mode, transmitting communication signals to a remote agent according to a first modulation technique at a first data rate and then transitions to the second modulation type at a second data rate without spectral mask violation.
摘要翻译：本发明提供了一种具有数字调制器的无线电发射机，该数字调制器还包括用于RF发射机中的连续振幅和连续相位调制切换的逻辑，其旨在支持频移键控（FSK）和相移键控（PSK）调制技术，连续的方式，不违反光谱掩模要求。本发明支持连续调制方式两种方式，即从FSK到PSK，从PSK到FSK。在操作中，无线电发射机最初以第一通信模式操作，根据第一数据速率的第一调制技术向远程代理发送通信信号，然后以没有频谱掩模违例的第二数据速率转换到第二调制类型。

7. 发明申请

US20050207515A1 Digital demodulation 失效
标题翻译：数字解调
公开(公告)号：US20050207515A1
公开(公告)日：2005-09-22
申请号：US11120561
申请日：2005-05-03
申请人： Henrik Jensen , Brima Ibrahim
发明人： Henrik Jensen , Brima Ibrahim
IPC分类号： H04L27/152 , H04L27/14
CPC分类号： H04L27/1525
摘要： A digital demodulator includes a mixing section, 1st and 2nd digital comb filters, phase locked loop module, and a data recovery module. The mixing section is operably coupled to produce a digital I signal and a digital Q signal from a digital intermediate frequency signal. The 1st comb filter filters the digital I signal while the 2nd comb filter filters the digital Q signal. The phase locked loop module produces a digital signal from the filtered I and filtered Q signals. The data recovery module interprets the digital signal to recapture a data stream.
摘要翻译：数字解调器包括混合部分，第一和第二数字梳状滤波器，锁相环模块和数据恢复模块。混合部分可操作地耦合以从数字中频信号产生数字I信号和数字Q信号。第1＆lt;梳状滤波器滤波数字I信号，而第2＆amp;梳状滤波器滤波数字Q信号。锁相环模块从滤波I和滤波Q信号产生数字信号。数据恢复模块解释数字信号以重新获取数据流。

8. 发明授权

US09071417B2 Method and system for packet synchronization 有权
标题翻译：数据包同步的方法和系统
公开(公告)号：US09071417B2
公开(公告)日：2015-06-30
申请号：US11101990
申请日：2005-04-08
申请人： Brima Ibrahim , Hea Joung Kim , Henrik Jensen
发明人： Brima Ibrahim , Hea Joung Kim , Henrik Jensen
IPC分类号： H04L7/00 , H04L7/08
CPC分类号： H04L7/08
摘要： A method and system for packet synchronization may comprise receiving a plurality of bits from an incoming sample of data. The received plurality of bits may be sliced at a first sampling rate. A logic level of at least one of the received plurality of bits may be determined based on the slicing of the received plurality of bits. The received plurality of bits may be synchronized with a channel access code based on determining the logic level of at least one of the received plurality of bits. The channel access code may be sampled at a higher frequency, to increase the probability of detecting whether the incoming bit is LOGIC 1 or LOGIC 0.
摘要翻译：用于分组同步的方法和系统可以包括从输入的数据样本接收多个比特。所接收的多个比特可以以第一采样率进行切片。可以基于所接收的多个比特的限幅来确定所接收的多个比特中的至少一个的逻辑电平。基于确定所接收的多个比特中的至少一个的逻辑电平，所接收的多个比特可以与信道接入码同步。可以以更高的频率对信道接入码进行采样，以增加检测进入位是逻辑1还是逻辑0的概率。

9. 发明申请

US20070027943A1 Channel-select decimation filter with programmable bandwidth 失效
标题翻译：具有可编程带宽的通道选择抽取滤波器
公开(公告)号：US20070027943A1
公开(公告)日：2007-02-01
申请号：US11189910
申请日：2005-07-26
申请人： Henrik Jensen , Brima Ibrahim
发明人： Henrik Jensen , Brima Ibrahim
IPC分类号： G06F17/10
CPC分类号： H04L27/38 , H03H17/0664 , H03H17/0671
摘要： A channel-select decimation filter capable of operating in multiple bandwidth modes includes a first low pass filter stage, a variable gain stage, a subtraction module a second low pass filter stage and a down-sampling module. The first low pass filter stage includes a first programmable delay module for filtering input signals to produce first low pass filtered signals. The variable gain stage applies a programmable gain to the input signals to produce gained input signals. The subtraction module subtracts the first low pass filtered signals from the gain input signals to produce first stage signals. The second low pass filter stage includes a second programmable delay module for filtering the first stage signals to produce channel-selected signals. The first programmable delay module, second programmable delay module and programmable gain are programmed to implement one of the multiple bandwidth modes.
摘要翻译：能够在多个带宽模式下工作的频道选择抽取滤波器包括第一低通滤波器级，可变增益级，减法模块，第二低通滤波级和下采样模块。第一低通滤波器级包括用于滤波输入信号以产生第一低通滤波信号的第一可编程延迟模块。可变增益级将可编程增益应用于输入信号以产生增益的输入信号。减法模块从增益输入信号中减去第一低通滤波信号，以产生第一级信号。第二低通滤波器级包括用于对第一级信号进行滤波以产生通道选择信号的第二可编程延迟模块。第一可编程延迟模块，第二可编程延迟模块和可编程增益被编程以实现多种带宽模式之一。

10. 发明授权

US07154974B2 Data recovery system and applications thereof in radio receivers 失效
公开(公告)号：US07154974B2
公开(公告)日：2006-12-26
申请号：US10074294
申请日：2002-02-12
申请人： Henrik Jensen , Brima Ibrahim
发明人： Henrik Jensen , Brima Ibrahim
IPC分类号： H04L7/00 , H03D3/00
CPC分类号： H04B1/406
摘要： A method and apparatus for data recovery includes processing that begins by receiving an encoded signal at a transmit symbol rate. Such an encoded signal includes data that is represented by positive and negative pulses. The processing continues by determining at least one reference crossing of the encoded signal (e.g., detecting a 0 crossing). The processing then continues by determining a sampling phase of a system symbol rate based on the reference crossing. The processing then continues by sampling the encoded signal at the determined sampling phase with respect to the system symbol rate to recapture the data.

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