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1. 发明申请

US20070145200A1 Display-supporting frame 审中-公开
标题翻译：显示支持框架
公开(公告)号：US20070145200A1
公开(公告)日：2007-06-28
申请号：US11319253
申请日：2005-12-27
申请人： Hao-Chan Wei , Kuo-Li Hung , Chia-Hou Liao , Ming-Jen Chan , Jiun-Yuan Wu
发明人： Hao-Chan Wei , Kuo-Li Hung , Chia-Hou Liao , Ming-Jen Chan , Jiun-Yuan Wu
IPC分类号： A45D19/04
CPC分类号： F16M11/22
摘要： A display-supporting frame includes: first rods, each of which has first and second side walls, one of the first side walls being formed with first hole units, one of the second side walls being formed with second hole units, each of the first hole units cooperating with an adjacent one of the second hole units to define a plane transverse to the first and second side walls such that each pair of the first and second hole units are respectively located at two sides of the plane; second rods, each of which is formed with a locking hole unit; and a plurality of fasteners for fastening the first rods to the second rods through extension of each of the fasteners through a selected one of the first hole units and the second hole units in a respective one of the first rods, and into the locking hole unit in a respective one of the second rods to engage the respective one of the second rods.
摘要翻译：显示支撑框架包括：第一杆，每个具有第一和第二侧壁，第一侧壁中的一个形成有第一孔单元，第二侧壁中的一个形成有第二孔单元，每个第一孔单元与相邻的第二孔单元协作以限定横向于第一和第二侧壁的平面，使得每对第一孔单元和第二孔单元分别位于平面的两侧; 第二杆，每个杆形成有锁定孔单元; 以及多个紧固件，用于通过每个紧固件通过所述第一孔中的相应一个中的所述第一孔单元和所述第二孔单元中的所选择的一个将所述第一杆紧固到所述第二杆，并且进入所述锁定孔单元在相应的一个第二杆中，以接合相应的一个第二杆。

2. 发明申请

US20070122045A1 SYSTEM FOR SCALING A PICTURE UNIT FROM A FIRST VIDEO RESOLUTION FORMAT TO A SECOND VIDEO RESOLUTION FORMAT 审中-公开
标题翻译：将图像单元从第一视频分辨率格式扩展到第二视频分辨率格式的系统
公开(公告)号：US20070122045A1
公开(公告)日：2007-05-31
申请号：US11379232
申请日：2006-04-19
申请人： Jiun-Yuan Wu
发明人： Jiun-Yuan Wu
IPC分类号： G06K9/36 , G06K9/46 , G06K9/32
CPC分类号： G06T3/4023 , G09G5/06 , G09G2340/02 , G09G2340/0407 , H04N7/0122
摘要： A system for scaling a picture unit from a first video resolution format to a second video resolution format, the picture unit being encoded utilizing a specific encoding scheme, is disclosed. The system includes: a FIFO, for buffering an encoded bit stream of the PU; a decoding circuit, coupled to the FIFO, for receiving the encoded bit stream of the PU, and decoding the encoded bit stream to generate a plurality of pixel data; a scaling circuit, coupled to the decoding circuit and the FIFO, for controlling the decoding circuit to duplicate at least a pixel data according to a scaling factor of the first video resolution format to the second video resolution format; and a look-up table, coupled to the scaling circuit and the decoding circuit, containing a plurality of values corresponding to the pixel data.
摘要翻译：公开了一种用于将图像单元从第一视频分辨率格式缩放到第二视频分辨率格式的系统，所述图像单元利用特定编码方案进行编码。该系统包括：FIFO，用于缓冲PU的编码比特流; 耦合到所述FIFO的解码电路，用于接收所述PU的编码比特流，以及解码所述编码比特流以生成多个像素数据; 耦合到所述解码电路和所述FIFO的缩放电路，用于根据所述第一视频分辨率格式的缩放因数至所述第二视频分辨率格式来控制所述解码电路至少复制至少像素数据; 以及耦合到缩放电路和解码电路的查找表，其包含对应于像素数据的多个值。

3. 发明授权

US08072465B2 Image processing method and system 有权
标题翻译：图像处理方法和系统
公开(公告)号：US08072465B2
公开(公告)日：2011-12-06
申请号：US12124227
申请日：2008-05-21
申请人： Jiun-Yuan Wu
发明人： Jiun-Yuan Wu
IPC分类号： G09G5/02 , G06T5/00 , G06T3/40 , H04N5/445 , H04N9/74 , G06K9/40 , G06K9/32 , H04N1/387 , H04N1/40 , H04N5/50
CPC分类号： G06T3/40 , G06T5/50
摘要： The invention provides the image method and apparatus to increase the sharpness of a resized image. The image includes a plurality of pixels with an alpha value and an image data. The method detects the alpha value of neighboring first and second pixels. Weighting values of interpolated pixels between the first and second pixels are determined. The image data of the interpolated pixels are set to be identical to the image data of the first pixel when one of the first pixel or the second pixel is zero.
摘要翻译：本发明提供了提高调整大小的图像的清晰度的图像方法和装置。图像包括具有α值和图像数据的多个像素。该方法检测相邻第一和第二像素的α值。确定第一和第二像素之间的内插像素的加权值。当第一像素或第二像素中的一个为零时，内插像素的图像数据被设置为与第一像素的图像数据相同。

4. 发明授权

US6100191A Method for forming self-aligned silicide layers on sub-quarter micron VLSI circuits 失效
标题翻译：在二分之一微米VLSI电路上形成自对准硅化物层的方法
公开(公告)号：US6100191A
公开(公告)日：2000-08-08
申请号：US59687
申请日：1998-04-14
申请人： Tony Lin , Water Lur , Jiun-Yuan Wu , Hsiao-Lin Lu
发明人： Tony Lin , Water Lur , Jiun-Yuan Wu , Hsiao-Lin Lu
IPC分类号： H01L21/285 , H01L21/44
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention discloses a method to manufacture a self-aligned silicide layer on a substrate. A metal oxide semiconductor (MOS) device and a shallow trench are fabricated in the substrate. The device has a gate structure, spacers of the gate structured and doping regions. The shallow trench is refilled with silicon oxide material for isolation. A silicon layer is nonconformally deposited on the top surface of the gate structure, the spacers and the doping regions by using a physical vapor deposition (PVD) process, such as ion metal plasma (IMP) process. The IMP process, like a sputtering process, is to ionize a silicon material or a refractory-metal material to silicon ions or metal ions and the ions are biased to anisotropically deposit on the top surface of the substrate. A refractory metal layer is defined on the top surface of the silicon layer by the IMP technology. A two-step thermal annealing process, such as rapid thermal annealing (RTA) process is performed to convert the silicon layer and the refractory metal layer into a silicide layer. Since the silicon layer serves as a silicon source for the salicide process, the silicide layer can form on the spacers and the silicon oxide material of the trench.
摘要翻译：本发明公开了一种在衬底上制造自对准硅化物层的方法。在衬底中制造金属氧化物半导体（MOS）器件和浅沟槽。器件具有栅极结构，栅极结构和掺杂区域的间隔物。浅沟槽用氧化硅材料再填充以进行隔离。通过使用诸如离子金属等离子体（IMP）工艺的物理气相沉积（PVD）工艺，硅层不均匀地沉积在栅极结构，间隔物和掺杂区域的顶表面上。 IMP工艺，如溅射工艺，是将硅材料或难熔金属材料离子化成硅离子或金属离子，并将离子偏置成各向异性沉积在衬底的顶表面上。难熔金属层通过IMP技术限定在硅层的顶表面上。进行两步热退火处理，例如快速热退火（RTA）工艺，以将硅层和难熔金属层转化为硅化物层。由于硅层用作自对准硅化物工艺的硅源，硅化物层可以形成在间隔物和沟槽的氧化硅材料上。

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