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    • 8. 发明授权
    • Ferroelectric memory cell with diode structure to protect the ferroelectric during read operations
    • 具有二极管结构的铁电存储器单元,用于在读取操作期间保护铁电体
    • US06670661B2
    • 2003-12-30
    • US10046123
    • 2002-01-07
    • Thomas Peter HanederHarald Bachhofer
    • Thomas Peter HanederHarald Bachhofer
    • H01L2968
    • H01L27/11502G11C11/22H01L27/1203H01L29/78391
    • A memory cell configuration includes, as a memory cell, a ferroelectric transistor having a first gate intermediate layer and a first gate electrode between source/drain regions at the surface of a semiconductor substrate. The first gate intermediate layer contains at least one ferroelectric layer. Beside the first gate intermediate layer, a second gate intermediate layer and a second gate electrode are disposed between the source/drain regions, the second gate intermediate layer containing a dielectric layer. The first gate electrode and the second gate electrode are connected to one another through a diode structure. Strip-type doped well regions are provided in the semiconductor substrate, which well regions run between the source/drain regions of the respective ferroelectric transistor.
    • 存储单元配置包括在半导体衬底的表面处的源/漏区之间具有第一栅中间层和第一栅电极的铁电晶体管作为存储单元。 第一栅极中间层包含至少一个铁电层。 在第一栅极中间层之外,第二栅极中间层和第二栅电极设置在源/漏区之间,第二栅极中间层包含电介质层。 第一栅电极和第二栅电极通过二极管结构彼此连接。 在半导体衬底中提供带状掺杂阱区,这些阱区在相应铁电晶体管的源极/漏极区之间延伸。