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    • 1. 发明授权
    • Negative bit line driver circuitry
    • 负位线驱动电路
    • US09256266B1
    • 2016-02-09
    • US13289953
    • 2011-11-04
    • Haiming YuWei ZhangHao-Yuan Howard ChouRay Ruey-Hsien Hu
    • Haiming YuWei ZhangHao-Yuan Howard ChouRay Ruey-Hsien Hu
    • G06F1/00G06F1/32
    • G06F1/3203G06F1/26G06F1/3296Y02D10/172
    • Integrated circuits with memory elements are provided. Data may be loaded into the memory elements using write driver circuitry. The write driver circuitry may be provided with a fixed positive power supply voltage and an time-varying ground power supply voltage that is less than the positive power supply voltage. The time-varying ground power supply voltage may be generated using programmable power supply circuitry. The programmable power supply circuitry may include a pulse generation circuit and a configurable capacitive circuit. The pulse generation circuit may output a pulse signal to the capacitive circuit. In response to receiving the pulse signal, the capacitive circuit may push the time-varying ground power supply voltage to a negative value. The time-varying ground power supply voltage may be driven below zero volts for at least a portion of a write cycle to help improve write margins and increase memory yield.
    • 提供具有存储元件的集成电路。 可以使用写入驱动器电路将数据加载到存储器元件中。 写驱动器电路可以具有小于正电源电压的固定正电源电压和时变接地电源电压。 可以使用可编程电源电路产生时变接地电源电压。 可编程电源电路可以包括脉冲发生电路和可配置电容电路。 脉冲发生电路可以向电容电路输出脉冲信号。 响应于接收脉冲信号,电容电路可以将时变接地电源电压推到负值。 对于写周期的至少一部分,时变接地电源电压可以被驱动到低于零伏特,以帮助改善写入裕度并增加存储器产量。
    • 2. 发明授权
    • Programmable addressing circuitry for increasing memory yield
    • 可编程寻址电路,用于提高内存产量
    • US08483006B1
    • 2013-07-09
    • US13234990
    • 2011-09-16
    • Hao-Yuan Howard ChouWei ZhangHaiming Yu
    • Hao-Yuan Howard ChouWei ZhangHaiming Yu
    • G11C8/00G11C11/00G11C5/14
    • G11C11/418G11C11/412
    • Integrated circuits with memory elements are provided. A memory element may include a storage circuit coupled to data lines through access transistors. The access transistors may have gates that are controlled by an address signal. The address signal may be asserted during read/write operations to turn on the access transistors so that read/write data can be passed through the access transistors. The voltage level to which the address signal is raised during read/write operations may be adjusted using programmable voltage biasing circuitry. A number of integrated circuits may be tested during device characterization procedures to determine the amount by which the address signal should be adjusted using the programmable voltage biasing circuit so that the memory elements in the integrated circuits satisfy design criteria.
    • 提供具有存储元件的集成电路。 存储元件可以包括通过存取晶体管耦合到数据线的存储电路。 存取晶体管可以具有由地址信号控制的栅极。 在读/写操作期间可以断言地址信号以接通存取晶体管,使得读/写数据可以通过存取晶体管。 可以使用可编程电压偏置电路来调整在读/写操作期间提高地址信号的电压电平。 可以在器件表征过程期间测试多个集成电路,以确定使用可编程电压偏置电路来调整地址信号的量,使得集成电路中的存储元件满足设计标准。