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1. 发明申请

US20160124227A1 SYSTEM AND METHOD FOR MOUNTING HEADS-UP DISPLAY MODULES 审中-公开
标题翻译：用于安装显示模块的系统和方法
公开(公告)号：US20160124227A1
公开(公告)日：2016-05-05
申请号：US14530660
申请日：2014-10-31
申请人： Hai Yong Zhang , Wenfeng Zhang , Chenchen Zheng , Peng Shao , Jia Chi Wu , Jia Ning Zhao , David Pommerenke
发明人： Hai Yong Zhang , Wenfeng Zhang , Chenchen Zheng , Peng Shao , Jia Chi Wu , Jia Ning Zhao , David Pommerenke
IPC分类号： G02B27/01
CPC分类号： G02B27/0149 , G02B27/0176 , G02B2027/0169 , G02B2027/0198
摘要： A device comprising means for engaging said device to at least a portion of an outside surface of a glass of a headwear, means for engaging said device to at least a portion of an inside surface of glass of said headwear, means for mounting a display module or video capturing device and said means for engaging said device to at least a portion of an inside surface of a headwear to said device, and means for adjusting a viewing angle of said display module or video capturing device with a generally 360 degrees rotation.
摘要翻译：一种装置，包括用于将所述装置接合到头饰玻璃的外表面的至少一部分的装置，用于将所述装置接合到所述头饰的玻璃的内表面的至少一部分的装置，用于安装显示模块或视频捕获装置，以及用于将所述装置接合到所述装置的头饰的内表面的至少一部分的装置，以及用于通常以360度旋转调节所述显示模块或视频捕获装置的视角的装置。

2. 发明申请

US20120049834A1 CIRCUIT AND METHOD TO SUPPRESS THE PARASITIC RESONANCE FROM A DC/DC CONVERTER 审中-公开
标题翻译：从DC / DC转换器抑制PARASITIC共振的电路和方法
公开(公告)号：US20120049834A1
公开(公告)日：2012-03-01
申请号：US13318580
申请日：2010-05-07
申请人： David Pommerenke , Keong Kam , Ankit Bhargava , Peng Shao , Xin Chang , Hongyu Li
发明人： David Pommerenke , Keong Kam , Ankit Bhargava , Peng Shao , Xin Chang , Hongyu Li
IPC分类号： G05F3/08 , H01F41/02
CPC分类号： H02M1/34 , H02M2001/348 , Y10T29/4902
摘要： A snubber circuit for use with a DC/DC converter broadly comprises a snubber resistor connected in parallel with a snubber inductor. The DC/DC converter may include a voltage source, a first switching element, a second switching element, an output inductor, and an output capacitor. The voltage source may include a positive terminal and a negative terminal connected to a ground node. The first switching element may include a first terminal connected to the positive terminal of the voltage source The second switching element may be connected to a second terminal of the first switching element. The series combination of the output inductor and the output capacitor may be connected between the second terminal of the first switching element and the ground node. The snubber circuit may be connected between the second switching element and the ground node.
摘要翻译：用于DC / DC转换器的缓冲电路广泛地包括与缓冲电感器并联连接的缓冲电阻器。 DC / DC转换器可以包括电压源，第一开关元件，第二开关元件，输出电感器和输出电容器。电压源可以包括连接到接地节点的正极端子和负极端子。第一开关元件可以包括连接到电压源的正极端子的第一端子。第二开关元件可以连接到第一开关元件的第二端子。输出电感器和输出电容器的串联组合可以连接在第一开关元件的第二端子和接地节点之间。缓冲电路可以连接在第二开关元件和接地节点之间。

3. 发明申请

US20090248984A1 METHOD AND DEVICE FOR PERFORMING COPY-ON-WRITE IN A PROCESSOR 审中-公开
标题翻译：用于在处理器中执行复写的方法和设备
公开(公告)号：US20090248984A1
公开(公告)日：2009-10-01
申请号：US12410325
申请日：2009-03-24
申请人： Xiao Wei Shen , Hua Yong Wang , Wen Bo Shen , Peng Shao
发明人： Xiao Wei Shen , Hua Yong Wang , Wen Bo Shen , Peng Shao
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0884 , G06F12/0811
摘要： There are disclosed a method and device for performing Copy-on-Write in a processor. The processor comprises: processor cores, L1 caches each of which is logically divided into a first L1 cache and a second L1 cache, and L2 caches. The first L1 cache is used for saving new data value, and the second L1 cache for saving old data value. The method can comprise the steps of: in response to a store operation from said processor core, judging whether a corresponding cache line in said L2 cache has been modified; if it is determined a corresponding L2 cache line in said L2 cache has not been modified, copying old data value in the corresponding L2 cache line to said second L1 cache, and writing new data value to the corresponding L2 cache line; and if it is determined a corresponding L2 cache line in said L2 cache has been modified, writing new data value to the corresponding L2 cache line directly.
摘要翻译：公开了一种用于在处理器中执行写时复制的方法和装置。处理器包括：处理器核心，L1高速缓存，其中每个高速缓存被逻辑地划分为第一L1高速缓存和第二L1高速缓存以及L2高速缓存。第一个L1缓存用于保存新数据值，第二个L1缓存用于保存旧数据值。该方法可以包括以下步骤：响应于来自所述处理器核心的存储操作，判断所述L2高速缓存中的相应高速缓存行是否已被修改; 如果确定所述L2高速缓存中的对应的L2高速缓存行尚未被修改，则将相应的L2高速缓存行中的旧数据值复制到所述第二L1高速缓存，并将新的数据值写入对应的L2高速缓存行; 并且如果确定了所述L2高速缓存中的对应的L2高速缓存行已被修改，则将新的数据值直接写入对应的L2高速缓存行。

4. 发明申请

US20200276529A1 COMPOSITE CERAMIC FILTER MATERIAL FOR HIGH TEMPERATURE FLUE GAS DUST REMOVAL 审中-公开
公开(公告)号：US20200276529A1
公开(公告)日：2020-09-03
申请号：US16765468
申请日：2018-08-23
申请人： Peng Shao
发明人： Peng Shao
IPC分类号： B01D39/20 , B01D46/00 , C01B32/984
摘要： The invention provides a composite ceramic filter material for high temperature flue gas dust removal, wherein the filter material is prepared by the following method: provide corn stalk raw material and silicon powder; crush the corn stalk raw material and pyrolyze the crushed corn stalk raw material to obtain carbonized corn stalks; spread silicon powders on, the corn stalk raw material to obtain mixed powder, perform first high-temperature heat treatment on the mixed powder to obtain silicon carbide powder; add silicon carbide powder into ethanol; add PVB to the ethanol suspension of silicon carbide to obtain a dispersion solution of silicon carbide; perform surface treatment on the aluminum alloy base material; porous silicon carbide film is formed on the surface of the surface treated aluminum alloy by air spraying technology; perform pre-sintering on the porous silicon carbide film; perform sintering on the pre-sintered porous silicon carbide film.

5. 发明申请

US20200001222A1 COMPOSITE CERAMIC FILTER MATERIAL FOR HIGH TEMPERATURE FLUE GAS DUST REMOVAL 审中-公开
公开(公告)号：US20200001222A1
公开(公告)日：2020-01-02
申请号：US16560996
申请日：2019-09-04
申请人： Peng Shao
发明人： Peng Shao
IPC分类号： B01D46/24 , C04B38/00
摘要： The invention provides a composite ceramic filter material for high temperature flue gas dust removal, wherein the filter material is prepared by the following method: provide corn stalk raw material and silicon powder, crush the corn stalk raw material and pyrolyze the crushed corn stalk raw material to obtain carbonized corn stalks; spread silicon powders on the corn stalk raw material to obtain mixed powder; perform first high-temperature heat treatment on the mixed powder to obtain silicon carbide powder; add silicon carbide powder into ethanol; add PVB to the ethanol suspension of silicon carbide to obtain a dispersion solution of silicon carbide; perform surface treatment on the aluminum alloy base material; porous silicon carbide film is formed on the surface of the surface treated aluminum alloy by air spraying technology; perform pre-sintering on the porous silicon carbide film; perform sintering on the pre-sintered porous silicon carbide film.

6. 发明申请

US20080288691A1 METHOD AND APPARATUS OF LOCK TRANSACTIONS PROCESSING IN SINGLE OR MULTI-CORE PROCESSOR 审中-公开
标题翻译：单个或多个核心处理器的锁定交易处理方法与装置
公开(公告)号：US20080288691A1
公开(公告)日：2008-11-20
申请号：US12115643
申请日：2008-05-06
申请人： Xiao Yuan Bie , Yi Ge , Zhiyong Liang , Peng Shao , Wen Bo Shen
发明人： Xiao Yuan Bie , Yi Ge , Zhiyong Liang , Peng Shao , Wen Bo Shen
IPC分类号： G06F12/14
CPC分类号： G06F9/526 , G06F2209/521 , G06F2209/522
摘要： The present invention relates to a method and apparatus of lock transactions processing in a single or multi-core processor. An embodiment of the present invention is a processor with one or more processing cores, an address arbitrator, where one or more processing cores are configured to submit a lock transaction request to the address arbitrator corresponding to a specific instruction in response to the execution of the specific instruction. The lock transaction request includes a lock variable address asserted on an address bus. The processor further includes a lock controller for performing lock transaction processing in response to the lock transaction request, and notifying processing result to the processing core from which the lock transaction request was sent. The processor further includes a switching device, coupled to the address arbitrator and the lock controller, for identifying the lock transaction request and notifying the lock transaction request to the lock controller.
摘要翻译：本发明涉及一种在单核或多核处理器中锁交易处理的方法和装置。本发明的实施例是具有一个或多个处理核心的处理器，地址仲裁器，其中一个或多个处理核心被配置为响应于执行该特定指令而向与地址仲裁器相对应的特定指令提交锁交易请求具体说明。锁交易请求包括在地址总线上断言的锁定变量地址。该处理器还包括一个锁定控制器，用于响应锁定事务请求执行锁定事务处理，并将处理结果通知处理核心，锁定事务请求被发送到该处理核心。处理器还包括耦合到地址仲裁器和锁定控制器的交换设备，用于识别锁交易请求并通知锁定控制器的锁定事务请求。

7. 发明授权

US09658824B1 Extracting topics from customer review search queries 有权
公开(公告)号：US09658824B1
公开(公告)日：2017-05-23
申请号：US13540149
申请日：2012-07-02
申请人： Peng Shao , Le Huang , Madhu M. Kurup
发明人： Peng Shao , Le Huang , Madhu M. Kurup
IPC分类号： G06F7/00 , G06F17/30
CPC分类号： G06F17/3053 , G06F7/00 , G06F17/30 , G06F17/30312 , G06F17/30554 , G06F17/30616 , G06F17/30864
摘要： Relevant topics for an item may be extracted from customer review search queries. Customer review search queries are obtained from customers to search a collection of customer reviews for a specific item. Relevant topics for the specific item are extracted by analyzing the queries. A user interface is generated based at least in part on at least some of the relevant topics.

8. 发明授权

US09563259B2 Apparatus and method for activating and shutting down individual enhanced pipeline stages based on stage priority and performance requirements 有权
标题翻译：基于阶段优先级和性能要求激活和关闭各个增强流水线阶段的装置和方法
公开(公告)号：US09563259B2
公开(公告)日：2017-02-07
申请号：US12357910
申请日：2009-01-22
申请人： Wen Bo Shen , Peng Shao , Yu Li , Xiao Tao Chang , Yi Ge , Huayong Wang , Huan Hao Zou
发明人： Wen Bo Shen , Peng Shao , Yu Li , Xiao Tao Chang , Yi Ge , Huayong Wang , Huan Hao Zou
IPC分类号： G06F1/32 , G06F9/30 , G06F11/30 , G06F9/38 , G06F9/48
CPC分类号： G06F1/3287 , G06F9/3867 , G06F9/3885 , G06F9/4818 , G06F11/30 , G06F13/18 , Y02D10/14
摘要： The present invention discloses a pipeline-based central processing unit, wherein the pipeline is partitioned into base pipeline stages and enhanced pipeline stages according to functions, the base pipeline stages being activated all the while, and the enhanced pipeline stages being activated or shutdown according to requirements for performance of a workload. The present invention further discloses a pipeline-based central processing unit, wherein the pipeline is partitioned into base pipeline stages and enhanced pipeline stages according to functions, each pipeline stage being partitioned into a base module and at least one enhanced module, the base module being activated all the while, and the enhanced module being activated or shutdown according to requirements for performance of a workload.
摘要翻译：本发明公开了一种基于流水线的中央处理单元，其特征在于，根据功能，将流水线划分为基本流水线阶段和增强流水线阶段，基础流水线段同时被激活，而增强流水线阶段根据对工作负载的性能要求。本发明还公开了一种基于流水线的中央处理单元，其中根据功能将流水线划分为基本流水线阶段和增强流水线阶段，每个流水线分段分为基本模块和至少一个增强模块，基模块为激活所有时间，增强模块根据工作负载的性能要求被激活或关闭。

9. 发明申请

US20090295405A1 RESONANCE SCANNING SYSTEM AND METHOD FOR TESTING EQUIPMENT FOR ELECTROMAGNETIC RESONANCES 有权
标题翻译：谐振扫描系统和电磁谐振测试装置的方法
公开(公告)号：US20090295405A1
公开(公告)日：2009-12-03
申请号：US12476249
申请日：2009-06-01
申请人： David J. Pommerenke , Wei Huang , Peng Shao , Jiang Xiao
发明人： David J. Pommerenke , Wei Huang , Peng Shao , Jiang Xiao
IPC分类号： G01R27/28
CPC分类号： G01R31/002 , G01R29/0878
摘要： A resonance scanning system and method for testing equipment for electromagnetic resonances uses a resonance detection subsystem with at least one probe to identify at least one of a resonating location, a resonating frequency and a quality factor of a resonance of the equipment and an automatic scanning subsystem to displace the probe to different testing locations of the equipment so that the resonance detection subsystem can determine if any of the different testing locations of the equipment exhibits electromagnetic resonances.
摘要翻译：用于测试电磁谐振设备的共振扫描系统和方法使用具有至少一个探头的谐振检测子系统来识别设备的谐振位置，共振频率和谐振频率和质量因素中的至少一个以及自动扫描子系统将探针移位到设备的不同测试位置，使得共振检测子系统可以确定设备中的任何不同的测试位置是否呈现电磁谐振。

10. 发明申请

US20090193424A1 METHOD OF PROCESSING INSTRUCTIONS IN PIPELINE-BASED PROCESSOR AND CORRESPONDING PROCESSOR 有权
标题翻译：基于管道处理器和相应处理器的处理指令的方法
公开(公告)号：US20090193424A1
公开(公告)日：2009-07-30
申请号：US12357910
申请日：2009-01-22
申请人： Wen Bo Shen , Peng Shao , Yu Li , Xiao Tao Chang , Yi Ge , Huayong Wang , Huan Hao Zou
发明人： Wen Bo Shen , Peng Shao , Yu Li , Xiao Tao Chang , Yi Ge , Huayong Wang , Huan Hao Zou
IPC分类号： G06F9/46
CPC分类号： G06F1/3287 , G06F9/3867 , G06F9/3885 , G06F9/4818 , G06F11/30 , G06F13/18 , Y02D10/14
摘要： The present invention discloses a method of processing instructions in a pipeline-based central processing unit, wherein the pipeline is partitioned into base pipeline stages and enhanced pipeline stages according to functions, the base pipeline stages being activated all the while, and the enhanced pipeline stages being activated or shutdown according to requirements for performance of a workload. The present invention further discloses a method of processing instructions in a pipeline-based central processing unit, wherein the pipeline is partitioned into base pipeline stages and enhanced pipeline stages according to functions, each pipeline stage being partitioned into a base module and at least one enhanced module, the base module being activated all the while, and the enhanced module being activated or shutdown according to requirements for performance of a workload.
摘要翻译：本发明公开了一种在基于流水线的中央处理单元中处理指令的方法，其中根据功能将流水线划分为基本流水线阶段和增强流水线阶段，基本流水线阶段同时被激活，增强的流水线阶段根据工作负载的性能要求被激活或关闭。本发明还公开了一种在基于流水线的中央处理单元中处理指令的方法，其中根据功能将流水线划分成基本流水线级和增强的流水线级，每个流水线级分为基模块和至少一增强型模块，基本模块一直被激活，并且增强模块根据工作负载的性能要求被激活或关闭。

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