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1. 发明授权

US07489354B2 CMOS active pixel with hard and soft reset 有权
公开(公告)号：US07489354B2
公开(公告)日：2009-02-10
申请号：US10752112
申请日：2004-01-06
申请人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
发明人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
IPC分类号： H04N5/335
CPC分类号： H04N5/3597 , H04N5/363 , H04N5/3698 , H04N5/374 , H04N5/3745
摘要： A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.

2. 发明授权

US07446805B2 CMOS active pixel with hard and soft reset 有权
标题翻译： CMOS有源像素，硬复位和软复位
公开(公告)号：US07446805B2
公开(公告)日：2008-11-04
申请号：US10752131
申请日：2004-01-06
申请人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
发明人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
IPC分类号： H04N5/217
CPC分类号： H04N5/3597 , H04N5/363 , H04N5/3698 , H04N5/374 , H04N5/3745
摘要： A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.
摘要翻译：用于成像阵列中的像素位置的电路包括将入射光转换为光电流的光检测元件和可操作地连接到光检测元件的复位晶体管，以复位与光检测元件相关联的电压。复位晶体管硬复位与光检测元件相关联的电压，并且在与光检测元件相关联的电压的硬复位产生之后，软复位与光检测元件相关联的电压。通过将列或行线电压硬复位到第一预定电压也测量列或行线的像素电压; 将列或行线电压软复位为第一像素电压; 将列或行线电压硬复位到第二预定电压; 将列或行线电压软复位到第二像素电压; 以及确定所述第一和第二像素电压之间的差，所述差是所测量的像素电压。

3. 发明授权

US07489355B2 CMOS active pixel with hard and soft reset 有权
标题翻译： CMOS有源像素，硬复位和软复位
公开(公告)号：US07489355B2
公开(公告)日：2009-02-10
申请号：US10752197
申请日：2004-01-06
申请人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
发明人： Hae-Seung Lee , Keith Glen Fife , Lane G. Brooks , Jungwook Yang
IPC分类号： H04N5/335
CPC分类号： H04N5/3597 , H04N5/363 , H04N5/3698 , H04N5/374 , H04N5/3745
摘要： A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.
摘要翻译：用于成像阵列中的像素位置的电路包括将入射光转换为光电流的光检测元件和可操作地连接到光检测元件的复位晶体管，以复位与光检测元件相关联的电压。复位晶体管硬复位与光检测元件相关联的电压，并且在与光检测元件相关联的电压的硬复位产生之后，软复位与光检测元件相关联的电压。通过将列或行线电压硬复位到第一预定电压也测量列或行线的像素电压; 将列或行线电压软复位为第一像素电压; 将列或行线电压硬复位到第二预定电压; 将列或行线电压软复位到第二像素电压; 以及确定所述第一和第二像素电压之间的差，所述差是所测量的像素电压。

4. 发明申请

US20050083422A1 CMOS active pixel with hard and soft reset 有权
标题翻译： CMOS有源像素，硬复位和软复位
公开(公告)号：US20050083422A1
公开(公告)日：2005-04-21
申请号：US10752112
申请日：2004-01-06
申请人： Hae-Seung Lee , Keith Fife , Lane Brooks , Jungwook Yang
发明人： Hae-Seung Lee , Keith Fife , Lane Brooks , Jungwook Yang
IPC分类号： H04N5/353 , H04N5/355 , H04N5/359 , H04N5/363 , H04N5/374 , H04N5/335
CPC分类号： H04N5/3597 , H04N5/363 , H04N5/3698 , H04N5/374 , H04N5/3745
摘要： A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.
摘要翻译：用于成像阵列中的像素位置的电路包括将入射光转换为光电流的光检测元件和可操作地连接到光检测元件的复位晶体管，以复位与光检测元件相关联的电压。复位晶体管硬复位与光检测元件相关联的电压，并且在与光检测元件相关联的电压的硬复位产生之后，软复位与光检测元件相关联的电压。通过将列或行线电压硬复位到第一预定电压也测量列或行线的像素电压; 将列或行线电压软复位为第一像素电压; 将列或行线电压硬复位到第二预定电压; 将列或行线电压软复位到第二像素电压; 以及确定所述第一和第二像素电压之间的差，所述差是所测量的像素电压。

5. 发明授权

US08796036B2 Method and system for delta double sampling 有权
公开(公告)号：US08796036B2
公开(公告)日：2014-08-05
申请号：US13173851
申请日：2011-06-30
申请人： Keith Fife , Jungwook Yang
发明人： Keith Fife , Jungwook Yang
IPC分类号： G01N15/06 , G01N27/414
CPC分类号： G01N27/4148 , H03K5/003 , Y10S436/806 , Y10S436/807 , Y10T436/11
摘要： An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.

6. 发明授权

US08487790B2 Chemical detection circuit including a serializer circuit 有权
标题翻译：化学检测电路包括串行化电路
公开(公告)号：US08487790B2
公开(公告)日：2013-07-16
申请号：US13174562
申请日：2011-06-30
申请人： Keith Fife , Jungwook Yang
发明人： Keith Fife , Jungwook Yang
IPC分类号： H03M9/00
CPC分类号： G01N27/4148 , C12Q1/6869 , G01J1/46 , G01N27/4143 , G01N27/4145 , G01N33/00 , G01R29/26 , H01L27/14609 , H01L27/14632 , H01L27/14643 , H01L29/66 , H01L2924/0002 , H04N5/374 , Y10T436/25875 , H01L2924/00
摘要： The described embodiments may provide a chemical detection circuit. The chemical detection circuit may comprise a pixel array, a pair of analog-to-digital converter (ADC) circuit blocks, a pair of input/output (I/O) circuit blocks coupled to the pair of ADC circuit blocks respectively, and a plurality of serial link terminals coupled to the pair of IO circuit blocks. The pixel array may comprise a plurality of chemically-sensitive pixels formed in columns and rows. Each chemically-sensitive pixel may comprise: a chemically-sensitive transistor, and a row selection device.
摘要翻译：所描述的实施例可以提供化学检测电路。化学检测电路可以包括像素阵列，一对模数转换器（ADC）电路块，分别耦合到该对ADC电路块的一对输入/输出（I / O）电路块，以及一耦合到所述一对IO电路块的多个串行链路终端。像素阵列可以包括以列和行形成的多个化学敏感像素。每个化学敏感像素可以包括：化学敏感晶体管和行选择器件。

7. 发明授权

US06985169B1 Image capture system for mobile communications 失效
标题翻译：用于移动通信的图像捕获系统
公开(公告)号：US06985169B1
公开(公告)日：2006-01-10
申请号：US09021176
申请日：1998-02-09
申请人： Zhong John Deng , Sudhir Muniswamy Gowda , John P. Karidis , Dale Jonathan Pearson , Rama Nand Singh , Hon-Sum Philip Wong , Jungwook Yang
发明人： Zhong John Deng , Sudhir Muniswamy Gowda , John P. Karidis , Dale Jonathan Pearson , Rama Nand Singh , Hon-Sum Philip Wong , Jungwook Yang
IPC分类号： H04N7/18 , H04N7/14
CPC分类号： H04N1/00307 , H04N1/00315 , H04N1/00347 , H04N1/19594 , H04N2201/0084 , H04N2201/0086
摘要： An image capture system for mobile communications systems includes an imaging device for capturing optical image data and a data transfer apparatus coupled to a communications device communications device for transferring the optical image data to the communications device for transmittal over a communications network.
摘要翻译：用于移动通信系统的图像捕获系统包括用于捕获光学图像数据的成像设备和耦合到通信设备通信设备的数据传送设备，用于将光学图像数据传送到通信设备以通过通信网络传输。

8. 发明授权

US06630864B2 Linear variable gain amplifiers 失效
公开(公告)号：US06630864B2
公开(公告)日：2003-10-07
申请号：US10341020
申请日：2003-01-13
申请人： Jungwook Yang
发明人： Jungwook Yang
IPC分类号： H03F345
CPC分类号： H03F3/45089 , H03F3/45098 , H03F3/45502 , H03F2203/45646 , H03F2203/45702
摘要： A system and method of controlling the operation of linear variable-gain amplifiers to allow for such linear variable gain amplifiers to have a wider operating range at high current levels, control inputs for selectable gains and improved low-voltage operation. In a first mode, the amplifier includes an additional source of current to allow for an enhanced operating range. In a second embodiment, the amplifier includes a plurality of selective resistive levels and a selection system which allows the selection of one of the resistive levels which, in turn, controls the gain range of the amplifier system of the present invention. A third embodiment of the present invention illustrates the use of an amplifier system useful for a low voltage input signal to reduce errors caused by variations in the base to emitter in the two transistors providing the amplification. Also disclosed are embodiments for reducing the error in the amplifier output by providing additional stages to provide error reducing components which are added to the amplifier output.

9. 发明授权

US06563382B1 Linear variable gain amplifiers 有权
标题翻译：线性可变增益放大器
公开(公告)号：US06563382B1
公开(公告)日：2003-05-13
申请号：US09685813
申请日：2000-10-10
申请人： Jungwook Yang
发明人： Jungwook Yang
IPC分类号： H03F345
CPC分类号： H03F3/45089 , H03F3/45098 , H03F3/45502 , H03F2203/45646 , H03F2203/45702
摘要： A system and method of controlling the operation of linear variable-gain amplifiers to allow for such linear variable gain amplifiers to have a wider operating range at high current levels, control inputs for selectable gains and improved low-voltage operation. In a first mode, the amplifier includes an additional source of current to allow for an enhanced operating range. In a second embodiment, the amplifier includes a plurality of selective resistive levels and a selection system which allows the selection of one of the resistive levels which, in turn, controls the gain range of the amplifier system of the present invention. A third embodiment of the present invention illustrates the use of an amplifier system useful for a low voltage input signal to reduce errors caused by variations in the base to emitter in the two transistors providing the amplification. Also disclosed are embodiments for reducing the error in the amplifier output by providing additional stages to provide error reducing components which are added to the amplifier output.
摘要翻译：控制线性可变增益放大器的操作的系统和方法，以允许这种线性可变增益放大器在高电流水平下具有更宽的工作范围，控制输入以获得可选择的增益和改进的低电压操作。在第一模式中，放大器包括额外的电流源以允许增强的操作范围。在第二实施例中，放大器包括多个选择性电阻电平和选择系统，其允许选择电阻电平中的一个，这进而控制本发明的放大器系统的增益范围。本发明的第三实施例示出了对于低电压输入信号有用的放大器系统的用途，以减少由提供放大的两个晶体管中的基极到发射极的变化引起的误差。还公开了用于通过提供附加级来提供放大器输出中的误差减小部件来减小放大器输出中的误差的实施例。

10. 发明授权

US06429691B1 Differential-input circuit 失效
标题翻译：差分输入电路
公开(公告)号：US06429691B1
公开(公告)日：2002-08-06
申请号：US09751508
申请日：2000-12-29
申请人： Jungwook Yang
发明人： Jungwook Yang
IPC分类号： H03K1920
CPC分类号： H03K19/017527
摘要： A circuit provides differential logic signals and includes a differential-input circuit having a first differential input and a second differential input. A first unit receives an input voltage signal and a supply voltage for providing a first voltage to the first differential input via a first node. A second unit receives the supply voltage for providing a second voltage to the second differential input via a second node. The differential-input circuit outputs a signal in accordance with the first and second voltages.
摘要翻译：电路提供差分逻辑信号，并且包括具有第一差分输入和第二差分输入的差分输入电路。第一单元接收输入电压信号和用于经由第一节点向第一差分输入提供第一电压的电源电压。第二单元接收用于经由第二节点向第二差分输入提供第二电压的电源电压。差分输入电路根据第一和第二电压输出信号。

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