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1. 发明申请

US20070001241A1 Semiconductor devices having nitrogen-incorporated active region and methods of fabricating the same 有权
标题翻译：具有氮结合有源区的半导体器件及其制造方法
公开(公告)号：US20070001241A1
公开(公告)日：2007-01-04
申请号：US11396702
申请日：2006-04-04
申请人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung , Yun Kim , Min Kim
发明人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung , Yun Kim , Min Kim
IPC分类号： H01L29/94
CPC分类号： H01L21/823807 , H01L21/823857
摘要： A semiconductor device may include a semiconductor substrate having a first region and a second region. The nitrogen-incorporated active region may be formed within the first region. A first gate electrode may be formed on the nitrogen-incorporated active region. A first gate dielectric layer may be interposed between the nitrogen-incorporated active region and the first gate electrode. The first gate dielectric layer may include a first dielectric layer and a second dielectric layer. The second dielectric layer may be a nitrogen contained dielectric layer. A second gate electrode may be formed on the second region. A second gate dielectric layer may be interposed between the second region and the second gate electrode. The first gate dielectric layer may have the same or substantially the same thickness as the second gate dielectric layer, and the nitrogen contained dielectric layer may contact with the nitrogen-incorporated active region.
摘要翻译：半导体器件可以包括具有第一区域和第二区域的半导体衬底。可以在第一区域内形成含氮的有源区。可以在引入氮的有源区上形成第一栅电极。第一栅极电介质层可插入在引入氮的有源区和第一栅电极之间。第一栅介质层可以包括第一介电层和第二介电层。第二电介质层可以是含氮介电层。第二栅极电极可以形成在第二区域上。可以在第二区域和第二栅电极之间插入第二栅极电介质层。第一栅极介电层可以具有与第二栅极介电层相同或基本相同的厚度，并且含氮介电层可以与引入氮的有源区接触。

2. 发明授权

US08013402B2 Transistors with multilayered dielectric films 有权
标题翻译：具有多层介电膜的晶体管
公开(公告)号：US08013402B2
公开(公告)日：2011-09-06
申请号：US12574912
申请日：2009-10-07
申请人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
发明人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
IPC分类号： H01L21/02
CPC分类号： H01L21/28185 , H01L21/28079 , H01L21/28194 , H01L21/28202 , H01L21/823857 , H01L29/495 , H01L29/513 , H01L29/517
摘要： Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.
摘要翻译：提供了在通道区域上包括多层电介质膜的晶体管。多层电介质包括下电介质膜，该电介质膜的厚度至少为多层电介质膜的厚度的50％，并且包括金属氧化物，金属硅酸盐，铝酸盐或其混合物，以及上电介质膜在下介电膜上，上电介质膜包含III族金属氧化物，III族金属氮化物，第ⅩⅢ族金属氧化物或第ⅩⅢ族金属氮化物。在多层电介质膜上设置栅电极。

3. 发明授权

US07767512B2 Methods of manufacturing a semiconductor device including CMOS transistor having different PMOS and NMOS gate electrode structures 有权
标题翻译：制造包括具有不同PMOS和NMOS栅电极结构的CMOS晶体管的半导体器件的方法
公开(公告)号：US07767512B2
公开(公告)日：2010-08-03
申请号：US12019449
申请日：2008-01-24
申请人： Hyung-Suk Jung , Jong-Ho Lee , Sung-Kee Han , Yun-Ki Choi , Ha Jin Lim
发明人： Hyung-Suk Jung , Jong-Ho Lee , Sung-Kee Han , Yun-Ki Choi , Ha Jin Lim
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28026 , H01L29/49
摘要： In a method of manufacturing a semiconductor device, a gate insulation layer is formed on a substrate including a first channel of a first conductive type and a second channel of a second conductive type different from the first conductive type. A first conductive layer including a first metal is formed on the gate insulation layer, and a second conductive layer including a second metal different from the first metal is formed on the first conductive layer formed over the second channel. The second conductive layer is partially removed by a wet etching process to form a second conductive layer pattern over the second channel.
摘要翻译：在制造半导体器件的方法中，在包括第一导电类型的第一沟道和不同于第一导电类型的第二导电类型的第二沟道的衬底上形成栅极绝缘层。在栅极绝缘层上形成包括第一金属的第一导电层，并且在形成在第二沟道上的第一导电层上形成包括不同于第一金属的第二金属的第二导电层。通过湿式蚀刻工艺部分去除第二导电层，以在第二通道上形成第二导电层图案。

4. 发明申请

US20070200160A1 Semiconductor device and method of fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070200160A1
公开(公告)日：2007-08-30
申请号：US11650290
申请日：2007-01-05
申请人： Hyung-Suk Jung , Jong-Ho Lee , Ha-Jin Lim , Mi-Young Yu
发明人： Hyung-Suk Jung , Jong-Ho Lee , Ha-Jin Lim , Mi-Young Yu
IPC分类号： H01L29/94
CPC分类号： H01L21/26506 , H01L21/2658 , H01L21/28088 , H01L21/28097 , H01L21/823807 , H01L21/823857 , H01L29/105 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： A semiconductor device includes a semiconductor substrate comprising an active area where a first conductive channel is formed, a gate electrode formed on the active area formed on the semiconductor substrate and a gate dielectric layer interposed between the active area and the gate electrode. The semiconductor device further includes a charge generating layer formed along the interface between the active area and the gate dielectric layer on the semiconductor substrate so that fixed charges are generated around the interface.
摘要翻译：半导体器件包括半导体衬底，其包括形成有第一导电沟道的有源区，形成在形成于半导体衬底上的有源区上的栅电极和介于有源区和栅电极之间的栅介质层。半导体器件还包括沿着半导体衬底上的有源区和栅介电层之间的界面形成的电荷产生层，从而在界面周围产生固定电荷。

5. 发明申请

US20100025781A1 Transistors with Multilayered Dielectric Films and Methods of Manufacturing Such Transistors 有权
标题翻译：具有多层介质膜的晶体管及其制造方法
公开(公告)号：US20100025781A1
公开(公告)日：2010-02-04
申请号：US12574912
申请日：2009-10-07
申请人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
发明人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
IPC分类号： H01L29/78 , H01L21/31
CPC分类号： H01L21/28185 , H01L21/28079 , H01L21/28194 , H01L21/28202 , H01L21/823857 , H01L29/495 , H01L29/513 , H01L29/517
摘要： Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.
摘要翻译：提供了在通道区域上包括多层电介质膜的晶体管。多层电介质包括下电介质膜，该电介质膜的厚度至少为多层电介质膜的厚度的50％，并且包括金属氧化物，金属硅酸盐，铝酸盐或其混合物，以及上电介质膜在下介电膜上，上电介质膜包含III族金属氧化物，III族金属氮化物，第ⅩⅢ族金属氧化物或第ⅩⅢ族金属氮化物。在多层电介质膜上设置栅电极。

6. 发明授权

US07615830B2 Transistors with multilayered dielectric films 有权
标题翻译：具有多层介电膜的晶体管
公开(公告)号：US07615830B2
公开(公告)日：2009-11-10
申请号：US11252514
申请日：2005-10-18
申请人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
发明人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
IPC分类号： H01L21/8238
CPC分类号： H01L21/28185 , H01L21/28079 , H01L21/28194 , H01L21/28202 , H01L21/823857 , H01L29/495 , H01L29/513 , H01L29/517
摘要： Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.
摘要翻译：提供了在通道区域上包括多层电介质膜的晶体管。多层电介质包括下电介质膜，该电介质膜的厚度至少为多层电介质膜的厚度的50％，并且包括金属氧化物，金属硅酸盐，铝酸盐或其混合物，以及上电介质膜在下介电膜上，上电介质膜包含III族金属氧化物，III族金属氮化物，第ⅩⅢ族金属氧化物或第ⅩⅢ族金属氮化物。在多层电介质膜上设置栅电极。

7. 发明授权

US07547951B2 Semiconductor devices having nitrogen-incorporated active region and methods of fabricating the same 有权
标题翻译：具有氮结合有源区的半导体器件及其制造方法
公开(公告)号：US07547951B2
公开(公告)日：2009-06-16
申请号：US11396702
申请日：2006-04-04
申请人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung , Yun Seok Kim , Min Joo Kim
发明人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung , Yun Seok Kim , Min Joo Kim
IPC分类号： H01L29/78
CPC分类号： H01L21/823807 , H01L21/823857
摘要： A semiconductor device may include a semiconductor substrate having a first region and a second region. The nitrogen-incorporated active region may be formed within the first region. A first gate electrode may be formed on the nitrogen-incorporated active region. A first gate dielectric layer may be interposed between the nitrogen-incorporated active region and the first gate electrode. The first gate dielectric layer may include a first dielectric layer and a second dielectric layer. The second dielectric layer may be a nitrogen contained dielectric layer. A second gate electrode may be formed on the second region. A second gate dielectric layer may be interposed between the second region and the second gate electrode. The first gate dielectric layer may have the same or substantially the same thickness as the second gate dielectric layer, and the nitrogen contained dielectric layer may contact with the nitrogen-incorporated active region.
摘要翻译：半导体器件可以包括具有第一区域和第二区域的半导体衬底。可以在第一区域内形成含氮的有源区。可以在引入氮的有源区上形成第一栅电极。第一栅极电介质层可插入在引入氮的有源区和第一栅电极之间。第一栅介质层可以包括第一介电层和第二介电层。第二电介质层可以是含氮介电层。第二栅极电极可以形成在第二区域上。可以在第二区域和第二栅电极之间插入第二栅极电介质层。第一栅极介电层可以具有与第二栅极介电层相同或基本相同的厚度，并且含氮介电层可以与引入氮的有源区接触。

8. 发明申请

US20060081948A1 Transistors with multilayered dielectric films and methods of manufacturing such transistors 有权
标题翻译：具有多层介电膜的晶体管和制造这种晶体管的方法
公开(公告)号：US20060081948A1
公开(公告)日：2006-04-20
申请号：US11252514
申请日：2005-10-18
申请人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
发明人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
IPC分类号： H01L21/8238 , H01L29/94
CPC分类号： H01L21/28185 , H01L21/28079 , H01L21/28194 , H01L21/28202 , H01L21/823857 , H01L29/495 , H01L29/513 , H01L29/517
摘要： Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.
摘要翻译：提供了在通道区域上包括多层电介质膜的晶体管。多层电介质包括下电介质膜，该电介质膜的厚度至少为多层电介质膜的厚度的50％，并且包括金属氧化物，金属硅酸盐，铝酸盐或其混合物，以及上电介质膜在下介电膜上，上电介质膜包含III族金属氧化物，III族金属氮化物，第ⅩⅢ族金属氧化物或第ⅩⅢ族金属氮化物。在多层电介质膜上设置栅电极。

9. 发明申请

US20050233598A1 Method of fabricating high-k dielectric layer having reduced impurity 有权
标题翻译：制造具有减少的杂质的高k电介质层的方法
公开(公告)号：US20050233598A1
公开(公告)日：2005-10-20
申请号：US11107559
申请日：2005-04-15
申请人： Hyung-Suk Jung , Jong-Ho Lee , Ha-Jin Lim , Jae-Eun Park , Yun-Seok Kim , Jong-Ho Yang
发明人： Hyung-Suk Jung , Jong-Ho Lee , Ha-Jin Lim , Jae-Eun Park , Yun-Seok Kim , Jong-Ho Yang
IPC分类号： H01L21/31 , C23C16/40 , H01L21/28 , H01L21/314 , H01L21/336 , H01L21/469 , H01L29/51
CPC分类号： H01L21/022 , C23C16/402 , C23C16/45525 , C23C16/45527 , C23C16/45529 , H01L21/0228 , H01L21/02318 , H01L21/28185 , H01L21/28194 , H01L21/3142 , H01L21/3143 , H01L29/513 , H01L29/517 , H01L29/518
摘要： Methods of fabricating high-k dielectric layers having reduced impurities for use in semiconductor applications are disclosed. The methods include the steps of: forming a stacked dielectric layer having a first dielectric layer and a second dielectric layer formed on a semiconductor substrate using an ALD method, in combination with a post-treatment step performed to the stacked dielectric layer. The steps of forming the stacked dielectric layer and performing the post-treatment are repeated at least once, thereby fabricating the high-k dielectric layer.
摘要翻译：公开了制造用于半导体应用的具有减少的杂质的高k电介质层的方法。该方法包括以下步骤：结合对叠层电介质层执行的后处理步骤，使用ALD法形成具有形成在半导体衬底上的第一电介质层和第二电介质层的叠层电介质层。形成堆叠的电介质层并进行后处理的步骤至少重复一次，从而制造高k电介质层。

10. 发明申请

US20110287622A1 Transistors with Multilayered Dielectric Films and Methods of Manufacturing Such Transistors 有权
标题翻译：具有多层介质膜的晶体管及其制造方法
公开(公告)号：US20110287622A1
公开(公告)日：2011-11-24
申请号：US13195935
申请日：2011-08-02
申请人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
发明人： Ha-Jin Lim , Jong-Ho Lee , Hyung-Suk Jung
IPC分类号： H01L21/28
CPC分类号： H01L21/28185 , H01L21/28079 , H01L21/28194 , H01L21/28202 , H01L21/823857 , H01L29/495 , H01L29/513 , H01L29/517
摘要： Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.
摘要翻译：提供了在通道区域上包括多层电介质膜的晶体管。多层电介质包括下电介质膜，该电介质膜的厚度至少为多层电介质膜的厚度的50％，并且包括金属氧化物，金属硅酸盐，铝酸盐或其混合物，以及上电介质膜在下介电膜上，上电介质膜包含III族金属氧化物，III族金属氮化物，第ⅩⅢ族金属氧化物或第ⅩⅢ族金属氮化物。在多层电介质膜上设置栅电极。

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