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1. 发明申请

WO2009146588A1 BONDING METHOD FOR THROUGH-SILICON-VIA BASED 3D WAFER STACKING 审中-公开
标题翻译：用于基于硅的三维WAFER堆叠的绑定方法
公开(公告)号：WO2009146588A1
公开(公告)日：2009-12-10
申请号：PCT/CN2008/071203
申请日：2008-06-05
申请人： HONG KONG APPLIED SCIENCE AND TECHNOLOGY RESEARCH INSTITUTE CO., LTD.. , LEUNG, Chi Kuen , SUN, Peng , SHI, Xunqing , CHUNG, Chang Hwa
发明人： LEUNG, Chi Kuen , SUN, Peng , SHI, Xunqing , CHUNG, Chang Hwa
IPC分类号： H01L23/488 , H01L25/00
CPC分类号： H01L24/94 , H01L21/6836 , H01L21/76898 , H01L24/11 , H01L24/16 , H01L24/29 , H01L24/742 , H01L24/92 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/6834 , H01L2224/13009 , H01L2224/13099 , H01L2224/83194 , H01L2224/9202 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/07811 , H01L2924/10253 , H01L2224/83 , H01L2224/11 , H01L2924/00
摘要： There is described a bonding method for through-silicon- via bonding of a wafer stack in which the wafers are formed with through-silicon-vias and lateral microchannels that are filled with solder. To fill the vias and channels the wafer stack is placed in a soldering chamber and molten solder is drawn through the vias and channels by vacuum. The wafers are held together by layers of adhesive during the assembly of the wafer stack. Means are provided for local reheating of the solder after it has cooled to soften the solder to enable it to be removed from the soldering chamber.
摘要翻译：描述了通过晶片叠层的硅 - 硅 - 通孔结合的粘合方法，其中晶片形成有穿过硅通孔和填充有焊料的侧向微通道。为了填充通孔和通道，将晶片堆叠放置在焊接室中，并且熔融的焊料通过真空通过通孔和通道。在晶片堆叠的组装期间，晶片通过粘合剂层保持在一起。提供用于在焊料冷却以软化焊料以使其能够从焊接室除去的焊料的局部再加热的装置。

2. 发明申请

WO2010111825A1 ELECTRONIC PACKAGE AND METHOD OF FABRICATION THEREOF 审中-公开
标题翻译：电子封装及其制造方法
公开(公告)号：WO2010111825A1
公开(公告)日：2010-10-07
申请号：PCT/CN2009/071083
申请日：2009-03-30
申请人： HONG KONG APPLIED SCIENCE AND TECHNOLOGY RESEARCH INSTITUTE CO., LTD. , LEUNG, Chi Kuen , SUN, Peng , SHI, Xunqing , CHUNG, Chang Hwa
发明人： LEUNG, Chi Kuen , SUN, Peng , SHI, Xunqing , CHUNG, Chang Hwa
IPC分类号： H01L25/065 , H01L25/07 , H01L23/485 , H01L21/60
CPC分类号： H01L21/6835 , H01L21/568 , H01L23/5389 , H01L24/19 , H01L24/96 , H01L25/0652 , H01L25/18 , H01L2224/04105 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01082 , H01L2924/181 , H01L2924/00
摘要： An electronic package is provided, which comprises at least a first module (2) and a second module (4) arranged on top of the first module (2), wherein the first and second modules (2, 4) are adhesively connected together and in the form of a module stack. Each of the modules (2,4) includes a substrate layer (8) with at least one metal layer (10), at least one die (16, 22) and a plastic package molding compound layer (32) molded over the die or dice (16, 22), wherein the die or dice (16, 22) are bonded on the substrate layer (8) via the metal layer (10), and a plurality of channels (34, 36, 38, 40, 42, 44) are formed generally vertically acting as vias to connect the metal layers (10) in different modules. Some or all the channels (34, 36, 38, 40, 42, 44) are provided with an inner surface coated with a conductive material layer or filled with a conductive material for electrical connection, whereby the dice (16, 22) in the module stack are electrically connected together. At least one module (2) includes a means (46) which is connected to the channels (34, 36, 38, 40, 42, 44) and serves as an intermediary for providing electrical, mechanical and thermal connectivity, and communication externally. A method for fabricating the electronic package is also provided.
摘要翻译：提供了一种电子封装，其包括至少第一模块（2）和布置在第一模块（2）的顶部上的第二模块（4），其中第一和第二模块（2,4）粘合地连接在一起，以模块堆栈的形式。每个模块（2,4）包括具有至少一个金属层（10）的基底层（8），在模具上模制的至少一个模具（16,22）和塑料封装模制化合物层（32），或骰子（16,22），其中所述骰子或骰子（16,22）经由所述金属层（10）接合在所述基底层（8）上，以及多个通道（34,36,38,40,42， 44）通常垂直地形成为通孔以将不同模块中的金属层（10）连接起来。一些或所有通道（34,36,38,40,42,44）设置有涂覆有导电材料层或填充有用于电连接的导电材料的内表面，由此，所述导体（16,22）模块堆叠电连接在一起。至少一个模块（2）包括连接到通道（34,36,38,40,42,44）的装置（46），并且用作用于提供电气，机械和热连接以及外部通信的中介。还提供了一种用于制造电子封装的方法。

3. 发明申请

WO2009052683A1 ELECTRONIC CIRCUIT PACKAGE 审中-公开
标题翻译：电子电路包
公开(公告)号：WO2009052683A1
公开(公告)日：2009-04-30
申请号：PCT/CN2007/070954
申请日：2007-10-25
申请人： HONG KONG APPLIED SCIENCE AND TECHNOLOGY RESEARCH INSTITUTE CO., LTD. , LEUNG, Lap-Wai Lydia , CHEN, Yu-Chih , LEUNG, Chi Kuen , CHUNG, Chang Hwa
发明人： LEUNG, Lap-Wai Lydia , CHEN, Yu-Chih , LEUNG, Chi Kuen , CHUNG, Chang Hwa
IPC分类号： H01L23/15
CPC分类号： H01L23/15 , H01L27/13 , H01L2224/48091 , H01L2224/48227 , H01L2924/09701 , H01L2924/19041 , H01L2924/3011 , H01L2924/00014
摘要： An electronic circuit package(1) has a thin-film circuit(3) integrated with the ceramic substrate(2). The thin-film circuit(3) includes at least two passive circuit elements joined by an integrated electrical interconnect. At least one active electronic component(4) is mounted on the ceramic substrate(2) without any dielectric material between the active electronic component(4) and the ceramic substrate, and is electrically connected with the integrated thin-film circuit(3).
摘要翻译：电子电路封装（1）具有与陶瓷基板（2）成一体的薄膜电路（3）。薄膜电路（3）包括通过集成电互连连接的至少两个无源电路元件。至少一个有源电子部件（4）安装在陶瓷基片（2）上，而在有源电子部件（4）和陶瓷基片之间没有任何电介质材料，并与集成薄膜电路（3）电连接。

4. 发明申请

WO2009100614A1 ELECTRONIC CIRCUIT PACKAGE 审中-公开
标题翻译：电子电路包
公开(公告)号：WO2009100614A1
公开(公告)日：2009-08-20
申请号：PCT/CN2008/070258
申请日：2008-02-03
申请人： HONG KONG APPLIED SCIENCE AND TECHNOLOGY RESEARCH INSTITUTE CO. LTD. , LEUNG, Lap-Wai, Lydia , CHUNG, Chang Hwa , LIU, Jie , LEUNG, Chi Kuen , CHAN, Chiu Lun
发明人： LEUNG, Lap-Wai, Lydia , CHUNG, Chang Hwa , LIU, Jie , LEUNG, Chi Kuen , CHAN, Chiu Lun
IPC分类号： H01L23/02
CPC分类号： H05K1/181 , H01L23/3121 , H01L23/66 , H01L25/16 , H01L2224/48137 , H01L2224/48227 , H01L2924/09701 , H01L2924/3011 , H05K1/0237 , H05K1/0243 , H05K1/189 , H05K3/284 , H05K2201/10045 , H05K2201/1006 , H05K2201/10719 , H05K2203/049 , Y02P70/611
摘要： A electronic circuit package (1) having a flexible substrate (2) with metals layers on one or more of its surface forming a wiring pattern (9) and/or surface mount bonding pads (11, 12). Passive electronic components (6, 7, 8) are integrated onto component package (4) that is mounted on the flexible substrate (2) and electrically connected with the wiring pattern (9) bonding pads (11, 12). An active electronic device (5, 13) is mounted on the flexible substrate (2) or bonding pads (11, 12). The flexible substrate (2), the passive electronic components (6, 7, 8) and the active electronic device (5, 13) are encapsulated by encapsulating material (15).
摘要翻译：一种电子电路封装（1），其具有在形成布线图案（9）和/或表面贴装焊盘（11,12）的一个或多个表面上具有金属层的柔性基板（2）。无源电子部件（6,7,8）被集成到安装在柔性基板（2）上并与布线图案（9）接合焊盘（11,12）电连接的部件封装（4）上。有源电子器件（5,13）安装在柔性基板（2）或接合焊盘（11,12）上。柔性基板（2），无源电子部件（6,7,8）和有源电子器件（5,13）被封装材料（15）封装。

5. 发明申请

WO2009143676A1 MULTI-CHIP PACKAGE 审中-公开
标题翻译：多芯片包装
公开(公告)号：WO2009143676A1
公开(公告)日：2009-12-03
申请号：PCT/CN2008/071153
申请日：2008-05-30
申请人： Hong Kong Applied Science & Technology Research Institute Co., Ltd , SHAM, Man Lung Ivan , GAO, Ziyang , LEUNG, Lap Wai Lydia , LEUNG, Chi Kuen , OLLERES, Lourdito M. , CHUNG, Chang Hwa
发明人： SHAM, Man Lung Ivan , GAO, Ziyang , LEUNG, Lap Wai Lydia , LEUNG, Chi Kuen , OLLERES, Lourdito M. , CHUNG, Chang Hwa
IPC分类号： H01L25/065 , B60C23/04
CPC分类号： B60C23/0408 , B60C23/0433 , H01L23/49575 , H01L25/16 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
摘要： A multi-chip semiconductor device (300) as may be used, for example, in tire pressure monitoring systems, is provided. The semiconductor device (300) comprises a leadframe (310) having a first side and a second side, wherein the second side comprises a first landing pad (320) for a surface mount component (360); a first integrated circuit die (330) bonded to the first side of the leadframe (310); and a package to encapsulate at least a portion of the first integrated circuit (330) and at least a portion of the leadframe (310), wherein at least a portion of the first landing pad (320) is not encapsulated by the package.
摘要翻译：提供了可用于例如轮胎压力监测系统中的多芯片半导体器件（300）。半导体器件（300）包括具有第一侧和第二侧的引线框架（310），其中第二侧包括用于表面安装部件（360）的第一着陆焊盘（320）; 结合到引线框架（310）的第一侧的第一集成电路管芯（330）; 以及封装，以封装所述第一集成电路（330）的至少一部分和所述引线框架（310）的至少一部分，其中所述第一着陆焊盘（320）的至少一部分未被所述封装封装。

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