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1. 发明专利

JPS60167424A INSPECTING APPARATUS 失效
公开(公告)号：JPS60167424A
公开(公告)日：1985-08-30
申请号：JP2179384
申请日：1984-02-10
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： HIROBE YOSHIMICHI , KADOTA KAZUYA , NAGAO MAKI , SUGIMOTO ARITOSHI , AZUMA HIDEAKI , SATOU FUMIYOSHI , NAKAJIMA SHIYUU , OZAKI KATSUMI , UEHARA ICHIROU
IPC分类号： G01N21/88 , G01N21/94 , G01N21/956 , G03F1/84 , H01L21/027 , H01L21/30 , H01L21/66
摘要： PURPOSE:To suppress or prevent attaching of foreign matter onto a test piece to improve reliability of inspection and to prevent a defect from occurring at the next process, by providing with a stage supporting the test piece with its surface oriented vertically, and by setting an optical system opposing the stage so that at least the optical axis of the object side is horizontal. CONSTITUTION:A wafer W which has been carried by an automatic handling means 17 is vacuum-attracted and supported vertically on the surface of the movable table 9. The wafer W is focused against the microscope 7 by moving the wafer W in the Z direction with the stage 5, and an operator can observe and inspect the entire surface of the wafer W with the microscope 7 by moving it so as to scan in both the X and Y directions. At the same time, the wafer surface is pictured by the ITV camera 16 and automatically inspected. Since the wafer W is always kept vertically during the inspection, foreign matter such as dust existing in the atmosphere hardly rides on the surface of the wafer W and hardly sticks to it, if the foreign matter falls.

2. 发明专利

JPS5852645A METHOD AND DEVICE FOR DEVELOPMENT 失效
公开(公告)号：JPS5852645A
公开(公告)日：1983-03-28
申请号：JP14947181
申请日：1981-09-24
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： HIROBE YOSHIMICHI , KADOTA KAZUYA , NAKAZAWA TOMIO , NAGAO MAKI , TAGI YOUICHI
IPC分类号： G03F7/30
摘要： PURPOSE:To obtain a uniform, high-precision pattern by supplying a developer in a vapor state in the process of forming a fine pattern on a silicon substrate. CONSTITUTION:In a developing tank 11, a holding base 12 for holding a substrate 4 made of a silicon wafer upside down from above is provided. A device 14 for vaporizing a developer 15 is also provided in the developing tank 11. This developer 15 reacts chemically with exposed parts and unexposed parts of a photosensitive material on the substrate 15, and this developer 15 is vaporized by the device 14 to fill the developing tank 11. In this state, the substrate 4 held by the holding base 12 is treated by, for example, the cooling of a temperature regulator 19, and consequently the vapor of the developer 15 in the tank 11 is condensed to stick to the surface (reverse surface) of the substrate 4, covering the substrate surface uniformly. Consequently, the condensed developer 15 reacts chemically with a thin film of the photosensitive material on the substrate 4, thus developing a desired pattern.

3. 发明专利

JPS5817443A PHOTORESIST DEVELOPING METHOD AND ITS DEVICE 失效
公开(公告)号：JPS5817443A
公开(公告)日：1983-02-01
申请号：JP11503081
申请日：1981-07-24
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAZAWA TOMIO , KADOTA KAZUYA , HIROBE YOSHIMICHI , NAGAO MAKI , AZUMA HIDEAKI , TAGI YOUICHI
IPC分类号： H01L21/30 , G03F7/30 , H01L21/027
摘要： PURPOSE:To execute a uniform development extending over the whole surface of a wafer, by supplying a developing substance to the surface of the wafer by vapor phase, in case of development of photoresist. CONSTITUTION:In case of executing development, vapor or carrier vapor from a vapor or carrier vapor feed nozzle 7, and vapor of a developer from a developer feed nozzle 9 are fed into a developing chamber 6, respectively. Said vapor mixed with each other in the developing chamber 6, uniformly adheres onto the resist surface on a wafer 3 held on a wafer chuck 14, and development of the resist is executed. The mixing ratio of the water vapor or carrier vapor with the vapor of the developer can be adjusted so as to obtain an optimum development by adjusting flow rate adjusting valves 10 and 11. In this way, since a developing substance is fed by vapor phase, it does not occur that foreign matter adheres to the resist, or the resit peels off at the time of development, and a uniform development is obtained.

4. 发明专利

JPS61213846A PATTERN FORMING METHOD 失效
公开(公告)号：JPS61213846A
公开(公告)日：1986-09-22
申请号：JP5462585
申请日：1985-03-20
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： SUGIMOTO ARITOSHI , UEHARA ICHIRO , KADOTA KAZUYA
IPC分类号： G03C5/08 , G03F7/20 , G03F7/38 , H01L21/027
摘要： PURPOSE:To reduce the variance of photoresist dimensions to unify photoresist dimensions by performing the processing where a specific film thickness of an exposed part subjected to patterning exposure is reduced by heating or the like at least and performing exposure faintly and performing development. CONSTITUTION:Patterning exposure is performed through a mask pattern with normal dimensions to form a low exposed part 7a' in an exposed part 7a. A photoresist 7 is subjected to the processing where the film thickness of the exposed part 7a is reduced by [lambda2/(4n2)] (2N+1) (N=0, 1, 2,..., and lambda2 and n2 are the exposure light wavelength for overall faint exposure and the photoresist refractive index respectively) and the film thickness is reduced throughout by lambda2/(4n2). After this film thickness reduction processing, all of the surface of a semiconductor substrate is exposed faintly with the light having the same wavelength lambda2 as the patterning exposure light wavelength. The boundary face between the exposed part 7a and a non-exposed part 7b is linear by overall faint exposure, and the variance of dimensions of the photoresist 7 are eliminated by development.

5. 发明专利

JPS60120519A PHOTOMASK AUTOMATIC DEFECT INSPECTION DEVICE 失效
公开(公告)号：JPS60120519A
公开(公告)日：1985-06-28
申请号：JP22845583
申请日：1983-12-05
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： OZAKI KATSUMI , KADOTA KAZUYA , NAGAO MAKI
IPC分类号： G01N21/88 , G01N21/93 , G01N21/956 , G03F1/00 , G03F1/84 , H01L21/027 , H01L21/66
摘要： PURPOSE:To improve the reliability of inspection by employing a photomask comprising a false defect pattern which is preset in advance so as to adjust an automatic defect inspection device in the optimum state. CONSTITUTION:A pattern of a photomask 1 is exposed onto a dummy wafer 11 and after transfer the pattern, the wafer is put on a movable table 12 and chip patterns 2 and 3 are detected and recognized by detection optical systems 13, 14 facing to each other and a detection circuit 15. The obtained electric signals are compared with a threshold value Vth in a comparison circuit 21 thereby detecting false defects. Then the chip patterns 2 and 3 are compared mutually in the contrast circuit 22 so as to recognize respective false defects 8 and 9 and that an automatic defect inspection device 10 is adjusted correctly is displayed by a display 25. If the false defect 8 or 9 is not detected in the comparison circuit 21, a slice level adjustor 23 operates to do the detection in the comparison circuit 21 again while changing the threshold value Vth gradually.

6. 发明专利

JPS61215544A FORMATION OF PATTERN 失效
公开(公告)号：JPS61215544A
公开(公告)日：1986-09-25
申请号：JP5462685
申请日：1985-03-20
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： SUGIMOTO ARITOSHI , UEHARA ICHIRO , KADOTA KAZUYA
IPC分类号： G03C5/08 , G03F7/20 , H01L21/027
摘要： PURPOSE:To render dimensions uniform in forming a resist pattern by applying a positive type photoresist, after prebaking and patternwise exposing, uniformly exposing it to multiwavelength rays of light with the max. exposure amt. so long as the unexposed parts decrease in film thickness, and finally developing it. CONSTITUTION:The positive type photoresist 6 is applied on a semiconductor substrate 5, prebaked, and patternwise exposed through a mask pattern to form the exposed parts 6a including the low exposed parts 6a' and the unexposed parts 6b on the photoresist 6. The parts 6a have transmittance of photosensitive light as high as several times that of the parts 6b, and the parts 6a' are as thin as

7. 发明专利

JPS61263219A FORMING METHOD OF RESIST PATTERN 失效
公开(公告)号：JPS61263219A
公开(公告)日：1986-11-21
申请号：JP10379885
申请日：1985-05-17
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NOZAKI KATSUHIRO , KADOTA KAZUYA , SATO FUMIYOSHI , SUGIMOTO ARITOSHI , OZAKI KATSUMI
IPC分类号： G03F7/26 , H01L21/027 , H01L21/30
摘要： PURPOSE:To form an accurate resist pattern by forming a resist layer which gradually decreases in containing light absorber density in a surface direction from the coating surface, exposing and developing the layer. CONSTITUTION:A resist layer 3 is coated on the upper surface of the aluminum layer 2 on a silicon wafer 1. A light absorber 4 s contained in the layer 3, and higher the density is, the nearer the layer 2 is disposed to the surface of the layer 2, and lower the density is, the layer 2 is nearer to the surface of the layer 3. When the layer 3 is exposed, the reflected light on the surface of the exposed light arrived at the surface of the layer 2 is absorbed and removed by a light absorber 4 of high density. Thus, an accurate resist pattern can be formed.

8. 发明专利

DE3678868D1 未知
公开(公告)号：DE3678868D1
公开(公告)日：1991-05-29
申请号：DE3678868
申请日：1986-06-10
申请人： HITACHI LTD
发明人： ITO TETSUO , TANUMA MASAYA , NAKAGOMI YOSHIYUKI , KADOTA KAZUYA , KOBAYASHI KAZUNARI
IPC分类号： B05D7/00 , B05D1/32 , B05D1/40 , B05D3/06 , G03F7/16 , H01L21/027 , H01L21/30 , H01L21/302
摘要： In a photoresist process which comprises a process for spin-coating a substrate (7) with a resist (10), a process for transferring a mask pattern (4, 5) onto the coated resist film followed by exposure (8), and a developing process for forming a pattern on the substrate after the pattern (4, 5) has been exposed. When the developed pattern of the resist pulsates with the increase or decrease of parameters in the process of applying resist (10), the value of the parameter is set to a value that corresponds to an extreme value of the pulsation.

9. 发明专利

JPS6225256B2 失效
公开(公告)号：JPS6225256B2
公开(公告)日：1987-06-02
申请号：JP6879878
申请日：1978-06-09
申请人： HITACHI LTD
发明人： KADOTA KAZUYA
IPC分类号： H01L21/31 , C23C16/34 , H01L21/318

10. 发明专利

JPS61245530A PROCESSOR 失效
公开(公告)号：JPS61245530A
公开(公告)日：1986-10-31
申请号：JP8639085
申请日：1985-04-24
申请人： HITACHI LTD
发明人： NAGAO MAKI , KADOTA KAZUYA , HIROBE YOSHIMICHI
IPC分类号： H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/31
摘要： PURPOSE:To ensure uniformity in processing conditions over the whole processed object by providing a shield plate with a window opening between the object to be processed and plasma supply means and relatively displacing the shield plate and the object to be processed. CONSTITUTION:When a wafer 1 (object to be processed) has been placed on a lower electrode 7 and a process chamber 2 has been exhausted, an etching gas is introduced thereinto through a supply port 4 and a voltage is applied to an upper electrode 6 (plasma supply means), the lower electrode 7 and a shield plate 11, causing a plasma etching reaction. In this case, since the shield plate 11 operates as a grid electrode, an etching seed produced by the reaction between plasma and the etching gas is brought into contact only through a window opening 12 in the shield plate 11. Accordingly, an etching process is conducted only on a region of the wafer 1 opposing the window hole 12 in the shield plate 11. Therefore, the etching process state is uniform over this whole small region. When the process is terminated, the region of the wafer 1 opposite to the window hole 12 is displaced and the process is performed under the same condition.

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