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1. 发明专利

JPH1174514A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1174514A
公开(公告)日：1999-03-16
申请号：JP23242597
申请日：1997-08-28
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： NUMAZAWA SUMUTO , NAKAZAWA YOSHITO , KOBAYASHI MASAYOSHI , KUDO SATOSHI , IMAI YASUO , KUBO SAKAE , SHIGEMATSU TAKU , OONISHI SHIYOUKOU , UESAWA KOUZOU , OISHI KENTARO
IPC分类号： H01L21/28 , H01L21/336 , H01L29/423 , H01L29/51 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To improve the reliability of a semiconductor device having a MISFET of trench gate structure. SOLUTION: A method for manufacturing a semiconductor having a MISFET of trench gate structure is composed of a process for forming holes 4 from the major surface of a first conductive semiconductor layer 1B which is a drain area in the direction of its depth, a process for forming a gate insulating film 5 composed of a thermal-oxidized film 5A and a deposited film 5B on the inner surface of each of the holes 4, a process for forming a gate electrode 6A in each of the holes 4 and a process for forming a second conductive semiconductor area 8 as an area for forming channel by introducing impurities in the first conductive semiconductor layer 1B and forming a first conductive semiconductor area 9 as a source area by introducing impurities in the second conductive semiconductor area 8.

2. 发明专利

JP2003124233A METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2003124233A
公开(公告)日：2003-04-25
申请号：JP2002226991
申请日：2002-08-05
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： NUMAZAWA SUMUTO , NAKAZAWA YOSHITO , KOBAYASHI MASAYOSHI , KUDO SATOSHI , IMAI YASUO , KUBO SAKAE , SHIGEMATSU TAKU , ONISHI AKIHIRO , UESAWA KOUZOU , OISHI KENTARO
IPC分类号： H01L21/316 , H01L21/336 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To solve the problem that reliability in a semiconductor device having a MISFET of a trench gate structure is lowered. SOLUTION: In a method for manufacturing a semiconductor device having a MISFET of a trench gate structure, a groove 4 is formed of a main plane of a first conductive type semiconductor layer 1B as a drain area to the depth direction thereof, and a gate insulating film 5 composed of a thermal oxide film 5A and a deposited film 5B on the internal plane of the groove 4 is formed, and a gate electrode 6A is formed in the groove 4. Thereafter, impurities are introduced into the first conductive type semiconductor layer 1B to form a second conductive type semiconductor area 8 as a channel forming area, and impurities are introduced into the second conductive type semiconductor area 8 to form a first conductive type semiconductor area 9 as a source area.

3. 发明专利

JPH07307320A CASSETTE JIG FOR ACCOMMODATING BOARDS 失效
公开(公告)号：JPH07307320A
公开(公告)日：1995-11-21
申请号：JP9717594
申请日：1994-05-11
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： UESAWA KOUZOU
IPC分类号： B65D85/86 , B65G49/07 , H01L21/304 , H01L21/673 , H01L21/68 , H05K3/26
摘要： PURPOSE:To prevent re-adhesion of cleaning fluid to a substrate surface, by installing an introduction part member which comes into contact with the lowermost part at the time of accommodating a substrate, and has inclination facing downward further than the lowermost part of the substrate, between ''the lowermost part and the region led out to the outside of the substrate arrangement. CONSTITUTION:In a frame body 2, an introduction part member 3 is installed which comes into contact with a region 4A which turns to the lowermost part of a wafer when a semiconductor wafer 4 is accommodated in each accommodation trench 2B. The introduction part member 3 has a contact region 3A coming into contact with the lowermost region 4A, and an inclination on the rear 3B facing the contact region 3A. The inclination on the rear 3B faces from the arrangement region of semiconductor wafers 4 (arrangement region of the accommodation trenches 2B) toward a vacant region 2A constituted on the initial stage side or the final stage side of the arrangement region of the semiconductor wafers 4, and is constituted in a region facing downward further than the lowermost region 4A of each of the semiconductor wafers 4.

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